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📄 bpsk_12.mdl

📁 用systerm generation完成BPSK的调制解调过程
💻 MDL
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      block_version	      "8.1"
      has_advanced_control    "0"
      sggui_pos		      "286,200,425,337"
      block_type	      "mcode"
      sg_icon_stat	      "125,60,1,1,white,blue,0,2758a6da"
      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics ');\np"
"atch([0 125 125 0 ],[0 0 60 60 ],[0.77 0.82 0.91]);\npatch([47 37 51 37 47 63"
" 67 71 88 75 62 53 68 53 62 75 88 71 67 63 47 ],[6 16 30 44 54 54 50 54 54 41"
" 54 45 30 15 6 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 0 125 125 0 ],[0 6"
"0 60 0 0 ]);\nfprintf('','COMMENT: end icon graphics');\n\nfprintf('','COMMEN"
"T: begin icon text ');\ncolor('black');port_label('input',1,'ent');\ncolor('b"
"lack');port_label('output',1,'sal');\ncolor('black');disp('\\bf{BPSKcompa}','"
"texmode','on');\nfprintf('','COMMENT: end icon text');\n"
      suppress_output	      "1"
      defparams		      "{}"
      hide_port_list	      "{}"
    }
    Block {
      BlockType		      Reference
      Name		      "DAFIR v9_0 "
      Ports		      [1, 1]
      Position		      [820, 224, 880, 286]
      SourceBlock	      "xbsIndex_r4/DAFIR v9_0 "
      SourceType	      "Xilinx Finite Impulse Response Filter Block"
      infoedit		      "Hardware notes: Implemented using distributed a"
"rithmetic (DA).  The hardware over sampling rate determines the degree of par"
"allelism.  A rate of one produces a fully parallel DA filter.  A rate of n (r"
"esp., n+1) for an n-bit input signal produces a fully serial implementation f"
"or a non-symmetric (resp., symmetric) impulse response.  Intermediate values "
"produce implementations with intermediate levels of parallelism."
      coef		      "xlfda_numerator('FDATool')"
      structure		      "Inferred from Coefficients"
      coef_n_bits	      "12"
      coef_bin_pt	      "11"
      over_sample	      "1"
      reload		      off
      valids		      off
      latency		      "1"
      num_channels	      "1"
      serial_input	      off
      polyphase_behavior      "Single Rate:  sample in - sample out"
      dbl_ovrd		      off
      explicit_period	      off
      period		      "1"
      xl_use_area	      off
      xl_area		      "[0,0,0,0,0,0,0]"
      block_version	      "VER_STRING_GOES_HERE"
      has_advanced_control    "0"
      sggui_pos		      "341,148,425,429"
      block_type	      "fir"
      sg_icon_stat	      "60,62,1,1,white,blue,0,c0ef6283"
      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics ');\np"
"atch([0 60 60 0 ],[0 0 62 62 ],[0.77 0.82 0.91]);\npatch([14 4 18 4 14 30 34 "
"38 55 42 29 20 35 20 29 42 55 38 34 30 14 ],[7 17 31 45 55 55 51 55 55 42 55 "
"46 31 16 7 20 7 7 11 7 7 ],[0.98 0.96 0.92]);\nplot([0 0 60 60 0 ],[0 62 62 0"
" 0 ]);\nfprintf('','COMMENT: end icon graphics');\n\nfprintf('','COMMENT: beg"
"in icon text ');\ncolor('black');port_label('input',1,'x0');\ncolor('black');"
"port_label('output',1,'y0');\ncolor('black');disp('128 tap');\nfprintf('','CO"
"MMENT: end icon text');\nfprintf('','COMMENT: Make no changes above this line"
" -- machine generated code. ');\n"
    }
    Block {
      BlockType		      Reference
      Name		      "FDATool"
      Ports		      []
      Position		      [970, 450, 1024, 506]
      BackgroundColor	      "lightBlue"
      UserDataPersistent      on
      UserData		      "DataTag1"
      SourceBlock	      "xbsIndex_r4/FDATool"
      SourceType	      "Xilinx FDATool Interface"
      ShowPortLabels	      on
      block_type	      "fdatool"
    }
    Block {
      BlockType		      Reference
      Name		      "Gateway In"
      Ports		      [1, 1]
      Position		      [140, 144, 195, 166]
      ForegroundColor	      "[0.250980, 0.000000, 0.000000]"
      SourceBlock	      "xbsIndex_r4/Gateway In"
      SourceType	      "Xilinx Gateway In Block"
      infoedit		      "Gateway in block.  Converts inputs of type Simu"
"link integer, double and fixed point to  Xilinx fixed point type.<P><P>Hardwa"
"re notes:  In hardware these blocks become top level input ports."
      arith_type	      "Signed  (2's comp)"
      n_bits		      "16"
      bin_pt		      "14"
      period		      "1"
      dbl_ovrd		      off
      timing_constraint	      "None"
      locs_specified	      off
      LOCs		      "{}"
      xl_use_area	      off
      xl_area		      "[0,0,0,0,0,0,0]"
      block_version	      "VER_STRING_GOES_HERE"
      has_advanced_control    "0"
      sggui_pos		      "466,185,425,354"
      block_type	      "gatewayin"
      sg_icon_stat	      "55,22,1,1,white,yellow,0,4bb76ffd"
      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics ');\np"
"atch([0 55 55 0 ],[0 0 22 22 ],[0.95 0.93 0.65]);\npatch([22 18 23 18 22 28 3"
"0 32 38 33 28 25 31 25 28 33 38 32 30 28 22 ],[2 6 11 16 20 20 18 20 20 15 20"
" 17 11 5 2 7 2 2 4 2 2 ],[0.98 0.96 0.92]);\nplot([0 0 55 55 0 ],[0 22 22 0 0"
" ]);\nfprintf('','COMMENT: end icon graphics');\n\nfprintf('','COMMENT: begin"
" icon text ');\ncolor('black');port_label('input',1,'\\fontsize{11pt}\\bf In "
"','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','C"
"OMMENT: end icon text');\nfprintf('','COMMENT: Make no changes above this lin"
"e -- machine generated code. ');\n"
    }
    Block {
      BlockType		      Reference
      Name		      "Gateway In1"
      Ports		      [1, 1]
      Position		      [90, 189, 145, 211]
      ForegroundColor	      "[0.250980, 0.000000, 0.000000]"
      SourceBlock	      "xbsIndex_r4/Gateway In"
      SourceType	      "Xilinx Gateway In Block"
      infoedit		      "Gateway in block.  Converts inputs of type Simu"
"link integer, double and fixed point to  Xilinx fixed point type.<P><P>Hardwa"
"re notes:  In hardware these blocks become top level input ports."
      arith_type	      "Signed  (2's comp)"
      n_bits		      "16"
      bin_pt		      "14"
      period		      "1"
      dbl_ovrd		      off
      timing_constraint	      "None"
      locs_specified	      off
      LOCs		      "{}"
      xl_use_area	      off
      xl_area		      "[0,0,0,0,0,0,0]"
      block_version	      "VER_STRING_GOES_HERE"
      has_advanced_control    "0"
      sggui_pos		      "351,244,425,354"
      block_type	      "gatewayin"
      sg_icon_stat	      "55,22,1,1,white,yellow,0,4bb76ffd"
      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics ');\np"
"atch([0 55 55 0 ],[0 0 22 22 ],[0.95 0.93 0.65]);\npatch([22 18 23 18 22 28 3"
"0 32 38 33 28 25 31 25 28 33 38 32 30 28 22 ],[2 6 11 16 20 20 18 20 20 15 20"
" 17 11 5 2 7 2 2 4 2 2 ],[0.98 0.96 0.92]);\nplot([0 0 55 55 0 ],[0 22 22 0 0"
" ]);\nfprintf('','COMMENT: end icon graphics');\n\nfprintf('','COMMENT: begin"
" icon text ');\ncolor('black');port_label('input',1,'\\fontsize{11pt}\\bf In "
"','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','C"
"OMMENT: end icon text');\nfprintf('','COMMENT: Make no changes above this lin"
"e -- machine generated code. ');\n"
    }
    Block {
      BlockType		      Reference
      Name		      "Gateway In3"
      Ports		      [1, 1]
      Position		      [635, 229, 690, 251]
      ForegroundColor	      "[0.250980, 0.000000, 0.000000]"
      SourceBlock	      "xbsIndex_r4/Gateway In"
      SourceType	      "Xilinx Gateway In Block"
      infoedit		      "Gateway in block.  Converts inputs of type Simu"
"link integer, double and fixed point to  Xilinx fixed point type.<P><P>Hardwa"
"re notes:  In hardware these blocks become top level input ports."
      arith_type	      "Signed  (2's comp)"
      n_bits		      "16"
      bin_pt		      "14"
      period		      "1"
      dbl_ovrd		      off
      timing_constraint	      "None"
      locs_specified	      off
      LOCs		      "{}"
      xl_use_area	      off
      xl_area		      "[0,0,0,0,0,0,0]"
      block_version	      "VER_STRING_GOES_HERE"
      has_advanced_control    "0"
      sggui_pos		      "20,20,425,354"
      block_type	      "gatewayin"
      sg_icon_stat	      "55,22,1,1,white,yellow,0,4bb76ffd"
      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics ');\np"
"atch([0 55 55 0 ],[0 0 22 22 ],[0.95 0.93 0.65]);\npatch([22 18 23 18 22 28 3"
"0 32 38 33 28 25 31 25 28 33 38 32 30 28 22 ],[2 6 11 16 20 20 18 20 20 15 20"
" 17 11 5 2 7 2 2 4 2 2 ],[0.98 0.96 0.92]);\nplot([0 0 55 55 0 ],[0 22 22 0 0"
" ]);\nfprintf('','COMMENT: end icon graphics');\n\nfprintf('','COMMENT: begin"
" icon text ');\ncolor('black');port_label('input',1,'\\fontsize{11pt}\\bf In "
"','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','C"
"OMMENT: end icon text');\nfprintf('','COMMENT: Make no changes above this lin"
"e -- machine generated code. ');\n"
    }
    Block {
      BlockType		      Reference
      Name		      "Gateway In4"
      Ports		      [1, 1]
      Position		      [255, 354, 310, 376]
      ForegroundColor	      "[0.250980, 0.000000, 0.000000]"
      SourceBlock	      "xbsIndex_r4/Gateway In"
      SourceType	      "Xilinx Gateway In Block"
      infoedit		      "Gateway in block.  Converts inputs of type Simu"
"link integer, double and fixed point to  Xilinx fixed point type.<P><P>Hardwa"
"re notes:  In hardware these blocks become top level input ports."
      arith_type	      "Signed  (2's comp)"
      n_bits		      "16"
      bin_pt		      "14"
      period		      "1"
      dbl_ovrd		      off
      timing_constraint	      "None"
      locs_specified	      off
      LOCs		      "{}"
      xl_use_area	      off
      xl_area		      "[0,0,0,0,0,0,0]"
      block_version	      "VER_STRING_GOES_HERE"
      has_advanced_control    "0"
      sggui_pos		      "20,20,425,354"
      block_type	      "gatewayin"
      sg_icon_stat	      "55,22,1,1,white,yellow,0,4bb76ffd"
      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics ');\np"
"atch([0 55 55 0 ],[0 0 22 22 ],[0.95 0.93 0.65]);\npatch([22 18 23 18 22 28 3"
"0 32 38 33 28 25 31 25 28 33 38 32 30 28 22 ],[2 6 11 16 20 20 18 20 20 15 20"
" 17 11 5 2 7 2 2 4 2 2 ],[0.98 0.96 0.92]);\nplot([0 0 55 55 0 ],[0 22 22 0 0"
" ]);\nfprintf('','COMMENT: end icon graphics');\n\nfprintf('','COMMENT: begin"
" icon text ');\ncolor('black');port_label('input',1,'\\fontsize{11pt}\\bf In "
"','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','C"
"OMMENT: end icon text');\nfprintf('','COMMENT: Make no changes above this lin"
"e -- machine generated code. ');\n"
    }
    Block {
      BlockType		      Reference
      Name		      "Gateway Out"
      Ports		      [1, 1]
      Position		      [370, 189, 425, 211]
      ForegroundColor	      "[0.250980, 0.000000, 0.000000]"
      SourceBlock	      "xbsIndex_r4/Gateway Out"
      SourceType	      "Xilinx Gateway Out Block"
      infoedit		      "Gateway out block.  Converts Xilinx fixed point"
" inputs into ouputs of type Simulink integer, double, or fixed point.<P><P>Ha"
"rdware notes:  In hardware these blocks become top level output ports or are "
"discarded, depending on how they are configured."
      hdl_port		      on
      timing_constraint	      "None"
      locs_specified	      off
      LOCs		      "{}"
      xl_use_area	      off
      xl_area		      "[0,0,0,0,0,0,0]"
      block_version	      "VER_STRING_GOES_HERE"
      has_advanced_control    "0"
      sggui_pos		      "451,177,411,338"
      block_type	      "gatewayout"
      sg_icon_stat	      "55,22,1,1,white,yellow,0,f0cec300"
      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics ');\np"
"atch([0 55 55 0 ],[0 0 22 22 ],[0.95 0.93 0.65]);\npatch([22 18 23 18 22 28 3"
"0 32 38 33 28 25 31 25 28 33 38 32 30 28 22 ],[2 6 11 16 20 20 18 20 20 15 20"
" 17 11 5 2 7 2 2 4 2 2 ],[0.98 0.96 0.92]);\nplot([0 0 55 55 0 ],[0 22 22 0 0"
" ]);\nfprintf('','COMMENT: end icon graphics');\n\nfprintf('','COMMENT: begin"
" icon text ');\ncolor('black');port_label('input',1,' ');\ncolor('black');por"
"t_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','"
"COMMENT: end icon text');\nfprintf('','COMMENT: Make no changes above this li"
"ne -- machine generated code. ');\n"
    }
    Block {
      BlockType		      Reference
      Name		      "Gateway Out1"
      Ports		      [1, 1]
      Position		      [1075, 359, 1130, 381]
      ForegroundColor	      "[0.250980, 0.000000, 0.000000]"
      SourceBlock	      "xbsIndex_r4/Gateway Out"
      SourceType	      "Xilinx Gateway Out Block"
      infoedit		      "Gateway out block.  Converts Xilinx fixed point"
" inputs into ouputs of type Simulink integer, double, or fixed point.<P><P>Ha"
"rdware notes:  In hardware these blocks become top level output ports or are "
"discarded, depending on how they are configured."
      hdl_port		      on
      timing_constraint	      "None"
      locs_specified	      off
      LOCs		      "{}"
      xl_use_area	      off
      xl_area		      "[0,0,0,0,0,0,0]"
      block_version	      "VER_STRING_GOES_HERE"
      has_advanced_control    "0"
      sggui_pos		      "388,148,411,338"
      block_type	      "gatewayout"
      sg_icon_stat	      "55,22,1,1,white,yellow,0,f0cec300"
      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics ');\np"
"atch([0 55 55 0 ],[0 0 22 22 ],[0.95 0.93 0.65]);\npatch([22 18 23 18 22 28 3"
"0 32 38 33 28 25 31 25 28 33 38 32 30 28 22 ],[2 6 11 16 20 20 18 20 20 15 20"
" 17 11 5 2 7 2 2 4 2 2 ],[0.98 0.96 0.92]);\nplot([0 0 55 55 0 ],[0 22 22 0 0"
" ]);\nfprintf('','COMMENT: end icon graphics');\n\nfprintf('','COMMENT: begin"
" icon text ');\ncolor('black');port_label('input',1,' ');\ncolor('black');por"
"t_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','"
"COMMENT: end icon text');\nfprintf('','COMMENT: Make no changes above this li"
"ne -- machine generated code. ');\n"
    }
    Block {
      BlockType		      Reference
      Name		      "Gateway Out3"
      Ports		      [1, 1]
      Position		      [1080, 244, 1135, 266]
      ForegroundColor	      "[0.250980, 0.000000, 0.000000]"
      SourceBlock	      "xbsIndex_r4/Gateway Out"
      SourceType	      "Xilinx Gateway Out Block"
      infoedit		      "Gateway out block.  Converts Xilinx fixed point"
" inputs into ouputs of type Simulink integer, double, or fixed point.<P><P>Ha"
"rdware notes:  In hardware these blocks become top level output ports or are "
"discarded, depending on how they are configured."
      hdl_port		      on
      timing_constraint	      "None"
      locs_specified	      off
      LOCs		      "{}"
      xl_use_area	      off
      xl_area		      "[0,0,0,0,0,0,0]"
      block_version	      "VER_STRING_GOES_HERE"
      has_advanced_control    "0"
      sggui_pos		      "388,148,411,338"
      block_type	      "gatewayout"
      sg_icon_stat	      "55,22,1,1,white,yellow,0,f0cec300"
      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics ');\np"
"atch([0 55 55 0 ],[0 0 22 22 ],[0.95 0.93 0.65]);\npatch([22 18 23 18 22 28 3"
"0 32 38 33 28 25 31 25 28 33 38 32 30 28 22 ],[2 6 11 16 20 20 18 20 20 15 20"
" 17 11 5 2 7 2 2 4 2 2 ],[0.98 0.96 0.92]);\nplot([0 0 55 55 0 ],[0 22 22 0 0"
" ]);\nfprintf('','COMMENT: end icon graphics');\n\nfprintf('','COMMENT: begin"
" icon text ');\ncolor('black');port_label('input',1,' ');\ncolor('black');por"
"t_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','"

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