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📄 bpsk_12.mdl

📁 用systerm generation完成BPSK的调制解调过程
💻 MDL
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	      Version		      "1.0.4"
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	      Version		      "1.0.4"
	      TargetFcnLib	      "ansi_tfl_tmw.mat"
	      GenFloatMathFcnCalls    "ANSI_C"
	      UtilityFuncGeneration   "Auto"
	      GenerateFullHeader      on
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    Block {
      BlockType		      Outport
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      BusObject		      "BusObject"
      BusOutputAsStruct	      off
      PortDimensions	      "-1"
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      DataType		      "auto"
      OutDataType	      "sfix(16)"
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      SignalType	      "auto"
      SamplingMode	      "auto"
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      LimitDataPoints	      on
      MaxDataPoints	      "5000"
      Decimation	      "1"
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      SampleTime	      "0"
    }
    Block {
      BlockType		      "S-Function"
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      PortCounts	      "[]"
    }
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      TimeSource	      "Use simulation time"
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    Block {
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  LineDefaults {
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  System {
    Name		    "bpsk_12"
    Location		    [2, 82, 1014, 704]
    Open		    on
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    ModelBrowserWidth	    200
    ScreenColor		    "white"
    PaperOrientation	    "landscape"
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    PaperUnits		    "centimeters"
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      Tag		      "genX"
      Ports		      []
      Position		      [829, 446, 880, 496]
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      AttributesFormatString  "System\\nGenerator"
      UserDataPersistent      on
      UserData		      "DataTag0"
      SourceBlock	      "xbsIndex_r4/ System Generator"
      SourceType	      "Xilinx System Generator"
      ShowPortLabels	      on
      xilinxfamily	      "Virtex4"
      part		      "xc4vsx35"
      speed		      "-10"
      package		      "ff668"
      synthesis_tool	      "XST"
      directory		      "./netlist"
      testbench		      off
      simulink_period	      "1/128"
      sysclk_period	      "10"
      incr_netlist	      off
      trim_vbits	      "Everywhere in SubSystem"
      dbl_ovrd		      "According to Block Masks"
      core_generation	      "According to Block Masks"
      run_coregen	      off
      deprecated_control      off
      eval_field	      "0"
      block_type	      "sysgen"
    }
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      Ports		      [1, 1]
      Position		      [525, 179, 605, 221]
      SourceBlock	      "commchan2/AWGN\nChannel"
      SourceType	      "AWGN Channel"
      ShowPortLabels	      on
      seed		      "67"
      noiseMode		      "Signal to noise ratio  (Eb/No)"
      EbNodB		      "10"
      EsNodB		      "10"
      SNRdB		      "10"
      bitsPerSym	      "1"
      Ps		      "1"
      Tsym		      "1"
      variance		      "1"
    }
    Block {
      BlockType		      Reference
      Name		      "Comparator"
      Ports		      [1, 1]
      Position		      [925, 270, 1050, 330]
      SourceBlock	      "xbsIndex_r4/MCode"
      SourceType	      "Xilinx MCode block Block"
      infoedit		      "Pass input values to a MATLAB function for eval"
"uation in Xilinx fixed-point type. The input ports of the block are input arg"
"uments of the function. The output ports of the block are output arguments of"
" the function."
      mfname		      "BPSKcompa"
      explicit_period	      on
      period		      "1"
      dbl_ovrd		      off
      enable_debug	      off
      xl_use_area	      off
      xl_area		      "[0,0,0,0,0,0,0]"

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