📄 viterbi_equalization_bpsk.mdl
字号:
SourceType "Buffer"
N "1"
V "0"
ic "0"
}
Block {
BlockType Reference
Name "Buffer3"
Ports [1, 1]
Position [710, 220, 735, 270]
SourceBlock "dspbuff3/Buffer"
SourceType "Buffer"
N "1"
V "0"
ic "0"
}
Block {
BlockType Reference
Name "Buffer4"
Ports [1, 1]
Position [755, 405, 780, 455]
NamePlacement "alternate"
SourceBlock "dspbuff3/Buffer"
SourceType "Buffer"
N "1"
V "0"
ic "0"
}
Block {
BlockType Display
Name "Display"
Ports [1]
Position [990, 229, 1080, 291]
Decimation "1"
Lockdown off
}
Block {
BlockType Reference
Name "Error Rate\nCalculation"
Ports [2, 1]
Position [895, 232, 970, 283]
SourceBlock "commsink2/Error Rate\nCalculation"
SourceType "Error Rate Calculation"
N "0"
st_delay "32"
cp_mode "Entire frame"
subframe "[]"
PMode "Port"
WsName "ErrorVec"
RsMode2 off
stop on
numErr "200"
maxBits "1e5"
}
Block {
BlockType Scope
Name "I-channel signals"
Ports [3]
Position [985, 74, 1045, 196]
BackgroundColor "cyan"
Floating off
Location [39, 112, 642, 571]
Open off
NumInputPorts "3"
ZoomMode "xonly"
List {
ListType AxesTitles
axes1 "Transmitted"
axes2 "Received"
axes3 "Equalized"
}
TimeRange "400"
YMin "-1.5~-3~-1.5"
YMax "1.5~3~1.5"
DataFormat "StructureWithTime"
SampleTime "0"
}
Block {
BlockType Reference
Name "Integer Delay"
Ports [1, 1]
Position [870, 78, 905, 112]
BackgroundColor "cyan"
SourceBlock "simulink/Discrete/Integer Delay"
SourceType "Integer Delay"
vinit "0.0"
samptime "-1"
NumDelays "32"
}
Block {
BlockType Reference
Name "Integer Delay1"
Ports [1, 1]
Position [815, 413, 850, 447]
NamePlacement "alternate"
SourceBlock "simulink/Discrete/Integer Delay"
SourceType "Integer Delay"
vinit "0.0"
samptime "-1"
NumDelays "32"
}
Block {
BlockType Reference
Name "Integer Delay2"
Ports [1, 1]
Position [670, 118, 705, 152]
BackgroundColor "cyan"
SourceBlock "simulink/Discrete/Integer Delay"
SourceType "Integer Delay"
vinit "0.0"
samptime "-1"
NumDelays "32"
}
Block {
BlockType Reference
Name "Multipath channel"
Ports [1, 1]
Position [320, 219, 390, 271]
BackgroundColor "yellow"
DropShadow on
DialogController "dspdialog.DigitalFilter"
DialogControllerArgs "DataTag0"
SourceBlock "dsparch4/Digital Filter"
SourceType "Digital Filter"
TypePopup "FIR (all zeros)"
IIRFiltStruct "Direct form II transposed"
AllPoleFiltStruct "Direct form"
FIRFiltStruct "Direct form"
CoeffSource "Specify via dialog"
NumCoeffs "[1 1/sqrt(2)]"
DenCoeffs "[1 0.1]"
BiQuadCoeffs "[1 0.3 0.4 1 0.1 0.2]"
LatticeCoeffs "[0.2 0.4]"
denIgnore on
FiltPerSampPopup "One filter per frame"
IC "0"
ICnum "0"
ICden "0"
additionalParams off
allowOverrides on
showCoeff off
firstCoeffMode "Same word length as input"
firstCoeffWordLength "16"
firstCoeffFracLength "15"
secondCoeffMode "Same as numerator"
secondCoeffWordLength "16"
secondCoeffFracLength "15"
thirdCoeffMode "Same as input"
thirdCoeffWordLength "16"
thirdCoeffFracLength "15"
showOut off
outputMode "Same as accumulator"
outputWordLength "16"
outputFracLength "15"
showAcc off
accumMode "Same as product output"
accumWordLength "32"
accumFracLength "30"
showMpy off
prodOutputMode "Same as input"
prodOutputWordLength "32"
prodOutputFracLength "30"
showMem off
memoryMode "Same as accumulator"
memoryWordLength "16"
memoryFracLength "15"
roundingMode "Floor"
overflowMode off
ScaleValues "1"
scaleValueFracLength "14"
tapSumMode "Same as input"
tapSumWordLength "32"
tapSumFracLength "30"
stageIOMode "Same as input"
stageIOWordLength "16"
stageInFracLength "15"
stageOutFracLength "15"
LockScale off
FilterSource "Specify via dialog"
dfiltObjectName "dfilt.dffir([1 2 1])"
multiplicandMode "Same as output"
multiplicandWordLength "32"
multiplicandFracLength "30"
}
Block {
BlockType Reference
Name "Random Integer\nGenerator"
Ports [0, 1]
Position [70, 223, 150, 267]
FontName "Arial"
SourceBlock "commrandsrc2/Random Integer\nGenerator"
SourceType "Random Integer Generator"
ShowPortLabels on
SystemSampleTime "-1"
FunctionWithSeparateData off
RTWMemSecFuncInitTerm "Inherit from model"
RTWMemSecFuncExecute "Inherit from model"
RTWMemSecDataConstants "Inherit from model"
RTWMemSecDataInternal "Inherit from model"
RTWMemSecDataParameters "Inherit from model"
mul "2"
seed "37123"
Ts "1"
frameBased on
sampPerFrame "1"
orient off
outDataType "double"
}
Block {
BlockType Reference
Name "VIterbi Equalizer\nTraceback Length = 32"
Ports [1, 1]
Position [535, 215, 620, 275]
BackgroundColor "yellow"
DropShadow on
SourceBlock "commeq2/MLSE Equalizer"
SourceType "MLSE Equalizer"
specchan "Dialog"
chancoeff "[1/sqrt(2) 1/sqrt(2)]'"
constpts "[-1 1]"
tbdepth "32"
opmode "Continuous with reset option"
enpreamble off
preamble "[0 3 2 1]"
enpostamble off
postamble "[0 2 3 1]"
numsamp "1"
reset off
}
Line {
SrcBlock "BPSK\nModulator\nBaseband"
SrcPort 1
Points [5, 0]
Branch {
DstBlock "Multipath channel"
DstPort 1
}
Branch {
Points [0, -150]
DstBlock "Buffer2"
DstPort 1
}
}
Line {
SrcBlock "Random Integer\nGenerator"
SrcPort 1
Points [15, 0]
Branch {
Points [0, 185]
DstBlock "Buffer4"
DstPort 1
}
Branch {
DstBlock "BPSK\nModulator\nBaseband"
DstPort 1
}
}
Line {
SrcBlock "Multipath channel"
SrcPort 1
DstBlock "AWGN\nChannel"
DstPort 1
}
Line {
SrcBlock "VIterbi Equalizer\nTraceback Length = 32"
SrcPort 1
Points [15, 0]
Branch {
Points [0, 140]
DstBlock "After Equalizer"
DstPort 1
}
Branch {
Points [0, 0]
Branch {
Points [0, -70]
DstBlock "Buffer1"
DstPort 1
}
Branch {
DstBlock "Buffer3"
DstPort 1
}
}
}
Line {
SrcBlock "AWGN\nChannel"
SrcPort 1
Points [15, 0]
Branch {
DstBlock "VIterbi Equalizer\nTraceback Length = 32"
DstPort 1
}
Branch {
Points [0, 70]
DstBlock "Before Equalizer"
DstPort 1
}
Branch {
Points [0, -110]
DstBlock " "
DstPort 1
}
}
Line {
SrcBlock " "
SrcPort 1
DstBlock "I-channel signals"
DstPort 1
}
Line {
SrcBlock "Buffer1"
SrcPort 1
DstBlock " "
DstPort 1
}
Line {
SrcBlock "Buffer2"
SrcPort 1
DstBlock "Integer Delay"
DstPort 1
}
Line {
SrcBlock "Integer Delay"
SrcPort 1
DstBlock " "
DstPort 1
}
Line {
SrcBlock "BPSK\nDemodulator\nBaseband"
SrcPort 1
DstBlock "Error Rate\nCalculation"
DstPort 1
}
Line {
SrcBlock "Buffer3"
SrcPort 1
DstBlock "BPSK\nDemodulator\nBaseband"
DstPort 1
}
Line {
SrcBlock "Buffer4"
SrcPort 1
DstBlock "Integer Delay1"
DstPort 1
}
Line {
SrcBlock "Error Rate\nCalculation"
SrcPort 1
DstBlock "Display"
DstPort 1
}
Line {
SrcBlock "Integer Delay1"
SrcPort 1
Points [10, 0; 0, -160]
DstBlock "Error Rate\nCalculation"
DstPort 2
}
Line {
SrcBlock " "
SrcPort 1
DstBlock "Integer Delay2"
DstPort 1
}
Line {
SrcBlock " "
SrcPort 1
DstBlock "I-channel signals"
DstPort 3
}
Line {
SrcBlock " "
SrcPort 1
DstBlock "I-channel signals"
DstPort 2
}
Line {
SrcBlock "Integer Delay2"
SrcPort 1
DstBlock " "
DstPort 1
}
Annotation {
Name "Matlab Experiment on Viterbi equalization:\nCom"
"plex baseband model of BPSK modulation \nover a multipath channel with AWGN a"
"t Receiver\n \n Spring 2008 - Donga University"
Position [309, 373]
UseDisplayTextAsClickCallback off
FontName "Arial"
FontSize 12
FontWeight "bold"
}
}
}
MatData {
NumRecords 1
DataRecord {
Tag DataTag0
Data " %)30 . , 8 ( ! % "
"\" $ \" 0 0 ( 6UT "
}
}
⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -