decoder.vhd

来自「实现一个能显示时,分,秒,可设置闹钟的电子种,数码管显示时间」· VHDL 代码 · 共 26 行

LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
ENTITY DECODER IS
PORT(SEG:IN STD_LOGIC_VECTOR(3 DOWNTO 0);
     Q3:OUT STD_LOGIC_VECTOR(6 DOWNTO 0));
END DECODER;
ARCHITECTURE BEHAVIORAL OF DECODER IS
  BEGIN
  PROCESS(SEG)
    BEGIN
    CASE SEG IS
       WHEN "0000"=>Q3<="1000000";
       WHEN "0001"=>Q3<="1111001";
       WHEN "0010"=>Q3<="0100100";
       WHEN "0011"=>Q3<="0110000";
       WHEN "0100"=>Q3<="0011001";
       WHEN "0101"=>Q3<="0010010";
       WHEN "0110"=>Q3<="0000010";
       WHEN "0111"=>Q3<="1111000";
       WHEN "1000"=>Q3<="0000000";
       WHEN "1001"=>Q3<="0010000";
       WHEN OTHERS=>Q3<="0000000";
    END CASE;
  END PROCESS;
END BEHAVIORAL;