📄 main.lst
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C51 COMPILER V8.05a MAIN 01/24/2008 22:29:34 PAGE 1
C51 COMPILER V8.05a, COMPILATION OF MODULE MAIN
OBJECT MODULE PLACED IN main.OBJ
COMPILER INVOKED BY: C:\Keil\C51\BIN\C51.EXE main.c LARGE OMF2 BROWSE DEBUG
line level source
1 //------------------------------------------------------------------------------
2 // main.c
3 //------------------------------------------------------------------------------
4 // Copyright (C) 2005 Silicon Laboratories, Inc.
5 //
6 // Date: 05/15/06 13:38:34
7 // Target: C8051F34x
8 //
9 // Description:
10 // This file contains the main routine, MCU initialization code, and
11 // callback functions used by the TCP/IP Library.
12 //
13 // Generated by TCP/IP Configuration Wizard Version 3
14 //
15 #include "mn_userconst.h" // TCP/IP Library Constants
16 #include "mn_stackconst.h" // TCP/IP Library Constants
17 #include "mn_errs.h" // Library Error Codes
18 #include "mn_defs.h" // Library Type definitions
19 #include "mn_funcs.h" // Library Function Prototypes
20 #include "VFILE_DIR\index.h"
21 #include <c8051F340.h> // Device-specific SFR Definitions
22
23
24 //------------------------------------------------------------------------------
25 // Function Prototypes
26 //------------------------------------------------------------------------------
27
28 // Initialization Routines
29 void PORT_Init (void);
30 void SYSCLK_Init (void);
31 void EMIF_Init(void);
32 int establish_network_connection();
33
34 //-----------------------------------------------------------------------------
35 // Main Routine
36 //-----------------------------------------------------------------------------
37 void main(void)
38 {
39 1
40 1 // Disable watchdog timer
41 1 PCA0MD = 0x00;
42 1
43 1 // Initialize the MCU
44 1 PORT_Init();
45 1 SYSCLK_Init();
46 1
47 1 EMIF_Init();
48 1
49 1 while(1)
50 1 {
51 2 // Initialize the TCP/IP stack.
52 2 if (mn_init() < 0)
53 2 {
54 3 // If code execution enters this while(1) loop, the stack failed to initialize.
55 3 // Verify that all boards are connected and powered properly.
C51 COMPILER V8.05a MAIN 01/24/2008 22:29:34 PAGE 2
56 3 while(1);
57 3 }
58 2
59 2 // Connect to the network
60 2 establish_network_connection();
61 2
62 2 // Add web page to virtual file system.
63 2 // The main page MUST be called index.htm or index.html.
64 2 mn_vf_set_entry((byte *)"index.html", INDEX_SIZE, index_html, VF_PTYPE_FLASH);
65 2
66 2 // Start the Application Layer Services.
67 2 mn_server();
68 2
69 2 }
70 1 }
71
72 //-----------------------------------------------------------------------------
73 // establish_network_connection
74 //-----------------------------------------------------------------------------
75 //
76 // This function calls mn_ether_init() to initialize the CP2200 and attach to
77 // the network.
78 //
79 // If there is a network connection, the function returns 1.
80 //
81 // If there is no network connection, the function waits until either a
82 // connection appears or the CP2200 is reset before calling mn_ether_init()
83 // again. (The application may perform other tasks while polling
84 // link_status and ether_reset).
85 //
86 int establish_network_connection()
87 {
88 1 int retval;
89 1
90 1 do
91 1 {
92 2 // mn_ether_init() initializes the Ethernet controller.
93 2 // AUTO_NEG indicates that the controller will auto-negotiate.
94 2 retval = mn_ether_init(AUTO_NEG, 3, 0);
95 2
96 2 // If there is no link, poll link_status until it sets or the
97 2 // CP2200 resets and then call mn_ether_init() again.
98 2 if (retval == LINK_FAIL)
99 2 {
100 3 while(!link_status && !ether_reset);
101 3 }
102 2
103 2 // If retval is less than zero and is not AUTO_NEG_FAIL, there is a
104 2 // hardware error.
105 2 else if ((retval < 0) && (retval != AUTO_NEG_FAIL))
106 2 {
107 3 // Verify that the Ethernet controller is connected and powered properly.
108 3 // Verity that the EMIF has been configured at a speed compatible with the
109 3 // Ethernet controller.
110 3 while(1);
111 3 }
112 2
113 2 }while((retval < 0) && (retval != AUTO_NEG_FAIL));
114 1
115 1 return (1);
116 1
117 1 }
C51 COMPILER V8.05a MAIN 01/24/2008 22:29:34 PAGE 3
118
119
120
121 //-----------------------------------------------------------------------------
122 // Initialization Routines
123 //-----------------------------------------------------------------------------
124
125 //-----------------------------------------------------------------------------
126 // PORT_Init
127 //-----------------------------------------------------------------------------
128 //
129 // Configure the Interrupts, Crossbar and GPIO ports
130 //
131 void PORT_Init (void)
132 {
133 1
134 1 IT01CF = 0x03; // Enable Interrupt 0 on P0.3
135 1 TCON &= ~0x01; // Make /INT0 level triggered
136 1
137 1 XBR0 = 0x01; // Enable UART on P0.4(TX) and P0.5(RX)
138 1 XBR1 = 0x40; // Enable crossbar and enable
139 1 // weak pull-ups
140 1
141 1 P0MDOUT |= 0x10; // enable UTX as push-pull output
142 1 P1MDOUT |= 0xD8; // /WR and /RD are push-pull
143 1 // AB4 LEDs are push-pull
144 1 P2MDOUT |= 0xFF;
145 1 P3MDOUT |= 0xFF;
146 1 P4MDOUT |= 0xFF;
147 1
148 1 }
149 //-----------------------------------------------------------------------------
150 // EMIF_Init
151 //-----------------------------------------------------------------------------
152 //
153 // Configure the External Memory Interface for both on and off-chip access.
154 //
155 void EMIF_Init (void)
156 {
157 1
158 1 EMI0CF = 0x1B; // non-muxed mode; split mode ０B为复用，１B为非复用方式
159 1 // with bank select
160 1
161 1 // EMI0TC = EMIF_TIMING; // This constant may be modified
162 1 // according to SYSCLK to meet the
163 1 // timing requirements for the CP2200
164 1
165 1 EMI0CN = BASE_ADDRESS; // Page of XRAM accessed by EMIF
166 1
167 1 }
168
169 //-----------------------------------------------------------------------------
170 // SYSCLK_Init
171 //-----------------------------------------------------------------------------
172 //
173 // This routine initializes the system clock.
174 //
175 void SYSCLK_Init (void)
176 {
177 1 int i;
178 1
179 1 OSCICN |= 0x03; // Configure internal oscillator for
C51 COMPILER V8.05a MAIN 01/24/2008 22:29:34 PAGE 4
180 1 // its maximum frequency
181 1
182 1 CLKMUL = 0x00; // Reset Clock Multiplier and select
183 1 // internal oscillator as input source
184 1
185 1 CLKMUL |= 0x80; // Enable the Clock Multiplier
186 1
187 1 for(i = 0; i < 256; i++); // Delay at least 5us
188 1
189 1 CLKMUL |= 0xC0; // Initialize the Clock Multiplier
190 1
191 1 while(!(CLKMUL & 0x20)); // Wait for MULRDY => 1
192 1
193 1 RSTSRC = 0x06; // Enable missing clock detector
194 1 // and VDD monitor
195 1
196 1 FLSCL |= 0x10; // Set Flash Scale for 48MHz
197 1
198 1 CLKSEL |= 0x03; // Select output of clock multiplier
199 1 // as the system clock.
200 1
201 1 }
202
203 //-----------------------------------------------------------------------------
204 // ether_reset_low
205 //-----------------------------------------------------------------------------
206 //
207 // This routine drives the reset pin of the ethernet controller low.
208 //
209 void ether_reset_low()
210 {
211 1
212 1 P1 &= ~0x01; // Pull reset low
213 1
214 1 }
215
216 //-----------------------------------------------------------------------------
217 // ether_reset_high
218 //-----------------------------------------------------------------------------
219 //
220 // This routine places the reset pin in High-Z allowing it to be pulled up
221 // using the external pull-up resistor.
222 //
223 // Additionally, this routine waits for the reset pin to read high before
224 // exiting.
225 //
226 void ether_reset_high (void)
227 {
228 1
229 1 P1 |= 0x01; // Allow /RST to rise
230 1 while(!(P1 & 0x01)); // Wait for /RST to go high
231 1
232 1
233 1 }
MODULE INFORMATION: STATIC OVERLAYABLE
CODE SIZE = 211 ----
CONSTANT SIZE = 11 ----
XDATA SIZE = ---- ----
PDATA SIZE = ---- ----
DATA SIZE = ---- ----
C51 COMPILER V8.05a MAIN 01/24/2008 22:29:34 PAGE 5
IDATA SIZE = ---- ----
BIT SIZE = ---- ----
EDATA SIZE = ---- ----
HDATA SIZE = ---- ----
XDATA CONST SIZE = ---- ----
FAR CONST SIZE = ---- ----
END OF MODULE INFORMATION.
C51 COMPILATION COMPLETE. 0 WARNING(S), 0 ERROR(S)
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