rom_test.c.bak

uboot底层驱动

#include "my_printf.h"


#define READ_REG(addr)  ((unsigned int)*(volatile  char *)(addr))
#define WRITE_REG(addr, data)  ((unsigned int)(*(volatile char *)(addr)) = (data))

int ERR = 0;

int adrr_test(int addr_base, int addr_end)
{
	int i = 0;
	int count = addr_end / ERASEBLOCKSIZE + 1; 
	for (; i < count; i++)
	{
		NorFlash_unlock(addr_base + i*ERASEBLOCKSIZE);
		NorFlash_blockerase(addr_base + i*ERASEBLOCKSIZE);
	}
        for (i = 0; i<addr_end; i++, i++)
		NorFlash_write(addr_base+i, i);
	for (i=0; i<addr_end; i++,i++)
		if ( i != NorFlash_read(addr_base + i) )
		{
			my_printf("addr bus error\n\r");
			ERR = 1;
		}
}
	

int flash_test(int addr_base)
{
	int i = 0;
	int j = 0;
	int erase_count;
	do {
		if ( (erase_count = i / ERASEBLOCKSIZE) > j)
		{
			j++;
			NorFlash_unlock(addr_base + erase_count*ERASEBLOCKSIZE);
			NorFlash_blockerase(addr_base + erase_count*ERASEBLOCKSIZE);
 		}
		NorFlash_write(addr_base+i, 0x5555);
		NorFlash_write(addr_base+i+2, 0xaaaa);
		if ( NorFlash_read(addr_base+i) != 0x5555 )
		{
			if ( NorFlash_read(addr_base+i) == 0xffff )
			{
				addr_test(addr_base, i+1+1);
				if ( 1== ERR )
					return 1;
				my_printf("sdram 0x%x\r\n", i+1+1);	
				return 0;
			}
			else
				ERR = 1;
		}
		NorFlash_write(addr_base+i, 0xaaaa);
		NorFlash_write(addr_base+i+2, 0x5555);
		if ( NorFlash_read(addr_base+i) != 0xaaaa )
			ERR = 1;
		if ( 1==ERR) 
		{
			my_printf("sdram or data bus error\r\n");
		}
		i++;
		i++;
	} while (1);
}