📄 ha_ac97.c

📁 基于东南大学开发的SEP3203的ARM7中的所有驱动
💻 C
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/********************************************************************************************
*filename:		HA_AC97.c						
*author:		JIE.XU	
*create date:		2003-7-1 14:17                                                                      
*description:	    	The file consists of the function used to config AC97                                                               
*modify history:	                                                                      
*misc:           
********************************************************************************************/
#include "HA_typedef.h"
#include "HA_AC97.h"
#include "hardware.h"
#include "M68328.h"
#include "systsk.h"
//#include "HA_Dmac.h"
#include "gfd_usb_irq.h"

#define FNUM 200
extern 	char decbuf[];
//extern  unsigned int frame10[];
//extern  unsigned int frame11[];

unsigned int frame10[];
unsigned int frame11[];

unsigned int outbyte;
unsigned int de_addr;
//extern int base;
int base;

int volume;

U32 cnt=0;

U32 status;

int ii;
extern nframe;
extern U32 usbdmapp;
U32 dmatime=0;

U32 config_flag=0;
U32	play_flag=0; 

extern void init_Pen(void);

void ConfigurationCodec_MUTE(int i)
{
	
int volume=16;
//_________________________________________________________________
//**********open Master Volume Register,ADDR: 02H
	 *(RP)AC97_CRAC=WRITE+ 0x20000 + 0x8000;		//0dB attenuation
	do{}while(!OVER_WRITE);

//_________________________________________________________________
//**********open Master Volume MONO,ADDR:06H
	// *(RP)AC97_CRAC=WRITE + 0x60000 + 0x0;		//0dB attenuation
   // do{}while(!OVER_WRITE);


//_________________________________________________________________
//*********open MIC Volume,ADDR:0eH
	*(RP)AC97_CRAC=WRITE + 0xe0000 + 0x8;		//0dB attenuation
	do{}while(!OVER_WRITE);


//_________________________________________________________________
//*********open AUX Volume,ADDR:16H
//	 *(RP)AC97_CRAC=WRITE + 0x160000 + 0x808;		//0dB attenuation	
//	do{}while(!OVER_WRITE);

//________________________________________________________________
//********open PCM Out Volume,ADDR:18H
	// *(RP)AC97_CRAC=WRITE + 0x180000 + 0x808;		//0dB attenuation	
	//do{}while(!OVER_WRITE);
//*(RP)AC97_CRAC=WRITE + 0x6a0000 + 0x50;		//0dB attenuation
	//do{}while(!OVER_WRITE);

//________________________________________________________________
//********open Extend Audio Status and Control Register,ADDR:2AH
	if(i)
		{
		*(RP)AC97_CRAC=WRITE + 0x2a0000 + 0x0;		//	fixed sample
		do{}while(!OVER_WRITE);
		}
	else
		{
		*(RP)AC97_CRAC=WRITE + 0x2a0000 + 0x1;		//	VRA sample
		do{}while(!OVER_WRITE);
		
		//PCM DAC Rate,ADDR:2CH.  For example :1b80:7040Hz
		//*(RP)AC97_CRAC=WRITE +0x2c0000 + 0x1b80;
		*(RP)AC97_CRAC=WRITE +0x2c0000 + 0xac44;//ke bian
		do{}while(!OVER_WRITE);

		//PCM ADC Rate,ADDR:32H.  For example :1b80:7040Hz
		//*(RP)AC97_CRAC=WRITE +0x320000 + 0x1b80;
		//*(RP)AC97_CRAC=WRITE +0x320000 + 0xac44;
		//do{}while(!OVER_WRITE);
		}






}

void ConfigurationCodec(int i)
{

//_________________________________________________________________
//**********open Master Volume Register,ADDR: 02H
	 //*(RP)AC97_CRAC=WRITE+ 0x20000 + 0x8000;		//0dB attenuation
	//do{}while(!OVER_WRITE);

//_________________________________________________________________
//**********open Master Volume MONO,ADDR:06H
	// *(RP)AC97_CRAC=WRITE + 0x60000 + 0x0;		//0dB attenuation
   // do{}while(!OVER_WRITE);


//_________________________________________________________________
//*********open MIC Volume,ADDR:0eH
	//*(RP)AC97_CRAC=WRITE + 0xe0000 + 0x8;		//0dB attenuation
	//do{}while(!OVER_WRITE);


//_________________________________________________________________
//*********open AUX Volume,ADDR:16H
//	 *(RP)AC97_CRAC=WRITE + 0x160000 + 0x808;		//0dB attenuation	
//	do{}while(!OVER_WRITE);

//________________________________________________________________
//********open PCM Out Volume,ADDR:18H
	// *(RP)AC97_CRAC=WRITE + 0x180000 + 0x808;		//0dB attenuation	
	//do{}while(!OVER_WRITE);
	*(RP)AC97_CRAC=WRITE + 0x6a0000 + 0x50;		//head phone 
	do{}while(!OVER_WRITE);

	*(RP)AC97_CRAC=WRITE + 0x2a0000 + 0x1;		//	VRA sample
	do{}while(!OVER_WRITE);	
	
	*(RP)AC97_CRAC=WRITE +0x2c0000 + 0xac44;//ke bian
	do{}while(!OVER_WRITE);	

//________________________________________________________________
//********open Extend Audio Status and Control Register,ADDR:2AH

}


void ConfigurationAC97(int i)
{
	if (i)
		{
	
		*(RP)AC97_OCR=0x00010001;	//open L/R channel,and set fixed sample rate	
		*(RP)AC97_ICR=0x00000000;		//open Input channel,and set fixed sample rate	
		}
	else
		{
		*(RP)AC97_OCR=0x00030003;	//open L/R channel,and set variable sample rate	
		*(RP)AC97_ICR=0x00000000;		//open Input channel,and set variable sample rate	
		}

	//_________________________________________________________________
	//**********configure the register INT_ENABLE
	*(RP)AC97_INT_ENABLE=0xbf;	//open all the interrupt

	//_________________________________________________________________
	//**********configure the register AC97_ENABLE for open modual AC97
	*(RP)AC97_ENABLE=0x1;
	
}

void InitAC97(void)
{
	int i=0;
	//volume = 30;
//_________________________________________________________________
//*********Reset AC97
#ifdef SERIES4 
	*(RP)AC97_CONR=0X13;	
	
	
//_________________________________________________________________
//**********Reset Codec 
	//*(RP)AC97_CRAC=WRITE + 0x0 + 0x1;
	//do{}while(!OVER_WRITE);
	do{
		*(RP)AC97_CRAC=WRITE + 0x0 + 0x1;
		do{
			i++;
		
		}while( (!OVER_WRITE)&&(i<100) );
		i = 0;
	}while(!OVER_WRITE);
#endif
//_________________________________________________________________
//************configure Codec,	
//Note: first configure Codec,then AC97;

	ConfigurationCodec(VRA_SAMPLE);
	//ConfigurationCodec_MUTE(VRA_SAMPLE);
	
	ConfigurationAC97(VRA_SAMPLE);


//_________________________________________________________________
//**********configure the register INT_CLEAR
		if (*(RP)AC97_INT_STATUS!=0x0)
		{
		*(RP)AC97_INT_CLEAR=0x1;	//after writing in INT_CLEAR,INT_STATUS must be zero
		}

}


void AC97self_adjust(void)
{
	irq_enable(INT_DMA);
	unmask_irq(INT_DMA);	
	
	*(RP)DMA_SA=(int)base;
	*(RP)DMA_DA=AC97_OUT_FIFOADDR;
	*(RP)DMA_CTRL=0x14ad | ( (0x1200)<<12 );
	*(RP)DMA_ENABLE=0x2003;

	InitAC97();
}

void ConfigureDMA_Output()
{
	
	outbyte = frame11[ii&DBUFFRAMENUM];//outbyte = frame11[ii%BUFFRAMENUM];
	/*test*/
	//memset(((int)base+outbyte), 0xaa, 0x1200);
	
	*(RP)DMA_SA=(int)base+(outbyte); //for mma
	*(RP)DMA_DA=AC97_OUT_FIFOADDR;
	*(RP)DMA_CTRL=0x14ad | ( (frame10[ii&DBUFFRAMENUM])<<12 );//*(RP)DMA_CTRL=0x14ad | ( (frame10[ii%BUFFRAMENUM])<<12 );
	*(RP)DMA_ENABLE=0x2003;//dor interrupt real
	ii++;
}

void ConfigureDMA_Input()
{
	*(RP)DMA_SA=AC97_MONO_FIFOADDR;
	*(RP)DMA_DA=0x81003000;
	*(RP)DMA_CTRL=0x92040200;;
	*(RP)DMA_ENABLE=0x1;
	
}	



void InitDMA()
{
	U32 Input_Output=1;
//_________________________________________________________________
//*********configure DMA

	if (Input_Output)
		{
		ConfigureDMA_Output();
		}
	else
		{
		ConfigureDMA_Input();
		}
	

}

void InitAC97_mp3(void)
{
	int i=0;
//_________________________________________________________________
//*********Reset AC97
#ifdef SERIES4 
	*(RP)AC97_CONR=0X12;	
	
	
//_________________________________________________________________
//**********Reset Codec 
	do{
		*(RP)AC97_CRAC=WRITE + 0x0 + 0x1;
		do{
			i++;
		
		}while( (!OVER_WRITE)&&(i<100) );
		i = 0;
	}while(!OVER_WRITE);
		
#endif
//_________________________________________________________________
//************configure Codec,	
//Note: first configure Codec,then AC97;

	ConfigurationCodec(VRA_SAMPLE);
	ConfigurationAC97(VRA_SAMPLE);


//_________________________________________________________________
//**********configure the register INT_CLEAR
		if (*(RP)AC97_INT_STATUS!=0x0)
		{
		*(RP)AC97_INT_CLEAR=0x1;	//after writing in INT_CLEAR,INT_STATUS must be zero
		}
}


void Enquire_INT(void)
{


	//__________________________________________________________________
	//**********enquire the register AC97_INT_STATUS,and close corresponding channel.
	
						//clear the register AC97_INT_STATUS
		
		if ( ( (*(RP)AC97_INT_STATUS & L_OVERFLOW)!=0 )	|| ( (*(RP)AC97_INT_STATUS & L_DOWNFLOW)!=0) )
			{
			
				*(RP)AC97_OCR &= CLOSE_L;
			}
		
		if (( (*(RP)AC97_INT_STATUS & R_OVERFLOW)!=0 )	|| ( (*(RP)AC97_INT_STATUS & R_DOWNFLOW)!=0) )
			{
				*(RP)AC97_OCR &= CLOSE_R;
			}
		
		if (( (*(RP)AC97_INT_STATUS & MIC_OVERFLOW)!=0 )	|| ( (*(RP)AC97_INT_STATUS & MIC_DOWNFLOW)!=0) )
			{
				*(RP)AC97_ICR &= CLOSE_MIC;
			}
		
		*(RP)AC97_INT_CLEAR=0x1;
		
		
}



void ac97_handler_buffer(void)
{

			
		*(RP)DMACIntTCClear=0X01;
		*(RP)DMACIntTCClear=0X0;
		
		if(!config_flag)
		{
			status=*(RP)AC97_INT_STATUS;
			if(!status)
			{
				config_flag=1;
				init_Pen();	
			}
			else
			{
				*(RP)AC97_INT_CLEAR=0x1;
				
				cnt++;
								
				*(RP)DMA_SA=(int)base;
				*(RP)DMA_DA=AC97_OUT_FIFOADDR;
				*(RP)DMA_CTRL=0x14ad | ( (0x1200)<<12 );
				*(RP)DMA_ENABLE=0x2003;
				InitAC97();
			
			}
		}
		
		else
		{
			
			/*zb,05.08.30*/
			/**(RP)AC97_CRAC=WRITE + 0x6a0000 + 0x50;		//head phone 
			do{}while(!OVER_WRITE);
			*(RP)AC97_CRAC=WRITE+ 0x20000 + 0x0808;		//0dB attenuation
			do{}while(!OVER_WRITE);*/
			
			outbyte = frame11[ii&DBUFFRAMENUM];//outbyte = frame11[ii%BUFFRAMENUM];
			/*test*/
			//memset(((int)base+outbyte), 0xaa, 0x1200);
			
			*(RP)DMA_SA=(int)base+(outbyte); //for mma
			*(RP)DMA_DA=AC97_OUT_FIFOADDR;
			*(RP)DMA_CTRL=0x14ad | ( (frame10[ii&DBUFFRAMENUM])<<12 );//*(RP)DMA_CTRL=0x14ad | ( (frame10[ii%BUFFRAMENUM])<<12 );
			if((frame10[ii&DBUFFRAMENUM]) !=0x1200)//if((frame10[ii%BUFFRAMENUM]) !=0x1200)
			{
				*(RP)DMA_CTRL=0x14ad | ( 0x1200<<12 );
			}
			*(RP)DMA_ENABLE=0x2003;//dor interrupt real

			ii++;
			if( ( (ii&DBUFFRAMENUM) == 0)&&(ii>0) )//if( ( ii%BUFFRAMENUM  == 0)&&( ii>0 ) )
			{
				set_flg( BUF_DMA_EVENT, BUF_DMA_FLG );
				outbyte = frame11[ii&DBUFFRAMENUM];//outbyte = frame11[ii%BUFFRAMENUM];
			}
		}
	
}





void ENT_INT_DMA( void )
{
	ent_int();

	mask_irq(INT_DMA);
	//ENABLE_INT;

	if(usbdmapp == APP)
	{
		dmatime++;
		usbdma();
	}else if(*(RP)(0x11001020)&(0x04) || *(RP)(0x11001050)&(0x04) )
	{
		*(RP)(0x11001060) |= (0X1 << 2);
		*(RP)(0x11001060) &= ~(0X1 << 2);
	}else{
		ac97_handler_buffer();
	}
	
	//DISABLE_INT;
	unmask_irq(INT_DMA);

	ret_int();
}


void volume_up()
{
	//*(RP)AC97_CRAC=READ+ 0x20000 + 0x0;		//0dB attenuation
	//do{}while(!OVER_READ);
	//**********open Master Volume Register,ADDR: 02H      0--63
	if(volume>4){
		volume -=4; 
		*(RP)AC97_CRAC=WRITE+ 0x20000 + volume+(volume<<8);		//0dB attenuation
	 	do{}while(!OVER_WRITE);
	 }
}

void volume_down()
{
	//*(RP)AC97_CRAC=READ+ 0x20000 + 0x0;		//0dB attenuation
	//do{}while(!OVER_READ);
	//**********open Master Volume Register,ADDR: 02H      0--63
	if(volume<56){
		volume +=4; 
		*(RP)AC97_CRAC=WRITE+ 0x20000 + volume+(volume<<8);		//0dB attenuation
	 	do{}while(!OVER_WRITE);
	 }
}


void ac97_mute()
{	
	*(RP)AC97_CRAC=WRITE+ 0x20000 + volume+(volume<<8)+1<<15;		//0dB attenuation
	do{}while(!OVER_WRITE);
}

void ac97_unmute()
{
	*(RP)AC97_CRAC=WRITE+ 0x20000 + volume+(volume<<8);		//0dB attenuation
	do{}while(!OVER_WRITE);
}

void pop()
{
	*(RP)AC97_CRAC=WRITE + 0x6a0000 + 0x50;		//head phone 
	do{}while(!OVER_WRITE);
}

void classic()
{
	*(RP)AC97_CRAC=WRITE + 0x6a0000;/// + 0x50 + 10<<11 + 1<<7;		//head phone 
	do{}while(!OVER_WRITE);
}

void jazz()
{
	*(RP)AC97_CRAC=WRITE + 0x6a0000 ;/// + 0x50 + 9<<11 + 1<<7;		//head phone 
	do{}while(!OVER_WRITE);
}



void rock()
{
	*(RP)AC97_CRAC=WRITE + 0x6a0000;///  + 0x50 + 13<<11 + 3<<7;		//head phone 
	do{}while(!OVER_WRITE);
}
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