cs_enable.c

基于东南大学开发的SEP3203的ARM7中的所有驱动

//build in 2004/12/17 by zhangjie
//CSA connect to NorFlash
//CSD connect to Ethernet MAC(RTL8019AS) 
//CSE connect to SDRAM
//Others unused

#include "hardware.h"
#include "hardware_reg.h"
#include "HA_typedef.h"
#include <stdio.h> 

void CSA(U32 enable,U32 bit,U32 ReadOnly)
{  /* CSA enable */
   if (enable==1)                           /* enable CSA*/
  *(RP)EMIADDR_SMCONF |= 0x100;
   else if(enable==0)                       /* disable CSA*/
  *(RP)EMIADDR_SMCONF &= ~(0x100);
   ///////////////////////////////
   
   /* CSA is 16/32bit */
   if (bit==32)                            /* 32 bits */
  *(RP)EMIADDR_SMCONF |= 0x200;
   else if(bit==16)                        /* 16 bits */
  *(RP)EMIADDR_SMCONF &= ~(0x200);
  //////////////////////////////
  
  /* CSA ReadOnly */
   if (ReadOnly==1)                        /* enable ReadOnly */
  *(RP)EMIADDR_SMCONF |= 0x400;
   else if (ReadOnly==0)                   /* disable ReadOnly */
   *(RP)EMIADDR_SMCONF &= ~(0x400);
}





/* CSD config */

void CSD(U32 enable,U32 bit,U32 ReadOnly)
{  /* CSD enable */
   if (enable==1)                           /* enable CSA*/
  *(RP)EMIADDR_SMCONF |= 0x100000;
   else if(enable==0)                       /* disable CSA*/
  *(RP)EMIADDR_SMCONF &= ~(0x100000);
   ///////////////////////////////
   
   /* CSD is 16/32bit */
   if (bit==32)                            /* 32 bits */
  *(RP)EMIADDR_SMCONF |= 0x200000;
   else if(bit==16)                        /* 16 bits */
  *(RP)EMIADDR_SMCONF &= ~(0x200000);
  //////////////////////////////
  
  /* CSD ReadOnly */
   if (ReadOnly==1)                        /* enable ReadOnly */
  *(RP)EMIADDR_SMCONF |= 0x400000;
   else if (ReadOnly==0)                   /* disable ReadOnly */
   *(RP)EMIADDR_SMCONF &= ~(0x400000);
}







void CSE(U32 enable,U32 bit,U32 ReadOnly,U32 sdram)
{
  /* CSE enable */ 
  if (enable==1)                          /* enable CSE */
  *(RP)EMIADDR_SMCONF |= 0x01000000;
  else if (enable==0)                     /* disable CSE */
  *(RP)EMIADDR_SMCONF &= ~(0x01000000);
  ////////////////////////////////////
  
   /* CSE is 16/32 bits */
  if(bit==32)                             /* 32 bits */
  *(RP)EMIADDR_SMCONF |= 0x02000000;
  else if (bit==16)                       /* 16 bits */
  *(RP)EMIADDR_SMCONF &= ~(0x02000000);
  
  /////////////////////////////////////
  
   /* CSE ReadOnly */
  if(ReadOnly==1)                         /* enable ReadOnly */
  *(RP)EMIADDR_SMCONF |= 0x04000000;
  else if(ReadOnly==0)                    /* disable ReadOnly */
  *(RP)EMIADDR_SMCONF &= ~(0x04000000);
  
  ////////////////////////////////////
  
  /* CSE is uesd as SDRAM/SRAM */
  if(sdram==1)                            /* Used as SDRAM*/
  *(RP)EMIADDR_SMCONF |= 0x08000000;
  else if (sdram=0)                        /* Used as SRAM*/
  *(RP)EMIADDR_SMCONF |= 0x08000000;
  ///////////////////////////////////
  
   //*(RP)EMIADDR_SDCONF1=0x01004077;
   *(RP)EMIADDR_SDCONF1=0x0110a077;
  
}




void REMAP(void)
{ 
     *(RP)EMIADDR_REMAP=0x0000000b;	
     }