hal_intr.h

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//==========================================================================
//
//      hal_intr.h
//
//      HAL Interrupt and clock support
//
//==========================================================================
//####ECOSGPLCOPYRIGHTBEGIN####
// -------------------------------------------
// This file is part of eCos, the Embedded Configurable Operating System.
// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
//
// eCos is free software; you can redistribute it and/or modify it under
// the terms of the GNU General Public License as published by the Free
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//
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// WARRANTY; without even the implied warranty of MERCHANTABILITY or
// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
// for more details.
//
// You should have received a copy of the GNU General Public License along
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// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
//
// As a special exception, if other files instantiate templates or use macros
// or inline functions from this file, or you compile this file and link it
// with other works to produce a work based on this file, this file does not
// by itself cause the resulting work to be covered by the GNU General Public
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// in accordance with section (3) of the GNU General Public License.
//
// This exception does not invalidate any other reasons why a work based on
// this file might be covered by the GNU General Public License.
//
// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
// at http://sources.redhat.com/ecos/ecos-license/
// -------------------------------------------
//####ECOSGPLCOPYRIGHTEND####
//==========================================================================
//#####DESCRIPTIONBEGIN####
//
// Author(s):    sfurman
// Contributors: 
// Date:         2003-01-24
// Purpose:      Define Interrupt support
// Description:  The macros defined here provide the HAL APIs for handling
//               both external interrupts and clock interrupts.
//              
// Usage:
//              #include <cyg/hal/hal_intr.h>
//              ...
//              
//
//####DESCRIPTIONEND####
//
//==========================================================================

#ifndef CYGONCE_HAL_HAL_INTR_H
#define CYGONCE_HAL_HAL_INTR_H

#include <cyg/hal/hal_arch.h>

//--------------------------------------------------------------------------
// OpenRISC vectors. 

// These are the exception/interrupt causes defined by the hardware.
// These values are the ones to use for HAL_VSR_GET/SET

// Reset
#define CYGNUM_HAL_VECTOR_RESET                0x01

// Bus Error - probably invalid physical address
#define CYGNUM_HAL_VECTOR_BUS_ERROR            0x02

// Either no matching page-table entry or protection fault
// while executing load/store operation
#define CYGNUM_HAL_VECTOR_DATA_PAGE_FAULT      0x03

// Either no matching page-table entry or protection fault
// while fetching instruction
#define CYGNUM_HAL_VECTOR_INSTR_PAGE_FAULT     0x04

// Tick Timer interrupt
#define CYGNUM_HAL_VECTOR_TICK_TIMER           0x05

// Unaligned access
#define CYGNUM_HAL_VECTOR_UNALIGNED_ACCESS     0x06

// Illegal instruction
#define CYGNUM_HAL_VECTOR_RESERVED_INSTRUCTION 0x07

// External Interrupt from PIC
#define CYGNUM_HAL_VECTOR_INTERRUPT            0x08

// D-TLB Miss
#define CYGNUM_HAL_VECTOR_DTLB_MISS            0x09

// I-TLB Miss
#define CYGNUM_HAL_VECTOR_ITLB_MISS            0x0A

// Numeric overflow, etc.
#define CYGNUM_HAL_VECTOR_RANGE                0x0B

// System Call
#define CYGNUM_HAL_VECTOR_SYSTEM_CALL          0x0C

// TRAP instruction executed
#define CYGNUM_HAL_VECTOR_TRAP                 0x0E

#define CYGNUM_HAL_VSR_MIN                     CYGNUM_HAL_VECTOR_RESET
#define CYGNUM_HAL_VSR_MAX                     CYGNUM_HAL_VECTOR_TRAP
#define CYGNUM_HAL_VSR_COUNT                   (CYGNUM_HAL_VSR_MAX-CYGNUM_HAL_VSR_MIN+1)

// Exception vectors. These are the values used when passed out to an
// external exception handler using cyg_hal_deliver_exception()

#define CYGNUM_HAL_EXCEPTION_DATA_TLBMISS_ACCESS \
          CYGNUM_HAL_VECTOR_DTLB_MISS
#define CYGNUM_HAL_EXCEPTION_DATA_TLBMISS_ACCESS \
          CYGNUM_HAL_VECTOR_DTLB_MISS
#define CYGNUM_HAL_EXCEPTION_DATA_UNALIGNED_ACCESS \
          CYGNUM_HAL_VECTOR_UNALIGNED_ACCESS
#define CYGNUM_HAL_EXCEPTION_SYSTEM_CALL    CYGNUM_HAL_VECTOR_SYSTEM_CALL
#define CYGNUM_HAL_EXCEPTION_ILLEGAL_INSTRUCTION \
          CYGNUM_HAL_VECTOR_RESERVED_INSTRUCTION
#define CYGNUM_HAL_EXCEPTION_OVERFLOW       CYGNUM_HAL_VECTOR_RANGE
#define CYGNUM_HAL_EXCEPTION_INTERRUPT      CYGNUM_HAL_VECTOR_INTERRUPT

// Min/Max exception numbers and how many there are
#define CYGNUM_HAL_EXCEPTION_MIN                CYGNUM_HAL_VSR_MIN
#define CYGNUM_HAL_EXCEPTION_MAX                CYGNUM_HAL_VSR_MAX
#define CYGNUM_HAL_EXCEPTION_COUNT           \
                 ( CYGNUM_HAL_EXCEPTION_MAX - CYGNUM_HAL_EXCEPTION_MIN + 1 )


#ifndef CYGHWR_HAL_INTERRUPT_VECTORS_DEFINED
#define CYGHWR_HAL_INTERRUPT_VECTORS_DEFINED

// Interrupts 0-31 are connected to the PIC
#define CYGNUM_HAL_INTERRUPT_0                0
#define CYGNUM_HAL_INTERRUPT_1                1
#define CYGNUM_HAL_INTERRUPT_2                2
#define CYGNUM_HAL_INTERRUPT_3                3
#define CYGNUM_HAL_INTERRUPT_4                4
#define CYGNUM_HAL_INTERRUPT_5                5
#define CYGNUM_HAL_INTERRUPT_6                6
#define CYGNUM_HAL_INTERRUPT_7                7
#define CYGNUM_HAL_INTERRUPT_8                8
#define CYGNUM_HAL_INTERRUPT_9                9
#define CYGNUM_HAL_INTERRUPT_10               10
#define CYGNUM_HAL_INTERRUPT_11               11
#define CYGNUM_HAL_INTERRUPT_12               12
#define CYGNUM_HAL_INTERRUPT_13               13
#define CYGNUM_HAL_INTERRUPT_14               14
#define CYGNUM_HAL_INTERRUPT_15               15
#define CYGNUM_HAL_INTERRUPT_16               16
#define CYGNUM_HAL_INTERRUPT_17               17
#define CYGNUM_HAL_INTERRUPT_18               18
#define CYGNUM_HAL_INTERRUPT_19               19
#define CYGNUM_HAL_INTERRUPT_20               20
#define CYGNUM_HAL_INTERRUPT_21               21
#define CYGNUM_HAL_INTERRUPT_22               22
#define CYGNUM_HAL_INTERRUPT_23               23
#define CYGNUM_HAL_INTERRUPT_24               24
#define CYGNUM_HAL_INTERRUPT_25               25
#define CYGNUM_HAL_INTERRUPT_26               26
#define CYGNUM_HAL_INTERRUPT_27               27
#define CYGNUM_HAL_INTERRUPT_28               28
#define CYGNUM_HAL_INTERRUPT_29               29
#define CYGNUM_HAL_INTERRUPT_30               30
#define CYGNUM_HAL_INTERRUPT_31               31

// By SW convention, interrupt #32 is the tick timer
#define CYGNUM_HAL_INTERRUPT_32               32

// The interrupt vector used by the RTC, aka tick timer
#define CYGNUM_HAL_INTERRUPT_RTC            CYGNUM_HAL_INTERRUPT_32

// Min/Max ISR numbers and how many there are
#define CYGNUM_HAL_ISR_MIN                     0
#define CYGNUM_HAL_ISR_MAX                     32
#define CYGNUM_HAL_ISR_COUNT                   33

#endif

#ifndef __ASSEMBLER__
#include <pkgconf/hal.h>

#include <cyg/infra/cyg_type.h>
#include <cyg/hal/hal_io.h>

#include <cyg/hal/plf_intr.h>

//--------------------------------------------------------------------------
// Static data used by HAL

// ISR tables
externC volatile CYG_ADDRESS    hal_interrupt_handlers[CYGNUM_HAL_ISR_COUNT];
externC volatile CYG_ADDRWORD   hal_interrupt_data[CYGNUM_HAL_ISR_COUNT];
externC volatile CYG_ADDRESS    hal_interrupt_objects[CYGNUM_HAL_ISR_COUNT];

// VSR table
externC volatile CYG_ADDRESS    hal_vsr_table[CYGNUM_HAL_VSR_MAX+1];

//--------------------------------------------------------------------------
// Default ISR
// The #define is used to test whether this routine exists, and to allow
// us to call it.

externC cyg_uint32 hal_default_isr(CYG_ADDRWORD vector, CYG_ADDRWORD data);

#define HAL_DEFAULT_ISR hal_default_isr

//--------------------------------------------------------------------------
// Interrupt state storage

typedef cyg_uint32 CYG_INTERRUPT_STATE;

//--------------------------------------------------------------------------
// Interrupt control macros
#ifndef CYGHWR_HAL_INTERRUPT_ENABLE_DISABLE_RESTORE_DEFINED

// Clear both tick timer and external interrupts in the Supervisor Register
#define HAL_DISABLE_INTERRUPTS(_old_)                     \
    CYG_MACRO_START                                       \
    _old_ = MFSPR(SPR_SR);                                \
    MTSPR(SPR_SR, _old_ & ~(SPR_SR_IEE|SPR_SR_TEE));      \
    CYG_MACRO_END