📄 ppc_stub.c
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//========================================================================
//
// ppc_stub.c
//
// Helper functions for stub, generic to all PowerPC processors
//
//========================================================================
//####ECOSGPLCOPYRIGHTBEGIN####
// -------------------------------------------
// This file is part of eCos, the Embedded Configurable Operating System.
// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
//
// eCos is free software; you can redistribute it and/or modify it under
// the terms of the GNU General Public License as published by the Free
// Software Foundation; either version 2 or (at your option) any later version.
//
// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
// WARRANTY; without even the implied warranty of MERCHANTABILITY or
// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
// for more details.
//
// You should have received a copy of the GNU General Public License along
// with eCos; if not, write to the Free Software Foundation, Inc.,
// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
//
// As a special exception, if other files instantiate templates or use macros
// or inline functions from this file, or you compile this file and link it
// with other works to produce a work based on this file, this file does not
// by itself cause the resulting work to be covered by the GNU General Public
// License. However the source code for this file must still be made available
// in accordance with section (3) of the GNU General Public License.
//
// This exception does not invalidate any other reasons why a work based on
// this file might be covered by the GNU General Public License.
//
// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
// at http://sources.redhat.com/ecos/ecos-license/
// -------------------------------------------
//####ECOSGPLCOPYRIGHTEND####
//========================================================================
//#####DESCRIPTIONBEGIN####
//
// Author(s): Red Hat, jskov
// Contributors: Red Hat, jskov, gthomas
// Date: 1998-08-20
// Purpose:
// Description: Helper functions for stub, generic to all PowerPC processors
// Usage:
//
//####DESCRIPTIONEND####
//
//========================================================================
#include <stddef.h>
#include <pkgconf/hal.h>
#ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS
#define CYGARC_HAL_COMMON_EXPORT_CPU_MACROS
#include <cyg/hal/ppc_regs.h>
#include <cyg/hal/hal_stub.h>
#include <cyg/hal/hal_arch.h>
#include <cyg/hal/hal_intr.h>
#ifdef CYGNUM_HAL_NO_VECTOR_TRACE
#define USE_BREAKPOINTS_FOR_SINGLE_STEP
#endif
#ifdef CYGDBG_HAL_DEBUG_GDB_THREAD_SUPPORT
#include <cyg/hal/dbg-threads-api.h> // dbg_currthread_id
#endif
#ifndef OFFSETOF
#define OFFSETOF(_struct_, _member_) (int)((char *)(&(((_struct_*)0)->_member_))-(char *)((_struct_*)0))
#endif
/* Given a trap value TRAP, return the corresponding signal. */
int __computeSignal (unsigned int trap_number)
{
switch (trap_number)
{
case CYGNUM_HAL_VECTOR_MACHINE_CHECK:
/* Machine check */
case CYGNUM_HAL_VECTOR_DSI:
/* Data access */
return SIGSEGV;
case CYGNUM_HAL_VECTOR_ISI:
/* Instruction access (Ifetch) */
case CYGNUM_HAL_VECTOR_ALIGNMENT:
/* Data access */
return SIGBUS;
case CYGNUM_HAL_VECTOR_INTERRUPT:
/* External interrupt */
return SIGINT;
case CYGNUM_HAL_VECTOR_TRACE:
/* Instruction trace */
return SIGTRAP;
case CYGNUM_HAL_VECTOR_PROGRAM:
#ifdef CYGPKG_HAL_POWERPC_PPC40x
// The 40x is b0rken, returning 0 for these bits. Translate to
// SIGTRAP to allow thread debugging.
return SIGTRAP;
#else
// The register PS contains the value of SRR1 at the time of
// exception entry. Bits 11-15 contain information about the
// cause of the exception. Bits 16-31 the PS (MSR) state.
#ifdef USE_BREAKPOINTS_FOR_SINGLE_STEP
if (__is_single_step(get_register(PC))) {
return SIGTRAP;
}
#endif
switch ((get_register (PS) >> 17) & 0xf){
case 1: /* trap */
return SIGTRAP;
case 2: /* privileged instruction */
case 4: /* illegal instruction */
return SIGILL;
case 8: /* floating point */
return SIGFPE;
default: /* should never happen! */
return SIGILL;
}
#endif
case CYGNUM_HAL_VECTOR_RESERVED_A:
case CYGNUM_HAL_VECTOR_RESERVED_B:
return SIGILL;
case CYGNUM_HAL_VECTOR_FP_UNAVAILABLE:
/* FPU disabled */
case CYGNUM_HAL_VECTOR_FP_ASSIST:
/* FPU assist */
return SIGFPE;
case CYGNUM_HAL_VECTOR_DECREMENTER:
/* Decrementer alarm */
return SIGALRM;
case CYGNUM_HAL_VECTOR_SYSTEM_CALL:
/* System call */
return SIGSYS;
#if defined(CYGPKG_HAL_POWERPC_MPC8xx) || defined(CYGPKG_HAL_POWERPC_MPC5xx)
case CYGNUM_HAL_VECTOR_SW_EMUL:
/* A SW_EMUL is generated instead of PROGRAM for illegal
instructions. */
return SIGILL;
case CYGNUM_HAL_VECTOR_DATA_BP:
case CYGNUM_HAL_VECTOR_INSTRUCTION_BP:
case CYGNUM_HAL_VECTOR_PERIPHERAL_BP:
case CYGNUM_HAL_VECTOR_NMI:
/* Developer port debugging exceptions. */
return SIGTRAP;
#if defined(CYGNUM_HAL_VECTOR_ITLB_MISS)
case CYGNUM_HAL_VECTOR_ITLB_MISS:
/* Software reload of TLB required. */
return SIGTRAP;
#endif
#if defined(CYGNUM_HAL_VECTOR_DTLB_MISS)
case CYGNUM_HAL_VECTOR_DTLB_MISS:
/* Software reload of TLB required. */
return SIGTRAP;
#endif
case CYGNUM_HAL_VECTOR_ITLB_ERROR:
/* Invalid instruction access. */
return SIGBUS;
case CYGNUM_HAL_VECTOR_DTLB_ERROR:
/* Invalid data access. */
return SIGSEGV;
#endif // defined(CYGPKG_HAL_POWERPC_MPC8xx)
default:
return SIGTERM;
}
}
/* Return the trap number corresponding to the last-taken trap. */
int __get_trap_number (void)
{
// The vector is not not part of the GDB register set so get it
// directly from the save context.
return _hal_registers->vector >> 8;
}
/* Set the currently-saved pc register value to PC. This also updates NPC
as needed. */
void set_pc (target_register_t pc)
{
put_register (PC, pc);
}
#ifdef CYGHWR_HAL_POWERPC_FPU
static int
reg_offset(regnames_t reg)
{
// We let the compiler determine the offsets in order to avoid all
// possible alignment problems
int base_offset;
// 32 general purpose registers
if(reg < F0) return reg * 4;
// first sixteen floating point regs
base_offset = OFFSETOF(GDB_Registers, f0);
if(reg < F16) return base_offset + ((reg - F0) * 8);
// last sixteen floating point regs
base_offset = OFFSETOF(GDB_Registers, f16);
if(reg < PC) return base_offset + ((reg - F16) * 8);
// Other 32 bit regs
if(reg < PS) return(OFFSETOF(GDB_Registers, pc));
if(reg < CND) return(OFFSETOF(GDB_Registers, msr));
if(reg < LR) return(OFFSETOF(GDB_Registers, cr));
if(reg < CNT) return(OFFSETOF(GDB_Registers, lr));
if(reg < XER) return(OFFSETOF(GDB_Registers, ctr));
if(reg < MQ) return(OFFSETOF(GDB_Registers, xer));
return OFFSETOF(GDB_Registers, mq);
}
// Return the currently-saved value corresponding to register REG of
// the exception context.
target_register_t
get_register (regnames_t reg)
{
target_register_t val;
int offset = reg_offset(reg);
if (REGSIZE(reg) > sizeof(target_register_t))
return -1;
val = _registers[offset/sizeof(target_register_t)];
return val;
}
// Store VALUE in the register corresponding to WHICH in the exception
// context.
void
put_register (regnames_t which, target_register_t value)
{
int offset = reg_offset(which);
if (REGSIZE(which) > sizeof(target_register_t))
return;
_registers[offset/sizeof(target_register_t)] = value;
}
// Write the contents of register WHICH into VALUE as raw bytes. This
// is only used for registers larger than sizeof(target_register_t).
// Return non-zero if it is a valid register.
int
get_register_as_bytes (regnames_t which, char *value)
{
int offset = reg_offset(which);
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