📄 hal_arch.h
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double * _p_ = _gdb_->f0; \
double * _q_ = _regs_->f; \
for( _i_ = 0; _i_ < 16; _i_++) \
*_p_++ = *_q_++; \
\
_p_ = _gdb_->f16; \
for( _i_ = 0; _i_ < 16; _i_++) \
*_p_++ = *_q_++; \
CYG_MACRO_END
#else
#define HAL_GET_GDB_FLOATING_POINT_REGISTERS( _gdb_, _regs_ ) \
CYG_MACRO_START \
CYG_MACRO_END
#endif
// Copy a GDB_Registers structure into a HAL_SavedRegisters structure
#ifdef CYGHWR_HAL_POWERPC_FPU
#define HAL_SET_GDB_FLOATING_POINT_REGISTERS( _regs_, _gdb_) \
CYG_MACRO_START \
double * _p_ = _regs_->f; \
double * _q_ = _gdb_->f0; \
for( _i_ = 0; _i_ < 16; _i_++) \
*_p_++ = *_q_++; \
\
_q_ = _gdb_->f16; \
for( _i_ = 0; _i_ < 16; _i_++) \
*_p_++ = *_q_++; \
CYG_MACRO_END
#else
#define HAL_SET_GDB_FLOATING_POINT_REGISTERS( _regs_, _gdb_) \
CYG_MACRO_START \
CYG_MACRO_END
#endif
// Copy a set of registers from a HAL_SavedRegisters structure into a
// GDB ordered array.
#define HAL_GET_GDB_REGISTERS( _aregval_, _regs_ ) \
CYG_MACRO_START \
union __gdbreguniontype { \
__typeof__(_aregval_) _aregval2_; \
GDB_Registers *_gdbr; \
} __gdbregunion; \
__gdbregunion._aregval2_ = (_aregval_); \
GDB_Registers *_gdb_ = __gdbregunion._gdbr; \
int _i_; \
\
for( _i_ = 0; _i_ < 32; _i_++ ) \
_gdb_->gpr[_i_] = (_regs_)->d[_i_]; \
\
_gdb_->pc = (_regs_)->pc; \
_gdb_->msr = (_regs_)->msr; \
_gdb_->cr = (_regs_)->cr; \
_gdb_->lr = (_regs_)->lr; \
_gdb_->ctr = (_regs_)->ctr; \
_gdb_->xer = (_regs_)->xer; \
HAL_GET_GDB_FLOATING_POINT_REGISTERS(_gdb_, _regs_); \
CYG_MACRO_END
// Copy a GDB ordered array into a HAL_SavedRegisters structure.
#define HAL_SET_GDB_REGISTERS( _regs_ , _aregval_ ) \
CYG_MACRO_START \
union __gdbreguniontype { \
__typeof__(_aregval_) _aregval2_; \
GDB_Registers *_gdbr; \
} __gdbregunion; \
__gdbregunion._aregval2_ = (_aregval_); \
GDB_Registers *_gdb_ = __gdbregunion._gdbr; \
int _i_; \
\
for( _i_ = 0; _i_ < 32; _i_++ ) \
(_regs_)->d[_i_] = _gdb_->gpr[_i_]; \
\
(_regs_)->pc = _gdb_->pc; \
(_regs_)->msr = _gdb_->msr; \
(_regs_)->cr = _gdb_->cr; \
(_regs_)->lr = _gdb_->lr; \
(_regs_)->ctr = _gdb_->ctr; \
(_regs_)->xer = _gdb_->xer; \
HAL_SET_GDB_FLOATING_POINT_REGISTERS(_regs_, _gdb_); \
CYG_MACRO_END
//-----------------------------------------------------------------------------
// HAL setjmp
typedef struct {
cyg_uint32 sp;
cyg_uint32 r2;
cyg_uint32 r13;
cyg_uint32 r14;
cyg_uint32 r15;
cyg_uint32 r16;
cyg_uint32 r17;
cyg_uint32 r18;
cyg_uint32 r19;
cyg_uint32 r20;
cyg_uint32 r21;
cyg_uint32 r22;
cyg_uint32 r23;
cyg_uint32 r24;
cyg_uint32 r25;
cyg_uint32 r26;
cyg_uint32 r27;
cyg_uint32 r28;
cyg_uint32 r29;
cyg_uint32 r30;
cyg_uint32 r31;
#ifdef CYGHWR_HAL_POWERPC_FPU
double f14;
double f15;
double f16;
double f17;
double f18;
double f19;
double f20;
double f21;
double f22;
double f23;
double f24;
double f25;
double f26;
double f27;
double f28;
double f29;
double f30;
double f31;
#endif
cyg_uint32 lr;
cyg_uint32 cr;
} hal_jmp_buf_t;
#define CYGARC_JMP_BUF_SIZE (sizeof(hal_jmp_buf_t) / sizeof(cyg_uint32))
typedef cyg_uint32 hal_jmp_buf[ CYGARC_JMP_BUF_SIZE ];
externC int hal_setjmp(hal_jmp_buf env);
externC void hal_longjmp(hal_jmp_buf env, int val);
//-----------------------------------------------------------------------------
// Idle thread code.
// This macro is called in the idle thread loop, and gives the HAL the
// chance to insert code. Typical idle thread behaviour might be to halt the
// processor.
externC void hal_idle_thread_action(cyg_uint32 loop_count);
#define HAL_IDLE_THREAD_ACTION(_count_) hal_idle_thread_action(_count_)
//-----------------------------------------------------------------------------
// Minimal and sensible stack sizes: the intention is that applications
// will use these to provide a stack size in the first instance prior to
// proper analysis. Idle thread stack should be this big.
// THESE ARE NOT INTENDED TO BE MICROMETRICALLY ACCURATE FIGURES.
// THEY ARE HOWEVER ENOUGH TO START PROGRAMMING.
// YOU MUST MAKE YOUR STACKS LARGER IF YOU HAVE LARGE "AUTO" VARIABLES!
// This is not a config option because it should not be adjusted except
// under "enough rope" sort of disclaimers.
// Stack frame overhead per call. The PPC ABI defines regs 13..31 as callee
// saved. callee saved variables are irrelevant for us as they would contain
// automatic variables, so we only count the caller-saved regs here
// So that makes r0..r12 + cr, xer, lr, ctr:
#define CYGNUM_HAL_STACK_FRAME_SIZE (4 * 17)
// Stack needed for a context switch
#define CYGNUM_HAL_STACK_CONTEXT_SIZE \
(38*4 /* offsetof(HAL_SavedRegisters, context_size) */)
// Interrupt + call to ISR, interrupt_end() and the DSR
#ifdef CYGHWR_HAL_POWERPC_FPU
#define CYGNUM_HAL_STACK_INTERRUPT_SIZE \
(((43*4)+(16*8) /* sizeof(HAL_SavedRegisters) */) + 2 * CYGNUM_HAL_STACK_FRAME_SIZE)
#else
#define CYGNUM_HAL_STACK_INTERRUPT_SIZE \
((43*4 /* sizeof(HAL_SavedRegisters) */) + 2 * CYGNUM_HAL_STACK_FRAME_SIZE)
#endif
// We have lots of registers so no particular amount is added in for
// typical local variable usage.
// We define a minimum stack size as the minimum any thread could ever
// legitimately get away with. We can throw asserts if users ask for less
// than this. Allow enough for three interrupt sources - clock, serial and
// one other
#ifdef CYGFUN_KERNEL_THREADS_STACK_CHECKING
#define CYGNUM_HAL_STACK_CHECKING_OVERHEAD (2*CYGNUM_KERNEL_THREADS_STACK_CHECK_DATA_SIZE)
#else
#define CYGNUM_HAL_STACK_CHECKING_OVERHEAD 0
#endif
#ifdef CYGIMP_HAL_COMMON_INTERRUPTS_USE_INTERRUPT_STACK
// An interrupt stack which is large enough for all possible interrupt
// conditions (and only used for that purpose) exists. "User" stacks
// can therefore be much smaller
# define CYGNUM_HAL_STACK_SIZE_MINIMUM \
(16*CYGNUM_HAL_STACK_FRAME_SIZE + \
2*CYGNUM_HAL_STACK_INTERRUPT_SIZE + \
CYGNUM_HAL_STACK_CHECKING_OVERHEAD)
#else
// No separate interrupt stack exists. Make sure all threads contain
// a stack sufficiently large
# define CYGNUM_HAL_STACK_SIZE_MINIMUM \
(((2+3)*CYGNUM_HAL_STACK_INTERRUPT_SIZE) + \
(16*CYGNUM_HAL_STACK_FRAME_SIZE) + \
CYGNUM_HAL_STACK_CHECKING_OVERHEAD)
#endif
// Now make a reasonable choice for a typical thread size. Pluck figures
// from thin air and say 30 call frames with an average of 16 words of
// automatic variables per call frame
#define CYGNUM_HAL_STACK_SIZE_TYPICAL \
(CYGNUM_HAL_STACK_SIZE_MINIMUM + \
(30 * (CYGNUM_HAL_STACK_FRAME_SIZE+(16*4))) + \
CYGNUM_HAL_STACK_CHECKING_OVERHEAD)
//--------------------------------------------------------------------------
// Macros for switching context between two eCos instances (jump from
// code in ROM to code in RAM or vice versa).
// Should be defined like for MIPS, saving/restoring R2 - but is it
// actually used? I've never seen app code use R2. Something to investigate.
#define CYGARC_HAL_SAVE_GP()
#define CYGARC_HAL_RESTORE_GP()
//-----------------------------------------------------------------------------
#endif // CYGONCE_HAL_ARCH_H
// End of hal_arch.h
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