var_io.h

开放源码实时操作系统源码.

#define AT91_SPI1_NPCS1X AT91_PIN(0,1,25) // SPI 1 Chip Select 1 
#define AT91_SPI1_NPCS2X AT91_PIN(0,1,26) // SPI 1 Chip Select 2 
#define AT91_PCK_PCK3    AT91_PIN(0,1,27) // Programmable Clock Output 3
#define AT91_SPI1_NPCS3X AT91_PIN(0,1,29) // SPI 1 Chip Select 3 
#define AT91_PCK_PCK2    AT91_PIN(0,1,30) // Programmable Clock Output 2

//PIO Controller B, Peripheral A
#define AT91_EMAC_EREFCK AT91_PIN(1,0, 0) // EMAC Reference Clock 
#define AT91_EMAC_ETXEN  AT91_PIN(1,0, 1) // EMAC Transmit Enable 
#define AT91_EMAC_ETX0   AT91_PIN(1,0, 2) // EMAC Transmit Data 0 
#define AT91_EMAC_ETX1   AT91_PIN(1,0, 3) // EMAC Transmit Data 1  
#define AT91_EMAC_ECRS   AT91_PIN(1,0, 4) // EMAC Carrier Sense 
#define AT91_EMAC_ERX0   AT91_PIN(1,0, 5) // EMAC Receive Data 0   
#define AT91_EMAC_ERX1   AT91_PIN(1,0, 6) // EMAC Receive Data 1    
#define AT91_EMAC_ERXER  AT91_PIN(1,0, 7) // EMAC Receive Error 
#define AT91_EMAC_EMDC   AT91_PIN(1,0, 8) // EMAC Management Data Clock 
#define AT91_EMAC_EMDIO  AT91_PIN(1,0, 9) // EMAC Management Data IO
#define AT91_EMAC_ETX2   AT91_PIN(1,0,10) // EMAC Transmit Data 2    
#define AT91_EMAC_ETX3   AT91_PIN(1,0,11) // EMAC Transmit Data 3    
#define AT91_EMAC_ETXER  AT91_PIN(1,0,12) // EMAC Transmit Coding Error 
#define AT91_EMAC_ERX2   AT91_PIN(1,0,13) // EMAC Receive Data 2     
#define AT91_EMAC_ERX3   AT91_PIN(1,0,14) // EMAC Receive Data 3     
#define AT91_EMAC_ECRSDV AT91_PIN(1,0,15) // EMAC Carrier Sense And Data Valid 
#define AT91_EMAC_ERXDV  AT91_PIN(1,0,15) // EMAC Receive Data Valid 
#define AT91_EMAC_ECOL   AT91_PIN(1,0,16) // EMAC Collision Detected 
#define AT91_EMAC_ERXCK  AT91_PIN(1,0,17) // EMAC Receive Clock 
#define AT91_EMAC_EF100  AT91_PIN(1,0,18) // EMAC Force 100Mb/s 
#define AT91_PWM_PWM0    AT91_PIN(1,0,19) // Pulse Width Modulation #0
#define AT91_PWM_PWM1    AT91_PIN(1,0,20) // Pulse Width Modulation #1
#define AT91_PWM_PWM2    AT91_PIN(1,0,21) // Pulse Width Modulation #2
#define AT91_PWM_PWM3    AT91_PIN(1,0,22) // Pulse Width Modulation #3
#define AT91_TC_TIOA0    AT91_PIN(1,0,23) // Timer/Counter 0 IO Line A
#define AT91_TC_TIOB0    AT91_PIN(1,0,24) // Timer/Counter 0 IO Line B
#define AT91_TC_TIOA1    AT91_PIN(1,0,25) // Timer/Counter 1 IO Line A
#define AT91_TC_TIOB1    AT91_PIN(1,0,26) // Timer/Counter 1 IO Line B
#define AT91_TC_TIOA2    AT91_PIN(1,0,27) // Timer/Counter 2 IO Line A
#define AT91_TC_TIOB2    AT91_PIN(1,0,28) // Timer/Counter 2 IO Line B
#define AT91_PCK_PCK1X   AT91_PIN(1,0,29) // Programmable Clock Output 1
#define AT91_PCK_PCK2X   AT91_PIN(1,0,30) // Programmable Clock Output 2

//PIO Controller B Peripheral B
#define AT91_PCK_PCK0     AT91_PIN(1,1, 0) // Programmable Clock Output 0
#define AT91_SPI1_NPCS1XX AT91_PIN(1,1,10) // SPI 1 Chip Select 1 
#define AT91_SPI1_NPCS2XX AT91_PIN(1,1,11) // SPI 1 Chip Select 2 
#define AT91_TC_TCLK0     AT91_PIN(1,1,12) // Timer/Counter 0 Clock Input
#define AT91_SPI_NPCS1XX  AT91_PIN(1,1,13) // SPI 0 Chip Select 1 
#define AT91_SPI_NPCS2XX  AT91_PIN(1,1,14) // SPI 0 Chip Select 2 
#define AT91_SPI1_NPCS3XX AT91_PIN(1,1,16) // SPI 1 Chip Select 3 
#define AT91_SPI_NPCS3XX  AT91_PIN(1,1,17) // SPI 0 Chip Select 3 
#define AT91_ADC_ADTRG    AT91_PIN(1,1,18) // ADC Trigger
#define AT91_TC_TCLK1X    AT91_PIN(1,1,19) // Timer/Counter 1 Clock Input
#define AT91_PCK_PCK0X    AT91_PIN(1,1,20) // Programmable Clock Output 0
#define AT91_PCK_PCK1XX   AT91_PIN(1,1,21) // Programmable Clock Output 1
#define AT91_PCK_PCK2XX   AT91_PIN(1,1,22) // Programmable Clock Output 2
#define AT91_USART_DCD1   AT91_PIN(1,1,23) // USART 1 Data Carrier Detect
#define AT91_USART_DSR1   AT91_PIN(1,1,24) // USART 1 Data Set Ready
#define AT91_USART_DTR1   AT91_PIN(1,1,25) // USART 1 Data Terminal Ready
#define AT91_USART_RI1    AT91_PIN(1,1,26) // USART 1 Ring Indication
#define AT91_PWM_PWM0X    AT91_PIN(1,1,27) // Pulse Width Modulation #0
#define AT91_PWM_PWM1X    AT91_PIN(1,1,28) // Pulse Width Modulation #1
#define AT91_PWM_PWM2X    AT91_PIN(1,1,29) // Pulse Width Modulation #2
#define AT91_PWM_PWM3X    AT91_PIN(1,1,30) // Pulse Width Modulation #3

// PIO Controller A, peripheral A
#define AT91_PIO_PSR_RXD0      (1<< 0) // USART 0 Receive Data
#define AT91_PIO_PSR_TXD0      (1<< 1) // USART 0 Transmit Data 
#define AT91_PIO_PSR_SCK0      (1<< 2) // USART 0 Serial Clock
#define AT91_PIO_PSR_RTS0      (1<< 3) // USART 0 Request To Send
#define AT91_PIO_PSR_CTS0      (1<< 4) // USART 0 Clear To Send
#define AT91_PIO_PSR_RXD1      (1<< 5) // USART 1 Receive Data 
#define AT91_PIO_PSR_TXD1      (1<< 6) // USART 1 Transmit Data 
#define AT91_PIO_PSR_SCK1      (1<< 7) // USART 1 Serial Clock
#define AT91_PIO_PSR_RTS1      (1<< 8) // USART 1 Request To Send
#define AT91_PIO_PSR_CTS1      (1<< 9) // USART 1 Clear To Send
#define AT91_PIO_PSR_TWD       (1<<10) // Two Wire Data
#define AT91_PIO_PSR_TWCK      (1<<11) // Two Wire Clock
#define AT91_PIO_PSR_SPI_NPCS0 (1<<12) // SPI 0 Chip Select 0
#define AT91_PIO_PSR_SPI_NPCS1 (1<<13) // SPI 0 Chip Select 1 
#define AT91_PIO_PSR_SPI_NPCS2 (1<<14) // SPI 0 Chip Select 2 
#define AT91_PIO_PSR_SPI_NPCS3 (1<<15) // SPI 0 Chip Select 3 
#define AT91_PIO_PSR_SPI_MISO  (1<<16) // SPI 0 Master In Slave Out
#define AT91_PIO_PSR_SPI_MOSI  (1<<17) // SPI 0 Master Out Slave In 
#define AT91_PIO_PSR_SPI_SPCK  (1<<18) // SPI 0 Clock
#define AT91_PIO_PSR_CANRX     (1<<19) // CAN Receive
#define AT91_PIO_PSR_CANTX     (1<<20) // CAN Transmit 
#define AT91_PIO_PSR_TF        (1<<21) // SSC Transmit Frame Sync 
#define AT91_PIO_PSR_TK        (1<<22) // SSC Transmit Clock 
#define AT91_PIO_PSR_TD        (1<<23) // SSC Transmit Data 
#define AT91_PIO_PSR_RD        (1<<24) // SSC Receive Data 
#define AT91_PIO_PSR_RK        (1<<25) // SSC Receive Clock 
#define AT91_PIO_PSR_RF        (1<<26) // SSC Receive Frame Sync 
#define AT91_PIO_PSR_DRXD      (1<<27) // DBGU Receive Data 
#define AT91_PIO_PSR_DTXD      (1<<28) // DBGU Transmit Data 
#define AT91_PIO_PSR_FIQ       (1<<29) // Fast Interrupt Request 
#define AT91_PIO_PSR_IRQ0      (1<<30) // Interrupt Request 0

//PIO controller A, peripheral B
#define AT91_PIO_PSR_SPI1_NPCS1  (1<< 2) // SPI 1 Chip Select 1 
#define AT91_PIO_PSR_SPI1_NPCS2  (1<< 3) // SPI 1 Chip Select 2 
#define AT91_PIO_PSR_SPI1_NPCS3  (1<< 4) // SPI 1 Chip Select 3 
#define AT91_PIO_PSR_SPI_NPCS1X  (1<< 7) // SPI 0 Chip Select 1 
#define AT91_PIO_PSR_SPI_NPCS2X  (1<< 8) // SPI 0 Chip Select 2 
#define AT91_PIO_PSR_SPI_NPCS3X  (1<< 9) // SPI 0 Chip Select 3 
#define AT91_PIO_PSR_PCK1        (1<<13) // Programmable Clock Output 1 
#define AT91_PIO_PSR_IRQ1        (1<<14) // Interrupt Request 1
#define AT91_PIO_PSR_TCLK1       (1<<15) // Timer/Counter 1 Clock Input
#define AT91_PIO_PSR_SPI1_NPCS0  (1<<21) // SPI 1 Chip Select 0 
#define AT91_PIO_PSR_SPI1_SPCK   (1<<22) // SPI 1 Clock
#define AT91_PIO_PSR_SPI1_MOSI   (1<<23) // SPI 1 Master Out Slave In 
#define AT91_PIO_PSR_SPI1_MISO   (1<<24) // SPI 0 Master In Slave Out
#define AT91_PIO_PSR_SPI1_NPCS1X (1<<25) // SPI 1 Chip Select 1 
#define AT91_PIO_PSR_SPI1_NPCS2X (1<<26) // SPI 1 Chip Select 2 
#define AT91_PIO_PSR_PCK3        (1<<27) // Programmable Clock Output 3
#define AT91_PIO_PSR_SPI1_NPCS3X (1<<29) // SPI 1 Chip Select 3 
#define AT91_PIO_PSR_PCK2        (1<<30) // Programmable Clock Output 2

//PIO Controller B, Peripheral A
#define AT91_PIO_PSR_EREFCK   (1<< 0) // EMAC Reference Clock 
#define AT91_PIO_PSR_ETXEN    (1<< 1) // EMAC Transmit Enable 
#define AT91_PIO_PSR_ETX0     (1<< 2) // EMAC Transmit Data 0 
#define AT91_PIO_PSR_ETX1     (1<< 3) // EMAC Transmit Data 1  
#define AT91_PIO_PSR_ECRS     (1<< 4) // EMAC Carrier Sense 
#define AT91_PIO_PSR_ERX0     (1<< 5) // EMAC Receive Data 0   
#define AT91_PIO_PSR_ERX1     (1<< 6) // EMAC Receive Data 1    
#define AT91_PIO_PSR_ERXER    (1<< 7) // EMAC Receive Error 
#define AT91_PIO_PSR_EMDC     (1<< 8) // EMAC Management Data Clock 
#define AT91_PIO_PSR_EMDIO    (1<< 9) // EMAC Management Data IO
#define AT91_PIO_PSR_ETX2     (1<<10) // EMAC Transmit Data 2    
#define AT91_PIO_PSR_ETX3     (1<<11) // EMAC Transmit Data 3    
#define AT91_PIO_PSR_ETXER    (1<<12) // EMAC Transmit Coding Error 
#define AT91_PIO_PSR_ERX2     (1<<13) // EMAC Receive Data 2     
#define AT91_PIO_PSR_ERX3     (1<<14) // EMAC Receive Data 3     
#define AT91_PIO_PSR_ECRSDV   (1<<15) // EMAC Carrier Sense And Data Valid 
#define AT91_PIO_PSR_ECOL     (1<<16) // EMAC Collision Detected 
#define AT91_PIO_PSR_ERXCK    (1<<17) // EMAC Receive Clock 
#define AT91_PIO_PSR_EF100    (1<<18) // EMAC Force 100Mb/s 
#define AT91_PIO_PSR_PWM0     (1<<19) // Pulse Width Modulation #0
#define AT91_PIO_PSR_PWM1     (1<<20) // Pulse Width Modulation #1
#define AT91_PIO_PSR_PWM2     (1<<21) // Pulse Width Modulation #2
#define AT91_PIO_PSR_PWM3     (1<<22) // Pulse Width Modulation #3
#define AT91_PIO_PSR_TIOA0    (1<<23) // Timer/Counter 0 IO Line A
#define AT91_PIO_PSR_TIOB0    (1<<24) // Timer/Counter 0 IO Line B
#define AT91_PIO_PSR_TIOA1    (1<<25) // Timer/Counter 1 IO Line A
#define AT91_PIO_PSR_TIOB1    (1<<26) // Timer/Counter 1 IO Line B
#define AT91_PIO_PSR_TIOA2    (1<<27) // Timer/Counter 2 IO Line A
#define AT91_PIO_PSR_TIOB2    (1<<28) // Timer/Counter 2 IO Line B
#define AT91_PIO_PSR_PCK1X    (1<<29) // Programmable Clock Output 1
#define AT91_PIO_PSR_PCK2     (1<<30) // Programmable Clock Output 2

//PIO Controller B Peripheral B
#define AT91_PIO_PSR_PCK0         (1<< 0) // Programmable Clock Output 0
#define AT91_PIO_PSR_SPI1_NPCS1XX (1<<10) // SPI 1 Chip Select 1 
#define AT91_PIO_PSR_SPI1_NPCS2XX (1<<11) // SPI 1 Chip Select 2 
#define AT91_PIO_PSR_TCLK0        (1<<12) // Timer/Counter 0 Clock Input
#define AT91_PIO_PSR_SPI_NPCS1    (1<<13) // SPI 0 Chip Select 1 
#define AT91_PIO_PSR_SPI_NPCS2    (1<<14) // SPI 0 Chip Select 2 
#define AT91_PIO_PSR_SPI1_NPCS3XX (1<<16) // SPI 1 Chip Select 3 
#define AT91_PIO_PSR_SPI_NPCS3XX  (1<<17) // SPI 0 Chip Select 3 
#define AT91_PIO_PSR_ADTRG        (1<<18) // ADC Trigger
#define AT91_PIO_PSR_TCLK1X       (1<<19) // Timer/Counter 1 Clock Input
#define AT91_PIO_PSR_PCK0X        (1<<20) // Programmable Clock Output 0
#define AT91_PIO_PSR_PCK1XX       (1<<21) // Programmable Clock Output 1
#define AT91_PIO_PSR_PCK2X        (1<<22) // Programmable Clock Output 2
#define AT91_PIO_PSR_DCD1         (1<<23) // USART 1 Data Carrier Detect
#define AT91_PIO_PSR_DSR1         (1<<24) // USART 1 Data Set Ready
#define AT91_PIO_PSR_DTR1         (1<<25) // USART 1 Data Terminal Ready
#define AT91_PIO_PSR_RI1          (1<<26) // USART 1 Ring Indication
#define AT91_PIO_PSR_PWM0X        (1<<27) // Pulse Width Modulation #0
#define AT91_PIO_PSR_PWM1X        (1<<28) // Pulse Width Modulation #1
#define AT91_PIO_PSR_PWM2X        (1<<29) // Pulse Width Modulation #2
#define AT91_PIO_PSR_PWM3X        (1<<30) // Pulse Width Modulation #3
#endif

#ifdef CYGHWR_HAL_ARM_AT91SAM7XC
#error Sorry, still missing. Happy typing
#endif

#else
#define AT91_TC_TCLK0    AT91_PIN(0,0, 0) // Timer #0 clock
#define AT91_TC_TIOA0    AT91_PIN(0,0, 1) // Timer #0 signal A
#define AT91_TC_TIOB0    AT91_PIN(0,0, 2) // Timer #0 signal B
#define AT91_TC_TCLK1    AT91_PIN(0,0, 3) // Timer #1 clock
#define AT91_TC_TIOA1    AT91_PIN(0,0, 4) // Timer #1 signal A
#define AT91_TC_TIOB1    AT91_PIN(0,0, 5) // Timer #1 signal B
#define AT91_TC_TCLK2    AT91_PIN(0,0, 6) // Timer #2 clock
#define AT91_TC_TIOA2    AT91_PIN(0,0, 7) // Timer #2 signal A
#define AT91_TC_TIOB2    AT91_PIN(0,0, 8) // Timer #2 signal B
#define AT91_INT_IRQ0    AT91_PIN(0,0, 9) // IRQ #0
#define AT91_INT_IRQ1    AT91_PIN(0,0,10) // IRQ #1
#define AT91_INT_IRQ2    AT91_PIN(0,0,11) // IRQ #2
#define AT91_INT_FIQ     AT91_PIN(0,0,12) // FIQ
#define AT91_USART_SCK0  AT91_PIN(0,0,13) // Serial port #0 clock
#define AT91_USART_TXD0  AT91_PIN(0,0,14) // Serial port #0 TxD
#define AT91_USART_RXD0  AT91_PIN(0,0,15) // Serial port #0 RxD
#define AT91_USART_SCK1  AT91_PIN(0,0,20) // Serial port #1 clock
#define AT91_USART_TXD1  AT91_PIN(0,0,21) // Serial port #1 TxD
#define AT91_USART_RXD1  AT91_PIN(0,0,22) // Serial port #1 RxD
#define AT91_CLK_MCKO    AT91_PIN(0,0,25) // Master clock out

#define AT91_PIO_PSR_TCLK0    0x00000001 // Timer #0 clock
#define AT91_PIO_PSR_TIOA0    0x00000002 // Timer #0 signal A
#define AT91_PIO_PSR_TIOB0    0x00000004 // Timer #0 signal B
#define AT91_PIO_PSR_TCLK1    0x00000008 // Timer #1 clock
#define AT91_PIO_PSR_TIOA1    0x00000010 // Timer #1 signal A
#define AT91_PIO_PSR_TIOB1    0x00000020 // Timer #1 signal B
#define AT91_PIO_PSR_TCLK2    0x00000040 // Timer #2 clock
#define AT91_PIO_PSR_TIOA2    0x00000080 // Timer #2 signal A
#define AT91_PIO_PSR_TIOB2    0x00000100 // Timer #2 signal B
#define AT91_PIO_PSR_IRQ0     0x00000200 // IRQ #0
#define AT91_PIO_PSR_IRQ1     0x00000400 // IRQ #1
#define AT91_PIO_PSR_IRQ2     0x00000800 // IRQ #2
#define AT91_PIO_PSR_FIQ      0x00001000 // FIQ
#define AT91_PIO_PSR_SCK0     0x00002000 // Serial port #0 clock
#define AT91_PIO_PSR_TXD0     0x00004000 // Serial port #0 TxD
#define AT91_PIO_PSR_RXD0     0x00008000 // Serial port #0 RxD
#define AT91_PIO_PSR_P16      0x00010000 // PIO port #16
#define AT91_PIO_PSR_P17      0x00020000 // PIO port #17
#define AT91_PIO_PSR_P18      0x00040000 // PIO port #18
#define AT91_PIO_PSR_P19      0x00080000 // PIO port #19
#define AT91_PIO_PSR_SCK1     0x00100000 // Serial port #1 clock
#define AT91_PIO_PSR_TXD1     0x00200000 // Serial port #1 TxD
#define AT91_PIO_PSR_RXD1     0x00400000 // Serial port #1 RxD
#define AT91_PIO_PSR_P23      0x00800000 // PIO port #23
#define AT91_PIO_PSR_P24      0x01000000 // PIO port #24
#define AT91_PIO_PSR_MCKO     0x02000000 // Master clock out
#define AT91_PIO_PSR_NCS2     0x04000000 // Chip select #2
#define AT91_PIO_PSR_NCS3     0x08000000 // Chip select #3
#define AT91_PIO_PSR_CS7_A20  0x10000000 // Chip select #7 or A20
#define AT91_PIO_PSR_CS6_A21  0x20000000 // Chip select #6 or A21
#define AT91_PIO_PSR_CS5_A22  0x40000000 // Chip select #5 or A22
#define AT91_PIO_PSR_CS4_A23  0x80000000 // Chip select #4 or A23
#endif

#define AT91_PIO_OER  0x10  // Output enable
#define AT91_PIO_ODR  0x14  // Output disable
#define AT91_PIO_OSR  0x18  // Output status
#define AT91_PIO_IFER 0x20  // Input Filter enable
#define AT91_PIO_IFDR 0x24  // Input Filter disable
#define AT91_PIO_IFSR 0x28  // Input Filter status
#define AT91_PIO_SODR 0x30  // Set out bits
#define AT91_PIO_CODR 0x34  // Clear out bits
#define AT91_PIO_ODSR 0x38  // Output data status
#define AT91_PIO_PDSR 0x3C  // Pin data status
#define AT91_PIO_IER  0x40  // Interrupt enable
#define AT91_PIO_IDR  0x44  // Interrupt disable
#define AT91_PIO_IMR  0x48  // Interrupt mask
#define AT91_PIO_ISR  0x4C  // Interrupt status

#if defined(CYGHWR_HAL_ARM_AT91SAM7)
#define AT91_PIO_MDER  0x50  // Multi-drive Enable Register
#define AT91_PIO_MDDR  0x54  // Multi-drive Disable Register
#define AT91_PIO_MDSR  0x58  // Multi-drive Status Register
#define AT91_PIO_PPUDR 0x60  // Pad Pull-up Disable Register
#define AT91_PIO_PPUER 0x64  // Pad Pull-up Enable Register
#define AT91_PIO_PPUSR 0x68  // Pad Pull-Up Status Register
#define AT91_PIO_ASR   0x70  // Select A Register
#define AT91_PIO_BSR   0x74  // Select B Regsiter
#define AT91_PIO_ABS   0x78  // AB Select Regsiter
#define AT91_PIO_OWER  0xa0  // Output Write Enable Register
#define AT91_PIO_OWDR  0xa4  // Output Write Disable Register
#define AT91_PIO_OWSR  0xa8  // Output Write Status Register
#endif // CYGHWR_HAL_ARM_AT91SAM7

//=============================================================================
// Advanced Interrupt Controller (AIC)

#ifndef AT91_AIC
#define AT91_AIC      0xFFFFF000
#endif