var_io.h

开放源码实时操作系统源码.

#ifndef CYGONCE_HAL_VAR_IO_H
#define CYGONCE_HAL_VAR_IO_H
//=============================================================================
//
//      var_io.h
//
//      Variant specific registers
//
//=============================================================================
//####ECOSGPLCOPYRIGHTBEGIN####
// -------------------------------------------
// This file is part of eCos, the Embedded Configurable Operating System.
// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
// Copyright (C) 2006 eCosCentric Ltd.
//
// eCos is free software; you can redistribute it and/or modify it under
// the terms of the GNU General Public License as published by the Free
// Software Foundation; either version 2 or (at your option) any later version.
//
// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
// WARRANTY; without even the implied warranty of MERCHANTABILITY or
// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
// for more details.
//
// You should have received a copy of the GNU General Public License along
// with eCos; if not, write to the Free Software Foundation, Inc.,
// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
//
// As a special exception, if other files instantiate templates or use macros
// or inline functions from this file, or you compile this file and link it
// with other works to produce a work based on this file, this file does not
// by itself cause the resulting work to be covered by the GNU General Public
// License. However the source code for this file must still be made available
// in accordance with section (3) of the GNU General Public License.
//
// This exception does not invalidate any other reasons why a work based on
// this file might be covered by the GNU General Public License.
// -------------------------------------------
//####ECOSGPLCOPYRIGHTEND####
//=============================================================================
//#####DESCRIPTIONBEGIN####
//
// Author(s):   Ilija Koco <[e-mail]> 
// Contributors:
// Date:        2006-02-03
// Purpose:     MAC7100 variant specific registers
// Description: based on freescale's mac7100.h
// Usage:       #include <cyg/hal/var_io.h>
//
//####DESCRIPTIONEND####
//
//=============================================================================

#include <cyg/hal/plf_io.h>

#if !defined HAL_IO_MACROS_NO_ADDRESS_MUNGING
#define HAL_IO_MACROS_NO_ADDRESS_MUNGING 1
#endif // HAL_IO_MACROS_NO_ADDRESS_MUNGING

// *********************************************************************
//
// INTC Module
//
// *********************************************************************

// Interrupt Controller Definitions 
#define MAC7100_INTC_BASE      (0xFC048000)

#define MAC7100_IPRH_OFFSET    (0x0000)
#define MAC7100_IPRL_OFFSET    (0x0004)
#define MAC7100_IMRH_OFFSET    (0x0008)
#define MAC7100_IMRL_OFFSET    (0x000C)
#define MAC7100_INTFRCH_OFFSET (0x0010)
#define MAC7100_INTFRCL_OFFSET (0x0014)
#define MAC7100_ICONFIG_OFFSET (0x001B)
#define MAC7100_SIMR_OFFSET    (0x001C)
#define MAC7100_CIMR_OFFSET    (0x001D)
#define MAC7100_CLMASK_OFFSET  (0x001E) // CLMASK - Current Level Mask Register
#define MAC7100_SLMASK_OFFSET  (0x001F) // SLMASK - Saved Level Mask Register 
#define MAC7100_ICR_OFFSET     (0x0040)
#define MAC7100_IRQIACK_OFFSET (0x00EC)
#define MAC7100_FIQIACK_OFFSET (0x00F0)

#define MAC7100_INTC_IPRH(intc_base)    (intc_base + MAC7100_IPRH_OFFSET)
#define MAC7100_INTC_IPRL(intc_base)    (intc_base + MAC7100_IPRL_OFFSET)
#define MAC7100_INTC_IMRH(intc_base)    (intc_base + MAC7100_IMRH_OFFSET)
#define MAC7100_INTC_IMRL(intc_base)    (intc_base + MAC7100_IMRL_OFFSET)
#define MAC7100_INTC_INTFRC(intc_base)  (intc_base + MAC7100_INTFRCH_OFFSET)
#define MAC7100_INTC_INTFRCH(intc_base) (intc_base + MAC7100_INTFRCH_OFFSET)
#define MAC7100_INTC_INTFRCL(intc_base) (intc_base + MAC7100_INTFRCL_OFFSET)
#define MAC7100_INTC_ICONFIG(intc_base) (intc_base + MAC7100_ICONFIG_OFFSET)
#define MAC7100_INTC_IRQIACK(intc_base) (intc_base + MAC7100_IRQIACK_OFFSET)
#define MAC7100_INTC_FIQIACK(intc_base) (intc_base + MAC7100_FIQIACK_OFFSET)
#define MAC7100_INTC_ICR(intc_base,src) (intc_base + MAC7100_ICR_OFFSET + src)
#define MAC7100_INTC_SIMR(intc_base)    (intc_base + MAC7100_SIMR_OFFSET)
#define MAC7100_INTC_CIMR(intc_base)    (intc_base + MAC7100_CIMR_OFFSET)
#define MAC7100_INTC_CLMASK(intc_base)  (intc_base + MAC7100_CLMASK_OFFSET)
#define MAC7100_INTC_SLMASK(intc_base)  (intc_base + MAC7100_SLMASK_OFFSET)

#define MAC7100_INTC_INT_LEVEL(lev) (lev)

// hardware interrupt source vector numbers 
#define MAC7100_EDMA0_IV        (0)
#define MAC7100_EDMA1_IV        (1)
#define MAC7100_EDMA2_IV        (2)
#define MAC7100_EDMA3_IV        (3)
#define MAC7100_EDMA4_IV        (4)
#define MAC7100_EDMA5_IV        (5)
#define MAC7100_EDMA6_IV        (6)
#define MAC7100_EDMA7_IV        (7)
#define MAC7100_EDMA8_IV        (8)
#define MAC7100_EDMA9_IV        (9)
#define MAC7100_EDMA10_IV       (10)
#define MAC7100_EDMA11_IV       (11)
#define MAC7100_EDMA12_IV       (12)
#define MAC7100_EDMA13_IV       (13)
#define MAC7100_EDMA14_IV       (14)
#define MAC7100_EDMA15_IV       (15)
#define MAC7100_EDMA_Error_IV   (16)
#define MAC7100_MCM_SWT_IV      (17)
#define MAC7100_CRG_IV          (18)
#define MAC7100_PIT1_IV         (19)
#define MAC7100_PIT2_IV         (20)
#define MAC7100_PIT3_IV         (21)
#define MAC7100_PIT4_RTI_IV     (22)
#define MAC7100_VREG_IV         (23)
#define MAC7100_CAN_A_MB_IV     (24)
#define MAC7100_CAN_A_MB14_IV   (25)
#define MAC7100_CAN_A_Error_IV  (26)
#define MAC7100_CAN_B_MB_IV     (27)
#define MAC7100_CAN_B_MB14_IV   (28)
#define MAC7100_CAN_B_Error_IV  (29)
#define MAC7100_CAN_C_MB_IV     (30)
#define MAC7100_CAN_C_MB14_IV   (31)
#define MAC7100_CAN_C_Error_IV  (32)
#define MAC7100_CAN_D_MB_IV     (33)
#define MAC7100_CAN_D_MB14_IV   (34)
#define MAC7100_CAN_D_Error_IV  (35)
#define MAC7100_I2C_IV          (36)
#define MAC7100_DSPI_A_IV       (37)
#define MAC7100_DSPI_B_IV       (38)
#define MAC7100_ESCI_A_IV       (39)
#define MAC7100_ESCI_B_IV       (40)
#define MAC7100_ESCI_C_IV       (41)
#define MAC7100_ESCI_D_IV       (42)
#define MAC7100_EMIOS0_IV       (43)
#define MAC7100_EMIOS1_IV       (44)
#define MAC7100_EMIOS2_IV       (45)
#define MAC7100_EMIOS3_IV       (46)
#define MAC7100_EMIOS4_IV       (47)
#define MAC7100_EMIOS5_IV       (48)
#define MAC7100_EMIOS6_IV       (49)
#define MAC7100_EMIOS7_IV       (50)
#define MAC7100_EMIOS8_IV       (51)
#define MAC7100_EMIOS9_IV       (52)
#define MAC7100_EMIOS10_IV      (53)
#define MAC7100_EMIOS11_IV      (54)
#define MAC7100_EMIOS12_IV      (55)
#define MAC7100_EMIOS13_IV      (56)
#define MAC7100_EMIOS14_IV      (57)
#define MAC7100_EMIOS15_IV      (58)
#define MAC7100_ATD_IV          (59)
#define MAC7100_CFM_IV          (60)
#define MAC7100_PIM_IV          (61)
#define MAC7100_IRQ_IV          (62)
#define MAC7100_XIRQ_IV         (63)

#define MAC7100_IRQ_SPURIOUS     (-1)

// *******************************************************************
//
// eSCI Module 
//      Note: eSCI definitions are in cyg/devs/ser_esci.h
// *******************************************************************
#define CYGADDR_IO_SERIAL_FREESCALE_ESCI_A_BASE 0xFC0C4000
#define CYGNUM_IO_SERIAL_FREESCALE_ESCI_A_INT_VECTOR MAC7100_ESCI_A_IV

#define CYGADDR_IO_SERIAL_FREESCALE_ESCI_B_BASE 0xFC0C8000
#define CYGNUM_IO_SERIAL_FREESCALE_ESCI_B_INT_VECTOR MAC7100_ESCI_B_IV

#define CYGADDR_IO_SERIAL_FREESCALE_ESCI_C_BASE 0xFC0CC000
#define CYGNUM_IO_SERIAL_FREESCALE_ESCI_C_INT_VECTOR MAC7100_ESCI_C_IV

#define CYGADDR_IO_SERIAL_FREESCALE_ESCI_D_BASE 0xFC0D0000
#define CYGNUM_IO_SERIAL_FREESCALE_ESCI_D_INT_VECTOR MAC7100_ESCI_D_IV

#define CYGNUM_DEV_SER_FREESCALE_ESCI_SYSTEM_CLOCK \
  (CYGNUM_HAL_ARM_MAC7100_CLOCK_SPEED/2)
#define FREESCALE_ESCI_BAUD(baud_rate)            \
  ((CYGNUM_DEV_SER_FREESCALE_ESCI_SYSTEM_CLOCK)/(baud_rate*16))


// *********************************************************************
//
// PIT Module
//
// *********************************************************************

// Periodic Interrupt Timer Module Definitions 

#define MAC7100_PIT_BASE         (0xFC08C000)
#define MAC7100_TLVAL0_OFFSET    (0x0000)
#define MAC7100_TVAL0_OFFSET     (0x0080)

#define MAC7100_PIT_TLVAL(pit_base,chan)        \
  (pit_base + MAC7100_TLVAL0_OFFSET + (4 * chan))
#define MAC7100_PIT_TVAL(pit_base,chan)   \
  (pit_base + MAC7100_TVAL0_OFFSET + (4 * chan))

#define MAC7100_PITFLG_OFFSET         (0x0100)
#define MAC7100_PITINTEN_OFFSET       (0x0104)
#define MAC7100_PITINTSEL_OFFSET      (0x0108)
#define MAC7100_PITEN_OFFSET          (0x010C)
#define MAC7100_PITCTRL_OFFSET        (0x0110)

#define MAC7100_PIT_FLAG_RTIF         (0x00000001)
#define MAC7100_PIT_FLAG_TIF(chan)    (0x00000001 << chan)
#define MAC7100_PIT_INTSEL_ISEL(chan) (0x00000001 << chan)
#define MAC7100_PIT_INTEN_RTIE        (0x00000001)
#define MAC7100_PIT_INTEN_TIE(chan)   (0x00000001 << chan)

#define MAC7100_PIT_EN_RTIEN          (0x00000001)
#define MAC7100_PIT_EN_PEN(chan)      (0x00000001 << chan)

#define MAC7100_PIT_FLG(pit_base)    (pit_base + MAC7100_PITFLG_OFFSET)
#define MAC7100_PIT_INTEN(pit_base)  (pit_base + MAC7100_PITINTEN_OFFSET)
#define MAC7100_PIT_INTSEL(pit_base) (pit_base + MAC7100_PITINTSEL_OFFSET)
#define MAC7100_PIT_EN(pit_base)     (pit_base + MAC7100_PITEN_OFFSET)

#define MAC7100_PIT_CTRL(pit_base)   (pit_base + MAC7100_PITCTRL_OFFSET)
#define MAC7100_PIT_MDIS    (0x01000000)


// *********************************************************************
//
// PIM Module