📄 hal_diag.c
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/*=============================================================================
//
// hal_diag.c
//
// HAL diagnostic output code
//
//=============================================================================
//####ECOSGPLCOPYRIGHTBEGIN####
// -------------------------------------------
// This file is part of eCos, the Embedded Configurable Operating System.
// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
//
// eCos is free software; you can redistribute it and/or modify it under
// the terms of the GNU General Public License as published by the Free
// Software Foundation; either version 2 or (at your option) any later version.
//
// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
// WARRANTY; without even the implied warranty of MERCHANTABILITY or
// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
// for more details.
//
// You should have received a copy of the GNU General Public License along
// with eCos; if not, write to the Free Software Foundation, Inc.,
// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
//
// As a special exception, if other files instantiate templates or use macros
// or inline functions from this file, or you compile this file and link it
// with other works to produce a work based on this file, this file does not
// by itself cause the resulting work to be covered by the GNU General Public
// License. However the source code for this file must still be made available
// in accordance with section (3) of the GNU General Public License.
//
// This exception does not invalidate any other reasons why a work based on
// this file might be covered by the GNU General Public License.
//
// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
// at http://sources.redhat.com/ecos/ecos-license/
// -------------------------------------------
//####ECOSGPLCOPYRIGHTEND####
//=============================================================================
//#####DESCRIPTIONBEGIN####
//
// Author(s): nickg, gthomas
// Contributors:nickg, gthomas
// Date: 1998-03-02
// Purpose: HAL diagnostic output
// Description: Implementations of HAL diagnostic output support.
//
//####DESCRIPTIONEND####
//
//===========================================================================*/
#include <pkgconf/hal.h>
#include <pkgconf/system.h>
#include CYGBLD_HAL_PLATFORM_H
#include <cyg/infra/cyg_type.h> // base types
#include <cyg/infra/cyg_trac.h> // tracing macros
#include <cyg/infra/cyg_ass.h> // assertion macros
#include <cyg/hal/hal_arch.h> // basic machine info
#include <cyg/hal/hal_intr.h> // interrupt macros
#include <cyg/hal/hal_io.h> // IO macros
#include <cyg/hal/hal_if.h> // calling interface API
#include <cyg/hal/hal_misc.h> // helper functions
#include <cyg/hal/hal_diag.h>
#include <cyg/hal/drv_api.h>
#include <cyg/hal/hal_edb7xxx.h> // Hardware definitions
//-----------------------------------------------------------------------------
struct edb_serial {
volatile cyg_uint32 ctrl;
cyg_uint32 pad004_040[16-1];
volatile cyg_uint32 stat;
cyg_uint32 pad044_37c[208-1];
union {
volatile cyg_uint8 write;
volatile cyg_uint32 read; // Need to read 32 bits
} data;
cyg_uint32 pad384_3BC[16-1];
volatile cyg_uint32 blcr;
};
//-----------------------------------------------------------------------------
typedef struct {
volatile struct edb_serial* base;
cyg_int32 msec_timeout;
int isr_vector;
int baud_rate;
} channel_data_t;
//-----------------------------------------------------------------------------
static void
cyg_hal_plf_serial_init_channel(channel_data_t* __ch_data)
{
channel_data_t* chan = (channel_data_t*)__ch_data;
// Enable port
chan->base->ctrl |= SYSCON1_UART1EN;
// Configure
chan->base->blcr = UART_BITRATE(chan->baud_rate) |
UBLCR_FIFOEN | UBLCR_WRDLEN8;
}
// Call this delay function when polling for serial access - otherwise
// the CPU will keep the memory bus busy and thus prevent DRAM refresh
// (and the resulting memory corruption).
externC void dram_delay_loop(void);
void
cyg_hal_plf_serial_putc(void *__ch_data, char c)
{
channel_data_t* chan = (channel_data_t*)__ch_data;
CYGARC_HAL_SAVE_GP();
// Wait for Tx FIFO not full
while ((chan->base->stat & SYSFLG1_UTXFF1) != 0) ;
chan->base->data.write = c;
CYGARC_HAL_RESTORE_GP();
}
static cyg_bool
cyg_hal_plf_serial_getc_nonblock(void* __ch_data, cyg_uint8* ch)
{
channel_data_t* chan = (channel_data_t*)__ch_data;
if ((chan->base->stat & SYSFLG1_URXFE1) != 0)
return false;
*ch = (cyg_uint8)(chan->base->data.read & 0xFF);
return true;
}
cyg_uint8
cyg_hal_plf_serial_getc(void* __ch_data)
{
cyg_uint8 ch;
int delay_timer = 0;
CYGARC_HAL_SAVE_GP();
while(!cyg_hal_plf_serial_getc_nonblock(__ch_data, &ch)) {
CYGACC_CALL_IF_DELAY_US(50); // A reasonable time
// Only delay every 10ms or so
if (++delay_timer == 10*20) {
dram_delay_loop();
delay_timer = 0;
}
}
CYGARC_HAL_RESTORE_GP();
return ch;
}
static channel_data_t edb_ser_channels[2] = {
{(volatile struct edb_serial*)SYSCON1, 1000, CYGNUM_HAL_INTERRUPT_URXINT1, CYGNUM_HAL_VIRTUAL_VECTOR_CONSOLE_CHANNEL_BAUD},
{(volatile struct edb_serial*)SYSCON2, 1000, CYGNUM_HAL_INTERRUPT_URXINT2, CYGNUM_HAL_VIRTUAL_VECTOR_CONSOLE_CHANNEL_BAUD}
};
static void
cyg_hal_plf_serial_write(void* __ch_data, const cyg_uint8* __buf,
cyg_uint32 __len)
{
CYGARC_HAL_SAVE_GP();
while(__len-- > 0)
cyg_hal_plf_serial_putc(__ch_data, *__buf++);
CYGARC_HAL_RESTORE_GP();
}
static void
cyg_hal_plf_serial_read(void* __ch_data, cyg_uint8* __buf, cyg_uint32 __len)
{
CYGARC_HAL_SAVE_GP();
while(__len-- > 0)
*__buf++ = cyg_hal_plf_serial_getc(__ch_data);
CYGARC_HAL_RESTORE_GP();
}
cyg_bool
cyg_hal_plf_serial_getc_timeout(void* __ch_data, cyg_uint8* ch)
{
int delay_count;
channel_data_t* chan = (channel_data_t*)__ch_data;
cyg_bool res;
CYGARC_HAL_SAVE_GP();
delay_count = chan->msec_timeout * 10; // delay in .1 ms steps
for(;;) {
res = cyg_hal_plf_serial_getc_nonblock(__ch_data, ch);
if (res || 0 == delay_count--)
break;
CYGACC_CALL_IF_DELAY_US(100);
}
CYGARC_HAL_RESTORE_GP();
return res;
}
static int
cyg_hal_plf_serial_control(void *__ch_data, __comm_control_cmd_t __func, ...)
{
static int irq_state = 0;
channel_data_t* chan = (channel_data_t*)__ch_data;
int ret = 0;
va_list ap;
CYGARC_HAL_SAVE_GP();
va_start(ap, __func);
switch (__func) {
case __COMMCTL_GETBAUD:
ret = chan->baud_rate;
break;
case __COMMCTL_SETBAUD:
chan->baud_rate = va_arg(ap, cyg_int32);
// Should we verify this value here?
cyg_hal_plf_serial_init_channel(chan);
ret = 0;
break;
case __COMMCTL_IRQ_ENABLE:
irq_state = 1;
HAL_INTERRUPT_UNMASK(chan->isr_vector);
break;
case __COMMCTL_IRQ_DISABLE:
ret = irq_state;
irq_state = 0;
HAL_INTERRUPT_MASK(chan->isr_vector);
break;
case __COMMCTL_DBG_ISR_VECTOR:
ret = chan->isr_vector;
break;
case __COMMCTL_SET_TIMEOUT:
{
va_list ap;
va_start(ap, __func);
ret = chan->msec_timeout;
chan->msec_timeout = va_arg(ap, cyg_uint32);
va_end(ap);
}
default:
break;
}
va_end(ap);
CYGARC_HAL_RESTORE_GP();
return ret;
}
static int
cyg_hal_plf_serial_isr(void *__ch_data, int* __ctrlc,
CYG_ADDRWORD __vector, CYG_ADDRWORD __data)
{
int res = 0;
channel_data_t* chan = (channel_data_t*)__ch_data;
char c;
CYGARC_HAL_SAVE_GP();
cyg_drv_interrupt_acknowledge(chan->isr_vector);
*__ctrlc = 0;
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