flash.c

开放源码实时操作系统源码.

//==========================================================================
//
//        flash.c
//
//        ARM INTEGRATOR A/P FLASH program tool
//
//==========================================================================
//####ECOSGPLCOPYRIGHTBEGIN####
// -------------------------------------------
// This file is part of eCos, the Embedded Configurable Operating System.
// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
//
// eCos is free software; you can redistribute it and/or modify it under
// the terms of the GNU General Public License as published by the Free
// Software Foundation; either version 2 or (at your option) any later version.
//
// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
// WARRANTY; without even the implied warranty of MERCHANTABILITY or
// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
// for more details.
//
// You should have received a copy of the GNU General Public License along
// with eCos; if not, write to the Free Software Foundation, Inc.,
// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
//
// As a special exception, if other files instantiate templates or use macros
// or inline functions from this file, or you compile this file and link it
// with other works to produce a work based on this file, this file does not
// by itself cause the resulting work to be covered by the GNU General Public
// License. However the source code for this file must still be made available
// in accordance with section (3) of the GNU General Public License.
//
// This exception does not invalidate any other reasons why a work based on
// this file might be covered by the GNU General Public License.
//
// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
// at http://sources.redhat.com/ecos/ecos-license/
// -------------------------------------------
//####ECOSGPLCOPYRIGHTEND####
//==========================================================================
//#####DESCRIPTIONBEGIN####
//
// Author(s):     gthomas
// Contributors:  Philippe Robin
// Date:          November 7, 2000
// Description:   Tool used to program onboard FLASH image
//####DESCRIPTIONEND####

//
// This program will program the FLASH on INTEGRATOR A/P board
//

#include <pkgconf/libc.h>   // Configuration header

#include <cyg/kernel/kapi.h>
#include <stdlib.h>
#include <ctype.h>
#include <cyg/infra/testcase.h>
#include <sys/cstartup.h>

#ifndef FALSE
#define FALSE 0
#define TRUE  1
#endif

#define PROGRAM_COMMAND    0x00100010
#define PROGRAM_VERIFY     0x00D000D0
#define READ_STATUS        0x70707070
#define SR_MASK            0x00800080
#define READ_ARRAY         0x00FF00FF
#define BLOCK_ERASE        0x00200020
#define BLOCK_WRITE_MODE   0x00E800E8
#define BLOCK_LOCK_BITS    0x00600060
#define CFI_QUERY_OFFS     0x00000055
#define CFI_QUERY_COMMAND  0x00980098
#define CFI_DATA_OFFS      0x00000020
#define SYS_INFO_SIZE_OFF  0x00000027
#define SYS_INFO_WB_OFF    0x0000002A
#define SYS_ERASE_SIZE_OFF 0x0000002F
#define STATUS_READY_MASK  0x00800080
#define BANK_BOUNDARY      0x0001FFFF
#define STATUS_ERROR       0x00100010
#define MAX_WRITE_BUFF     0xF

// Integrator EBI register definitions

#define INTEGRATOR_EBI_BASE 0x12000000

#define INTEGRATOR_EBI_CSR0_OFFSET      0x00
#define INTEGRATOR_EBI_CSR1_OFFSET      0x04
#define INTEGRATOR_EBI_CSR2_OFFSET      0x08
#define INTEGRATOR_EBI_CSR3_OFFSET      0x0C
#define INTEGRATOR_EBI_LOCK_OFFSET      0x20

#define INTEGRATOR_EBI_CSR0 (INTEGRATOR_EBI_BASE + INTEGRATOR_EBI_CSR0_OFFSET)
#define INTEGRATOR_EBI_CSR1 (INTEGRATOR_EBI_BASE + INTEGRATOR_EBI_CSR1_OFFSET)
#define INTEGRATOR_EBI_CSR2 (INTEGRATOR_EBI_BASE + INTEGRATOR_EBI_CSR2_OFFSET)
#define INTEGRATOR_EBI_CSR3 (INTEGRATOR_EBI_BASE + INTEGRATOR_EBI_CSR3_OFFSET)
#define INTEGRATOR_EBI_LOCK (INTEGRATOR_EBI_BASE + INTEGRATOR_EBI_LOCK_OFFSET)

#define INTEGRATOR_EBI_8_BIT            0x00
#define INTEGRATOR_EBI_16_BIT           0x01
#define INTEGRATOR_EBI_32_BIT           0x02
#define INTEGRATOR_EBI_WRITE_ENABLE     0x04
#define INTEGRATOR_EBI_SYNC             0x08
#define INTEGRATOR_EBI_WS_2             0x00
#define INTEGRATOR_EBI_WS_3             0x10
#define INTEGRATOR_EBI_WS_4             0x20
#define INTEGRATOR_EBI_WS_5             0x30
#define INTEGRATOR_EBI_WS_6             0x40
#define INTEGRATOR_EBI_WS_7             0x50
#define INTEGRATOR_EBI_WS_8             0x60
#define INTEGRATOR_EBI_WS_9             0x70
#define INTEGRATOR_EBI_WS_10            0x80
#define INTEGRATOR_EBI_WS_11            0x90
#define INTEGRATOR_EBI_WS_12            0xA0
#define INTEGRATOR_EBI_WS_13            0xB0
#define INTEGRATOR_EBI_WS_14            0xC0
#define INTEGRATOR_EBI_WS_15            0xD0
#define INTEGRATOR_EBI_WS_16            0xE0
#define INTEGRATOR_EBI_WS_17            0xF0

#define FL_SC_CONTROL			0x06	// Enable Flash Write and Vpp


#define INVALID_FTYPE		0x00000000
#define UNKNOWN_FTYPE		0xFFFFFFFF
#define ATMEL_FTYPE		0x00000001
#define INTEL_FTYPE		0x00000002

#define FLASH_TYPE_MASK		(ATMEL_FTYPE | INTEL_FTYPE)

// On Some platforms Boot and program flash may be part of the same device
#define INTEGRATED_FTYPE	0x80000000
#define BOOT_FTYPE		0x40000000
#define APP_FTYPE		0x20000000

#define FLASH_USAGE_MASK	(BOOT_FTYPE | APP_FTYPE)

#define DEFAULT_FLASH_MASK 0xFFFFFFF8
#define FLASH_BLOCK_SIZE	0x00020000	// 128Kb
#define EPROM_BASE		0x20000000
#define EPROM_SIZE		0x00080000	// 512Kb
#define FLASH_BASE		0x24000000
#define FLASH_SIZE		0x02000000	// 32Mb

typedef int flashWrite(char *address, unsignedint  data, char *flash);
typedef int flashWriteBlock(char *address, unsigned int *data, unsigned int size, char *flash);
typedef int flashRead(char *address, unsigned int *value);
typedef int flashReadBlock(char *address, unsigned int *data, unsigned int size);
typedef int flashErase(char *address, unsigned size, char *flash);
typedef int flashInit(char *address, char *flash);
typedef int flashClose(char *address, char *flash);

typedef struct flashType {
    char *base;			// Base Address of flash
    char *physicalBase;		// before mem initialisation
    unsigned int size;		// Size of flash, in bytes
    unsigned int type;		// Atmel / Intel (CFI) / Unknown
    unsigned int writeSize;	// Size of physical block
    unsigned int eraseSize;	// Size of block erase
    unsigned int logicalSize;	// Size of logical block
    flashWrite *write;   	// Write one word
    flashWriteBlock *writeBlock;// Write a block of writeSize bytes
    flashRead *read;     	// Read one word
    flashReadBlock *readBlock;  // Read a block of writeSize bytes
    flashErase *erase;   	// Erase a block of eraseSize bytes
    flashInit *init;     	// Lock a flash device
    flashClose *close;		// Unlock a flash device
    char *ident;		// identification string
    struct flashType *next;     // Pointer to next flash device
} tFlash;

tFlash Integrator_Flash[2] = {
    {
	(char *)EPROM_BASE,	// Base Address of flash
	(char *)EPROM_BASE,	// Physical Address of flash
	EPROM_SIZE,	        // Size of flash, in bytes (512K)
	BOOT_FTYPE | ATMEL_FTYPE,// Flash type
	FLASH_BLOCK_SIZE,	// Size of physical block
	FLASH_BLOCK_SIZE,	// Size of block erase
	FLASH_BLOCK_SIZE,	// Size of logical block
	ATMEL_Write_Word,	// Write one word
	ATMEL_Write_Block,	// Write a block of WriteSize
	ATMEL_Read_Word,
	ATMEL_Read_Block,
	ATMEL_Erase_Block,
	0,			// Lock a flash device
	0,			// Unlock a flash device
	"Atmel",		// Null terminated Info string
	(tFlash *)&Integrator_Flash[1] // Pointer to next tFlash struct
    },
    {
	(char *)FLASH_BASE,	// Base Address of flash
	(char *)FLASH_BASE,	// Physical Address of flash
	FLASH_SIZE,		// Size of flash, in bytes
	APP_FTYPE | INTEL_FTYPE,// Flash type
	FLASH_BLOCK_SIZE,	// Size of physical block
	FLASH_BLOCK_SIZE,	// Size of block erase
	FLASH_BLOCK_SIZE,	// Size of logical block
	CFI_Write_Word,         // Write one word
        CFI_Write_Block,        // Write a block of writeSize bytes
        CFI_Read_Word,          // Read one word
        CFI_Read_Block,         // Read a block of writeSize bytes
        CFI_Erase_Block,        // Erase a block of eraseSize bytes
	0,			// Lock a flash device
	0,			// Unlock a flash device
	"Intel 28F320S3",       // Null terminated Info string
	0			// Pointer to next tFlash struct
   }
};

#define SYNC_COUNT 63

extern void diag_printf(const char *, ...);
int identify_FLASH(void);
void write_sector(int, char *);
bool load_srecords(char (*readc)(), CYG_ADDRESS *start, int *size);

char dbuf[256];
char *raw = (char *)0x10000;
char *flash_buffer = (char *)0x30000;
int pos, len;

// FUNCTIONS

externC void
cyg_package_start( void )
{
#ifdef CYGPKG_LIBC
    cyg_iso_c_start();
#else
    (void)main(0, NULL);
#endif
} // cyg_package_start()

char nextch(void)
{
    return (raw[pos++]);
}

int
main( int argc, char *argv[] )
{
    int i, j, size;
    CYG_ADDRESS entry;
    char c;

    diag_printf("FLASH here!\n");

    CFI_Identify_Flash(Integrator_Flash[1]);

    while (identify_FLASH() == 0) {
        diag_printf("... Please change FLASH jumper - hit C/R to continue:");
        do {
            hal_diag_read_char(&c);
        } while ((c != '\r') && (c != '\n'));
        diag_printf("\n");
    }
 restart:
    diag_printf("Ready file - hit C/R to continue:");
    while (TRUE) {
        hal_diag_read_char(&c);
        if (c == '>') break;
    }
    i = 0;  j = 0;
    while (1) {
        hal_diag_read_char(&c);
        if (c == '!') {
            diag_printf("... Reset\n");
            goto restart;
        }
        raw[i++] = c;
        if (++j == SYNC_COUNT) {
            hal_diag_write_char(c);
            j = 0;
        }
        if (c == ':') break;
    }
    diag_printf("\n");
    pos = 0;  len = i;
    if (load_srecords(nextch, &entry, &size)) {
        diag_printf("Read %x bytes, entry: %x\n", size, entry);
        dump_buf(flash_buffer, 128);
        diag_printf("\nData loaded - hit '!' to continue:");
        while (TRUE) {
            hal_diag_read_char(&c);
            if (c == '!') break;
        }
        diag_printf("\n");
        diag_printf("...Programming FLASH\n");
        pos = 0;  i = 0;
        while (pos < size) {
            write_sector(i++, flash_buffer+pos);
            pos += 256;
        }
    } else {
        // Display buffer around failure        
        dump_buf(&raw[pos-32], 64);
    }
    diag_printf("All done!\n");
    while (1) ;
}

int
CFI_Identify_Flash(tFlash * flash)
{                                    
     int offset = CFI_DATA_OFFS;
   
     // CFI query to check for CFI string "QRY"
     // Write 0x98 to address flash + 55
    *(unsigned int *)(flash->base + CFI_QUERY_OFFS) = CFI_QUERY_COMMAND;
   
    if ( *(flash->base + offset) == 'Q') {
         int temp = 0;
         offset += 2;

         if ( *(flash->base+ offset) == 'R') {
	     temp =  *(flash->base+ SYS_INFO_SIZE_OFF); // read block size
	     flash->size = 2 ^ temp;
	     temp = *(flash->base+ SYS_ERASE_SIZE_OFF);	// Read Erase Regions
	     temp += ( *(flash->base+ SYS_ERASE_SIZE_OFF + 1) << 4);
           
	     flash->eraseSize = temp * 256;
	     // Read Max write Buffer (logical Block size)
         } else
	   return FALSE;
    }
     
    // Reset for Read operation
   *(unsigned int *)(flash->base)  = READ_ARRAY; 

   return TRUE;
}

// Adapted from ARM sample code
#define SEQ_ADD1                0x5555
#define SEQ_ADD2                0xAAAA
#define START_CMD1              0xAA
#define START_CMD2              0x55