xscale_test.c

开放源码实时操作系统源码.

	return;
    }
	
    printf ("Supported Ethernet Devices:\n\n");

    printf (" Unit#  Bus#  Device#\n");
    printf (" -----  ----  -------\n");
    for (i = 0; i < num_enet; i++)
	printf ("   %d     %d       %d\n", i,
		CYG_PCI_DEV_GET_BUS(devid[i]),
		CYG_PCI_DEV_GET_DEV(CYG_PCI_DEV_GET_DEVFN(devid[i]))); 

    printf ("\nEnter the unit number to test : ");
    unit = decIn();
    printf ("\n");

    pci_ether_test (CYG_PCI_DEV_GET_BUS(devid[unit]),
		    CYG_PCI_DEV_GET_DEV(CYG_PCI_DEV_GET_DEVFN(devid[unit])),
		    CYG_PCI_DEV_GET_FN(CYG_PCI_DEV_GET_DEVFN(devid[unit])));
}




/* Setup Serial EEPROM for Ethernet Configuration */
static void enet_setup (MENU_ARG arg)
{
    UINT32 adapter_ptr;   /* Ptr to PCI Ethernet adapter */
    cyg_pci_device_id  devid;

    UINT16 eepromData[3] = {
		0x4801,		/* Valid EEPROM, No Expansion ROM, Rev = ?, PHY Addr = 1 */
		0x0700,		/* Subsystem Id			- PCI700 */
		0x113c		/* Subsystem Vendor Id	- Cyclone Microsystems */
    };
    int config_data_offset = 0x0a;	/* offset into EEPROM for config. data storage */
    int ia_offset = 0x00;			/* offset into EEPROM for IA storage */
    UINT8  buffer[6];				/* temporary storage for IA */
    UINT16 temp_node_addr[3] = {0,0,0};
    UINT16 serial_no;
    UINT8  revision_id = 0, port_id = 0;
    char rev_string[8];

    /* Cyclone identifier */
    buffer[0] = 0x00;
    buffer[1] = 0x80;
    buffer[2] = 0x4D;
    buffer[3] = 0x46;    /* board identifier - PCI700 = 70 = 0x46 */

    serial_no = 10000;
    while (serial_no >= 10000) {
	printf ("\nEnter the board serial number (1 - 9999): ");
	serial_no = decIn();
	printf ("\n");
    }
    revision_id = 8;
    while ((revision_id < 1) || (revision_id > 7)) {
	printf ("\nEnter the board revison (A - G)      : ");
	sgets (rev_string);
	rev_string[0] = (rev_string[0] & 0xdf);		/* convert to upper case */
	revision_id = (rev_string[0] - 'A') + 1;	/* convert to a number 1 - 7 */
	printf ("\n");
    }
    revision_id &= 0x7;
    eepromData[0] |= (revision_id << 8);	/* add the rev. id to data */
	
    /* we only want to set up on-board 559 */
    devid = CYG_PCI_DEV_MAKE_ID(2, CYG_PCI_DEV_MAKE_DEVFN(0,0));
    /* Get the PCI Base Address for mem. runtime registers */
    cyg_pci_read_config_uint32(devid, 0x10, &adapter_ptr);

    /* strip off indicator bits */
    adapter_ptr = adapter_ptr & 0xfffffff0;

    printf ("Writing the Configuration Data to the Serial EEPROM... ");
    if (eeprom_write (adapter_ptr,config_data_offset,eepromData,3) != OK) {
	printf ("Error writing the Configuration Data to Serial EEPROM\n");
	return;
    }
    printf ("Done\n");

    /* setup node's Ethernet address */
    port_id = ((0 << 6) & 0xc0);	/* two bits of port number ID */
    buffer[4] = (UINT8) (((serial_no & 0x3FFF) >> 8) | port_id);
    buffer[5] = (UINT8) (serial_no & 0x00FF); 
		
    temp_node_addr[0] = (UINT16) ((buffer[1] << 8) + buffer[0]);
    temp_node_addr[1] = (UINT16) ((buffer[3] << 8) + buffer[2]);
    temp_node_addr[2] = (UINT16) ((buffer[5] << 8) + buffer[4]);

    printf ("Writing the Individual Address to the Serial EEPROM... ");
    if (eeprom_write (adapter_ptr,ia_offset,temp_node_addr,3) != OK) {
	printf ("\nError writing the IA address to Serial EEPROM.\n");
	return;
    }
    printf ("Done\n"); 
	
    /* now that we have finished writing the configuration data, we must ask the
       operator to reset the PCI916 to have the configuration changes take effect.
       After the reset, the standard Enet. port diagnostics can be run on the 916
       under test */

    printf ("\n\n******** Reset the IQ80310 Now to Have Changes Take Effect ********\n\n");

    /* wait forever as a reset will bring us back */
    while ((volatile int)TRUE)
	;
}



/* use the clock in the Performance Monitoring Unit to do delays */
void polled_delay (int usec)
{
    volatile int i;
	
    _enable_timer();

    for (i = 0; i < usec; i++)
	_usec_delay();

    _disable_timer();
}



void internal_timer(MENU_ARG arg)
{
    int j, i;

    printf ("\n");

    _enable_timer();

    printf ("Timer enabled...\n");

    for (j = 0; j < 20; j++) {		
	printf (".");
	for (i = 0; i < 1000; i++)
	    _msec_delay();
    }

    _disable_timer();

    printf ("\nTimer disabled...\n");
}


#define I80960RP_BRIDGE		0x0960
#define I80960RP_NAME0		"80960RP PCI-PCI Bridge"

#define I80960RP_ATU		0x1960
#define I80960RP_NAME1		"80960RP Address Translation Unit"

#define I80960RM_BRIDGE		0x0962
#define I80960RM_NAME0		"80960RM PCI-PCI Bridge"

#define I80960RM_ATU		0x1962
#define I80960RM_NAME1		"80960RM Address Translation Unit"

#define I80960RN_BRIDGE		0x0964
#define I80960RN_NAME0		"80960RN PCI-PCI Bridge"

#define I80960RN_ATU		0x1964
#define I80960RN_NAME1		"80960RN Address Translation Unit"

#define I80303_BRIDGE		0x0309
#define I80303_NAME0		"80303 PCI-PCI Bridge"

#define I80303_ATU		0x5309
#define I80303_NAME1		"80303 Address Translation Unit"



/******************************************************************/
/* The following functions are all part of the PCI Interrupt Test */
/******************************************************************/
/* definitions pertaining to PCI interrupt test */
#define MAX_I960RX 31
typedef struct 
{
	UINT32 device_id;
	UINT32 busno;
	UINT32 devno;
	UINT32 funcno;
} I960RX_DEVICES;
I960RX_DEVICES i960Rx_devices[MAX_I960RX];
UINT32 num_rx_devices = 0; 
UINT32	messagingUnitBase = (UINT32)NULL;

/* Outbound Interrupt Status Register bits */
#define OB_STAT_INTA	(1 << 4)
#define OB_STAT_INTB	(1 << 5)
#define OB_STAT_INTC	(1 << 6)
#define OB_STAT_INTD	(1 << 7)

/* Outbound Doorbell Register bits */
#define OB_DBELL_INTA	(1 << 28)
#define OB_DBELL_INTB	(1 << 29)
#define OB_DBELL_INTC	(1 << 30)
#define OB_DBELL_INTD	(1 << 31)

/***********************************************************************
*
* line_to_string - Returns name as string of particular XINT number
*
*/
static char *line_to_string (int intline)
{
    switch (intline) {
    case XINT0: return("XINT0");
    case XINT1: return("XINT1");
    case XINT2: return("XINT2");
    case XINT3: return("XINT3");
    default:	return("ERROR");
    }
}


/***************************************************************************
*
* PCI_IntHandler - Interrupt handler for PCI interrupt test
*
* Used to verify that an interrupt was recieved during the PCI interrupt 
* test by the IQ80310 from the add-in i960Rx board.  This handler prints out
* which interrupt was recieved, and then clears the interrupt by clearing 
* the doorbell register on the i960Rx card.
*
*/
int PCI_IntHandler (int IntPin)
{
    UINT32 *OutboundDbReg	 = (UINT32 *)(messagingUnitBase + 0x2c);
    UINT32 *OutboundIstatReg = (UINT32 *)(messagingUnitBase + 0x30);

    switch (IntPin) {
    case INTA:

	/* check to see if we are looking at the correct interrupt */
	if (!(*OutboundIstatReg & OB_STAT_INTA)) {		
	    return (0);
	} else {			
	    printf ("PCI INTA generated/received\n\n");
	    printf ("OISR OK!\n");
	    printf ("OISR = 0x%X\n", *OutboundIstatReg);
	    printf ("**** PCI INTA Success ****\n\n");
	    *OutboundDbReg |= OB_DBELL_INTA;		/* try to clear specific source */
	    return (1);
	}
	break;

    case INTB:
	/* check to see if we are looking at the correct interrupt */
	if (!(*OutboundIstatReg & OB_STAT_INTB)) {
	    return (0);
	} else {
	    printf ("PCI INTB generated/received\n\n");
	    printf ("OISR OK!\n");
	    printf ("OISR = 0x%X\n", *OutboundIstatReg);
	    printf ("**** PCI INTB Success ****\n\n");
	    *OutboundDbReg |= OB_DBELL_INTB;		/* try to clear specific source */
	    return (1);
	}

	break;

    case INTC:
	/* check to see if we are looking at the correct interrupt */
	if (!(*OutboundIstatReg & OB_STAT_INTC)) {
	    return (0);
	} else {
	    printf ("PCI INTC generated/received\n\n");
	    printf ("OISR OK!\n");
	    printf ("OISR = 0x%X\n", *OutboundIstatReg);
	    printf ("**** PCI INTC Success ****\n\n");
	    *OutboundDbReg |= OB_DBELL_INTC;		/* try to clear specific source */
	    return (1);
	}

	break;

    case INTD:
	/* check to see if we are looking at the correct interrupt */
	if (!(*OutboundIstatReg & OB_STAT_INTD)) {
	    return (0);
	} else {
	    printf ("PCI INTD generated/received\n\n");
	    printf ("OISR OK!\n");
	    printf ("OISR = 0x%X\n", *OutboundIstatReg);
	    printf ("**** PCI INTD Success ****\n\n");
	    *OutboundDbReg |= OB_DBELL_INTD;		/* try to clear specific source */
	    return (1);
	}

	break;

    default:
	printf ("Unknown interrupt received\n");
	return (0);
	break;
    }
    return (1);		/* interrupt sharing support requirement */
}


/*******************************************************************************
*
* i960Rx_seek - look for i960Rx CPUs on the PCI Bus
*
* This function is used by the PCI interrupt test to find and print out
* all PCI location of a particular i960Rx processor on the PCI bus.  Thses include
* boards based on the RP, RD, RM, and RN processors.  The device ID of one of 
* these processors is the input to the function.
*
*/
static void i960Rx_seek (UINT32 adapter_device_id)
{
    static char *i960Rx_name;
    cyg_pci_device_id  devid = CYG_PCI_NULL_DEVID;
    int bus, devfn;

    /* get the common name for the current Rx processor */
    switch (adapter_device_id) {
    case I80960RN_ATU:
	i960Rx_name = " i960RN  ";
	break;
    case I80960RM_ATU:
	i960Rx_name = " i960RM  ";
	break;
    case I80960RP_ATU:
	i960Rx_name = "i960RP/RD";
	break;
    case I80303_ATU:
    default:
	i960Rx_name = " i80303  ";
	break;
    } 

    while (cyg_pci_find_device(VENDOR_INTEL, adapter_device_id, &devid)) {
	bus = CYG_PCI_DEV_GET_BUS(devid);
	devfn = CYG_PCI_DEV_GET_DEVFN(devid);
	/* set up this entry into the device array */
	i960Rx_devices[num_rx_devices].device_id = adapter_device_id;
	i960Rx_devices[num_rx_devices].busno = bus;
	i960Rx_devices[num_rx_devices].devno = CYG_PCI_DEV_GET_DEV(devfn);
	i960Rx_devices[num_rx_devices].funcno = CYG_PCI_DEV_GET_FN(devfn);

	printf ("   %d        %s  %d       %d         %d\n",  
		num_rx_devices, i960Rx_name,
		i960Rx_devices[num_rx_devices].busno,
		i960Rx_devices[num_rx_devices].devno,
		i960Rx_devices[num_rx_devices].funcno);
	
	num_rx_devices++;	/* increment total number of i960Rx devices found */
    }
}


/*********************************************************************************
*