ebsa285_misc.c

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//==========================================================================
//
//      ebsa285_misc.c
//
//      HAL misc board support code for StrongARM EBSA285-1
//
//==========================================================================
//####ECOSGPLCOPYRIGHTBEGIN####
// -------------------------------------------
// This file is part of eCos, the Embedded Configurable Operating System.
// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
//
// eCos is free software; you can redistribute it and/or modify it under
// the terms of the GNU General Public License as published by the Free
// Software Foundation; either version 2 or (at your option) any later version.
//
// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
// WARRANTY; without even the implied warranty of MERCHANTABILITY or
// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
// for more details.
//
// You should have received a copy of the GNU General Public License along
// with eCos; if not, write to the Free Software Foundation, Inc.,
// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
//
// As a special exception, if other files instantiate templates or use macros
// or inline functions from this file, or you compile this file and link it
// with other works to produce a work based on this file, this file does not
// by itself cause the resulting work to be covered by the GNU General Public
// License. However the source code for this file must still be made available
// in accordance with section (3) of the GNU General Public License.
//
// This exception does not invalidate any other reasons why a work based on
// this file might be covered by the GNU General Public License.
//
// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
// at http://sources.redhat.com/ecos/ecos-license/
// -------------------------------------------
//####ECOSGPLCOPYRIGHTEND####
//==========================================================================
//#####DESCRIPTIONBEGIN####
//
// Author(s):    gthomas
// Contributors: gthomas
// Date:         1999-02-20
// Purpose:      HAL board support
// Description:  Implementations of HAL board interfaces
//
//####DESCRIPTIONEND####
//
//========================================================================*/

#include <pkgconf/hal.h>
#include <pkgconf/system.h>
#include CYGBLD_HAL_PLATFORM_H
#include CYGHWR_MEMORY_LAYOUT_H

#include <cyg/infra/cyg_type.h>         // base types
#include <cyg/infra/cyg_trac.h>         // tracing macros
#include <cyg/infra/cyg_ass.h>          // assertion macros

#include <cyg/hal/hal_io.h>             // IO macros
#include <cyg/hal/hal_if.h>             // calling interface API
#include <cyg/hal/hal_arch.h>           // Register state info
#include <cyg/hal/hal_diag.h>
#include <cyg/hal/hal_intr.h>           // Interrupt names
#include <cyg/hal/hal_cache.h>
#include <cyg/hal/hal_ebsa285.h>        // Hardware definitions

#include <cyg/infra/diag.h>             // diag_printf

#include <string.h> // memset

/*
 * Toggle LED for debugging purposes.
 */
/*
 * EBSA-285 Soft I/O Register
 */
#define EBSA_285_SOFT_IO_REGISTER           ((cyg_uint32 *)0x40012000)

/*
 * EBSA-285 Soft I/O Register Bit Field definitions
 */
#define EBSA_285_SOFT_IO_TOGGLE             0x80
#define EBSA_285_SOFT_IO_RED_LED            0x04
#define EBSA_285_SOFT_IO_GREEN_LED          0x02
#define EBSA_285_SOFT_IO_AMBER_LED          0x01
#define EBSA_285_SOFT_IO_J9_9_10_MASK       0x40
#define EBSA_285_SOFT_IO_J9_11_12_MASK      0x20
#define EBSA_285_SOFT_IO_J9_13_14_MASK      0x10
#define EBSA_285_SOFT_IO_SWITCH_L_MASK      0x0F

static void
hal_bsp_mmu_init(int sdram_size);

// Some initialization has already been done before we get here.
//
// Set up the interrupt environment.
// Set up the MMU so that we can use caches.
// Enable caches.
// - All done!


void hal_hardware_init(void)
{
    // Disable all interrupt sources:
    *SA110_IRQCONT_IRQENABLECLEAR = 0xffffffff;
    *SA110_IRQCONT_FIQENABLECLEAR = 0xffffffff; // including FIQ
    // Disable the timers
    *SA110_TIMER1_CONTROL = 0;
    *SA110_TIMER2_CONTROL = 0;
    *SA110_TIMER3_CONTROL = 0;
    *SA110_TIMER4_CONTROL = 0;

    *SA110_TIMER1_CLEAR = 0;            // Clear any pending interrupt
    *SA110_TIMER2_CLEAR = 0;            // (Data: don't care)
    *SA110_TIMER3_CLEAR = 0;
    *SA110_TIMER4_CLEAR = 0;

    // Let the timer run at a default rate (for delays)
    hal_clock_initialize(CYGNUM_HAL_RTC_PERIOD);

    // Set up MMU so that we can use caches
    hal_bsp_mmu_init( hal_dram_size );

    // Enable caches
    HAL_DCACHE_ENABLE();
    HAL_ICACHE_ENABLE();

    // Set up eCos/ROM interfaces
    hal_if_init();
}

// -------------------------------------------------------------------------
// MMU initialization:

static void
hal_bsp_mmu_init(int sdram_size)
{
    unsigned long ttb_base = ((unsigned long)0x4000); // could be external
    unsigned long i;

    *EBSA_285_SOFT_IO_REGISTER = ~EBSA_285_SOFT_IO_RED_LED; // Red LED on


// For if we assign the ttb base dynamically:
//    if ((ttb_base & ARM_TRANSLATION_TABLE_MASK) != ttb_base) {
//        // we cannot do this:
//        while ( 1 ) {
//            *EBSA_285_SOFT_IO_REGISTER = 0; // All LEDs on
//            for ( i = 100000; i > 0 ; i++ ) ;
//            *EBSA_285_SOFT_IO_REGISTER = 7; // All LEDs off
//            for ( i = 100000; i > 0 ; i++ ) ;
//#ifdef CYG_HAL_STARTUP_RAM
//            return; // Do not bother looping forever...
//#endif
//        }
//    }

    /*
     * Set the TTB register
     */
    asm volatile ("mcr  p15,0,%0,c2,c0,0" 
                  :
                  : "r"(ttb_base)
                /*:*/
        );
    /*
     * Set the Domain Access Control Register
     */
    i = ARM_ACCESS_TYPE_MANAGER(0)    | 
        ARM_ACCESS_TYPE_NO_ACCESS(1)  |
        ARM_ACCESS_TYPE_NO_ACCESS(2)  |
        ARM_ACCESS_TYPE_NO_ACCESS(3)  |
        ARM_ACCESS_TYPE_NO_ACCESS(4)  |
        ARM_ACCESS_TYPE_NO_ACCESS(5)  |
        ARM_ACCESS_TYPE_NO_ACCESS(6)  |
        ARM_ACCESS_TYPE_NO_ACCESS(7)  |
        ARM_ACCESS_TYPE_NO_ACCESS(8)  |
        ARM_ACCESS_TYPE_NO_ACCESS(9)  |
        ARM_ACCESS_TYPE_NO_ACCESS(10) |
        ARM_ACCESS_TYPE_NO_ACCESS(11) |
        ARM_ACCESS_TYPE_NO_ACCESS(12) |
        ARM_ACCESS_TYPE_NO_ACCESS(13) |
        ARM_ACCESS_TYPE_NO_ACCESS(14) |
        ARM_ACCESS_TYPE_NO_ACCESS(15);

    asm volatile ("mcr  p15,0,%0,c3,c0,0" 
                  :
                  : "r"(i)
                /*:*/
        );

    /*
     * First clear all TT entries - ie Set them to Faulting
     */
    memset((void *)ttb_base, 0, ARM_FIRST_LEVEL_PAGE_TABLE_SIZE);

    /*
     * We only do direct mapping for the EBSA board. That is, all
     * virt_addr == phys_addr.
     */

    /*
     * Actual Base = 0x000(00000)
     * Virtual Base = 0x000(00000)
     * Size = Max SDRAM
     * SDRAM
     */
    for (i = 0x000; i < (sdram_size >> 20); i++) {
        ARM_MMU_SECTION(ttb_base, i, i,
                        ARM_CACHEABLE, ARM_BUFFERABLE,
                        ARM_ACCESS_PERM_RW_RW);
    }

#ifdef CYGPKG_IO_PCI
    /*
     * Actual Base = CYGHWR_HAL_ARM_EBSA285_PCI_MEM_MAP_BASE
     * Virtual Base = CYGHWR_HAL_ARM_EBSA285_PCI_MEM_MAP_BASE
     * Size = CYGHWR_HAL_ARM_EBSA285_PCI_MEM_MAP_SIZE
     * Memory accessible from PCI space. Overrides part of the above mapping.
     */
    for (i = CYGHWR_HAL_ARM_EBSA285_PCI_MEM_MAP_BASE >> 20;
         i < ((CYGHWR_HAL_ARM_EBSA285_PCI_MEM_MAP_BASE+CYGHWR_HAL_ARM_EBSA285_PCI_MEM_MAP_SIZE) >> 20); 
         i++) {
        ARM_MMU_SECTION(ttb_base, i, i,
                        ARM_UNCACHEABLE, ARM_UNBUFFERABLE,
                        ARM_ACCESS_PERM_RW_RW);
    }
#endif

    /*
     * Actual Base = 0x400(00000)
     * Virtual Base = 0x400(00000)
     * Size = 1M
     * 21285 Registers
     *
     * Actual Base = 0x400(10000)
     * Virtual Base = 0x400(10000)
     * Size = 1M
     * Soft I/O port and XBus IO
     */
    ARM_MMU_SECTION(ttb_base, 0x400, 0x400,
		    ARM_UNCACHEABLE, ARM_UNBUFFERABLE,
		    ARM_ACCESS_PERM_RW_RW);

    /*
     * Actual Base = 0x410(00000) - 0x413(FFFFF)
     * Virtual Base = 0x410(00000) - 0x413(FFFFF)