📄 hal_diag.c
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}
#if defined(CYG_KERNEL_DIAG_SERIAL1)
#define hal_diag_init_serial hal_diag_init_serial1
#define hal_diag_write_char_serial hal_diag_write_char_serial1
#define hal_diag_drain_serial hal_diag_drain_serial1
#define hal_diag_read_char_serial hal_diag_read_char_serial1
#endif
#endif
/*---------------------------------------------------------------------------*/
#if defined(CYG_HAL_MN10300_STB_SERIAL2) || defined(CYG_KERNEL_DIAG_SERIAL2)
// We use serial2 on MN103002
#define SERIAL2_CR ((volatile cyg_uint16 *)0xd4002020)
#define SERIAL2_ICR ((volatile cyg_uint8 *) 0xd4002024)
#define SERIAL2_TXR ((volatile cyg_uint8 *) 0xd4002028)
#define SERIAL2_RXR ((volatile cyg_uint8 *) 0xd4002029)
#define SERIAL2_SR ((volatile cyg_uint8 *) 0xd400202c)
#define SERIAL2_TR ((volatile cyg_uint8 *) 0xd400202d)
// Timer 3 provides baud rate divisor
#define TIMER2_MD ((volatile cyg_uint8 *)0xd4003003)
#define TIMER2_BR ((volatile cyg_uint8 *)0xd4003013)
#define TIMER2_CR ((volatile cyg_uint8 *)0xd4003023)
#define SIO2_LSTAT_TRDY 0x20
#define SIO2_LSTAT_RRDY 0x10
void hal_diag_init_serial2(void)
{
#if 0
{
int i,j;
for( j = 1; j < 255; j++ )
{
for(i = 1; i < 127; i++)
{
*TIMER2_BR = j;
*SERIAL2_TR = i;
// Timer2 sourced from IOCLK
*TIMER2_MD = 0x80;
// No interrupts for now.
*SERIAL2_ICR = 0x00;
// Source from timer 2, 8bit chars, enable tx and rx
*SERIAL2_CR = 0xc081;
diag_printf("\r\n<%03d,%03d>1234567890abcdefgh<%03d,%03d>\r\n",j,i,j,i);
}
}
}
#endif
// 7 and 102 translate to 38400 baud.
// The AM33 documentation says that these values should be 7 and 113.
// I have no explanation as to why there is such a discrepancy between the
// documentation and the hardware.
*TIMER2_BR = 7;
*SERIAL2_TR = 102;
// Timer2 sourced from IOCLK
*TIMER2_MD = 0x80;
// No interrupts for now.
*SERIAL2_ICR = 0x00;
// Source from timer 3, 8bit chars, enable tx and rx
*SERIAL2_CR = 0xc083;
}
void hal_diag_write_char_serial2(char c)
{
register volatile cyg_uint8 *volatile tty_status = SERIAL2_SR;
register volatile cyg_uint8 *volatile tty_tx = SERIAL2_TXR;
while( (*tty_status & SIO2_LSTAT_TRDY) != 0 ) continue;
*tty_tx = c;
}
void hal_diag_drain_serial2(void)
{
register volatile cyg_uint8 *volatile tty_status = SERIAL2_SR;
while( (*tty_status & SIO2_LSTAT_TRDY) != 0 ) continue;
}
void hal_diag_read_char_serial2(char *c)
{
register volatile cyg_uint8 *volatile tty_status = SERIAL2_SR;
register volatile cyg_uint8 *volatile tty_rx = SERIAL2_RXR;
while( (*tty_status & SIO2_LSTAT_RRDY) == 0 ) continue;
*c = *tty_rx;
// We must ack the interrupt caused by that read to avoid
// confusing the GDB stub ROM.
HAL_INTERRUPT_ACKNOWLEDGE( CYGNUM_HAL_INTERRUPT_SERIAL_2_RX );
}
#if defined(CYG_KERNEL_DIAG_SERIAL2)
#define hal_diag_init_serial hal_diag_init_serial2
#define hal_diag_write_char_serial hal_diag_write_char_serial2
#define hal_diag_drain_serial hal_diag_drain_serial2
#define hal_diag_read_char_serial hal_diag_read_char_serial2
#endif
#endif
/*---------------------------------------------------------------------------*/
#if defined(CYG_KERNEL_DIAG_BUFFER)
char hal_diag_buffer[10000];
int hal_diag_buffer_pos;
void hal_diag_init_buffer(void)
{
hal_diag_buffer_pos = 0;
}
void hal_diag_write_char_buffer(char c)
{
hal_diag_buffer[hal_diag_buffer_pos++] = c;
if (hal_diag_buffer_pos >= sizeof(hal_diag_buffer) )
hal_diag_buffer_pos = 0;
}
void hal_diag_drain_buffer(void)
{
}
void hal_diag_read_char_buffer(char *c)
{
*c = '\n';
}
#define hal_diag_init_serial hal_diag_init_buffer
#define hal_diag_write_char_serial hal_diag_write_char_buffer
#define hal_diag_drain_serial hal_diag_drain_buffer
#define hal_diag_read_char_serial hal_diag_read_char_buffer
#endif
/*---------------------------------------------------------------------------*/
void hal_diag_init(void)
{
hal_diag_init_serial();
}
void hal_diag_write_char(char c)
{
#ifdef CYG_KERNEL_DIAG_GDB
static char line[100];
static int pos = 0;
// No need to send CRs
if( c == '\r' ) return;
line[pos++] = c;
if( c == '\n' || pos == sizeof(line) )
{
// Disable interrupts. This prevents GDB trying to interrupt us
// while we are in the middle of sending a packet. The serial
// receive interrupt will be seen when we re-enable interrupts
// later.
CYG_INTERRUPT_STATE oldstate;
CYG_BYTE wdcr;
HAL_DISABLE_INTERRUPTS(oldstate);
// Beacuse of problems with NT on the testfarm, we also have
// to disable the watchdog here. This only matters in the
// watchdog tests. And yes, this sends my irony meter off the
// scale too.
HAL_READ_UINT8( 0xC0001002, wdcr );
HAL_WRITE_UINT8( 0xC0001002, wdcr&0x3F );
while(1)
{
static char hex[] = "0123456789ABCDEF";
cyg_uint8 csum = 0;
int i;
hal_diag_write_char_serial('$');
hal_diag_write_char_serial('O');
csum += 'O';
for( i = 0; i < pos; i++ )
{
char ch = line[i];
char h = hex[(ch>>4)&0xF];
char l = hex[ch&0xF];
hal_diag_write_char_serial(h);
hal_diag_write_char_serial(l);
csum += h;
csum += l;
}
hal_diag_write_char_serial('#');
hal_diag_write_char_serial(hex[(csum>>4)&0xF]);
hal_diag_write_char_serial(hex[csum&0xF]);
{
char c1;
hal_diag_read_char_serial( &c1 );
if( c1 == '+' ) break;
if( cyg_hal_is_break( &c1, 1 ) )
cyg_hal_user_break( NULL );
}
}
pos = 0;
// Wait for tx buffer to drain
hal_diag_drain_serial();
// And re-enable interrupts
HAL_RESTORE_INTERRUPTS(oldstate);
HAL_WRITE_UINT8( 0xC0001002, wdcr );
}
#else
hal_diag_write_char_serial(c);
#endif
}
void hal_diag_read_char(char *c)
{
hal_diag_read_char_serial(c);
}
/*---------------------------------------------------------------------------*/
/* End of hal_diag.c */
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