vectors.s

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##=============================================================================
##
##	vectors.S
##
##	MN10300 exception vectors
##
##=============================================================================
#####ECOSGPLCOPYRIGHTBEGIN####
## -------------------------------------------
## This file is part of eCos, the Embedded Configurable Operating System.
## Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
##
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## the terms of the GNU General Public License as published by the Free
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## FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
## for more details.
##
## You should have received a copy of the GNU General Public License along
## with eCos; if not, write to the Free Software Foundation, Inc.,
## 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
##
## As a special exception, if other files instantiate templates or use macros
## or inline functions from this file, or you compile this file and link it
## with other works to produce a work based on this file, this file does not
## by itself cause the resulting work to be covered by the GNU General Public
## License. However the source code for this file must still be made available
## in accordance with section (3) of the GNU General Public License.
##
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## this file might be covered by the GNU General Public License.
##
## Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
## at http://sources.redhat.com/ecos/ecos-license/
## -------------------------------------------
#####ECOSGPLCOPYRIGHTEND####
##=============================================================================
#######DESCRIPTIONBEGIN####
##
## Author(s): 	nickg
## Contributors:	nickg, dmoseley, dhowells
## Date:	1997-10-16
## Purpose:	MN10300 exception vectors
## Description:	This file defines the code placed into the exception
##              vectors. It also contains the first level default VSRs
##		that save and restore state for both exceptions and
##		interrupts.
##
######DESCRIPTIONEND####
##
##=============================================================================

#include <pkgconf/hal.h>

#ifdef CYGPKG_REDBOOT
#include <pkgconf/redboot.h>
#endif
	
#ifdef CYGPKG_KERNEL

#include <pkgconf/kernel.h>
	
#endif		

#include <cyg/hal/arch.inc>	
#include <cyg/hal/basetype.h>	
		
	
##-----------------------------------------------------------------------------
	
//	.file	"vectors.S"

#ifdef CYGPKG_CYGMON
##-----------------------------------------------------------------------------
## Macros for Stack handling when running Cygmon
        		
.macro hal_cygmon_switch_app_stack
	#
	# Switch to interrupt stack to handle exception
	#

	# First, save some scratch registers
	mov	a2(a2_save)
	mov	a3,(a3_save)

	# Copy the exception frame
	mov	__cygmon_interrupt_stack-8,a2
	mov	(sp),a3				// Copy over the saved EPSW
	mov	a3,(a2)
	mov	(4,sp),a3			// Copy over the saved PC
	mov	a3,(4,a2)

	# Save the pre-exception sp in the register image	 
	add	-4,a2				# space for SP
	mov	sp,a3
	add	8,a3				# adjust for exception frame
	mov	a3,(a2)

	# Actually switch the stack
	mov	a2,sp

	# Now, restore the scratch registers
	mov	(a2_save),a2
	mov	(a3_save),a3
.endm

.macro hal_cygmon_restore_app_stack
	// For cygmon we are switching stacks immediately on exception.
	// We must wait until the very end before restoring the original stack.

	# Save some scratch registers
	mov	a2,(a2_save)
	mov	a3,(a3_save)

	# We need to restore the application stack pointer, but we also
	# need to restore the exception frame.
	mov	(sp),a2
	add	4,sp				// remove saved sp
	add	-8,a2				// adjust for exception frame
	
	mov	(sp),a3				// Copy the saved EPSW
	mov	a3,(a2)
	mov	(4,sp),a3			// Copy the saved PC
	mov	a3,(4,a2)
	mov	a2,sp				// Restore the frame-adjusted SP

	# Restore the scratch registers
	mov	(a2_save),a2
	mov	(a3_save),a3
.endm

#endif // CYGPKG_CYGMON

##-----------------------------------------------------------------------------
#define EXCEPTION_HANDLER(VECTOR,NAME,HANDLER) .org VECTOR; \
NAME##_vector: \
jmp HANDLER
		
	.section ".vectors","ax"
	
	.globl	reset_vector

	.org 0x000	
reset_vector:
	# Reset vector
	jmp	_start

EXCEPTION_HANDLER(0x008, nmi					,__nmi)
EXCEPTION_HANDLER(0x010, trap					,__trap)
EXCEPTION_HANDLER(0x100, ins_tlb_miss_exception			,__unknown)
EXCEPTION_HANDLER(0x108, data_tlb_miss_exception		,__unknown)
EXCEPTION_HANDLER(0x110, ins_access_exception			,__unknown)
EXCEPTION_HANDLER(0x118, data_access_exception			,__unknown)
EXCEPTION_HANDLER(0x160, priv_ins_exception			,__unknown)
EXCEPTION_HANDLER(0x168, unimpl_ins_exception			,__unknown)
EXCEPTION_HANDLER(0x170, unimpl_ext_ins_exception		,__unknown)
EXCEPTION_HANDLER(0x180, misalignment_exception			,__unknown)
EXCEPTION_HANDLER(0x188, bus_error				,__unknown)
EXCEPTION_HANDLER(0x190, illegal_ins_access_exception		,__unknown)
EXCEPTION_HANDLER(0x198, illegal_data_access_exception		,__unknown)
EXCEPTION_HANDLER(0x1a0, iospace_ins_access_exception		,__unknown)
EXCEPTION_HANDLER(0x1a8, priv_space_ins_access_exception	,__unknown)
EXCEPTION_HANDLER(0x1b0, priv_space_data_access_exception	,__unknown)
EXCEPTION_HANDLER(0x1b8, data_space_ins_access_exception	,__unknown)
EXCEPTION_HANDLER(0x1c0, fpu_disabled_exception			,__unknown)
EXCEPTION_HANDLER(0x1c8, fpu_unimplemented_exception		,__unknown)
EXCEPTION_HANDLER(0x1d0, fpu_operation_exception		,__unknown)
EXCEPTION_HANDLER(0x200, double_fault				,__unknown)
EXCEPTION_HANDLER(0x240, wdt_overflow				,__unknown)
EXCEPTION_HANDLER(0x248, nmi_pin				,__nmi)
EXCEPTION_HANDLER(0x280, maskable_int0				,__unknown)
EXCEPTION_HANDLER(0x288, maskable_int1				,__unknown)
EXCEPTION_HANDLER(0x290, maskable_int2				,__unknown)
EXCEPTION_HANDLER(0x298, maskable_int3				,__unknown)
EXCEPTION_HANDLER(0x2a0, maskable_int4				,__unknown)
EXCEPTION_HANDLER(0x2a8, maskable_int5				,__unknown)
EXCEPTION_HANDLER(0x2b0, maskable_int6				,__unknown)
		
	// We need to put the syscall handler at 0x300
	// For cygmon, we will use the am33 "syscall 0" as the syscall trap.
EXCEPTION_HANDLER(0x300, syscall0				,__nmi)
EXCEPTION_HANDLER(0x308, syscall1				,__unknown)
EXCEPTION_HANDLER(0x310, syscall2				,__unknown)
EXCEPTION_HANDLER(0x318, syscall3				,__unknown)
EXCEPTION_HANDLER(0x320, syscall4				,__unknown)
EXCEPTION_HANDLER(0x328, syscall5				,__unknown)
EXCEPTION_HANDLER(0x330, syscall6				,__unknown)
EXCEPTION_HANDLER(0x338, syscall7				,__unknown)
EXCEPTION_HANDLER(0x340, syscall8				,__unknown)
EXCEPTION_HANDLER(0x348, syscall9				,__unknown)
EXCEPTION_HANDLER(0x350, syscalla				,__unknown)
EXCEPTION_HANDLER(0x358, syscallb				,__unknown)
EXCEPTION_HANDLER(0x360, syscallc				,__unknown)
EXCEPTION_HANDLER(0x368, syscalld				,__unknown)
EXCEPTION_HANDLER(0x370, syscalle				,__unknown)
EXCEPTION_HANDLER(0x378, syscallf				,__unknown)

##-----------------------------------------------------------------------------
## unknown interrupt or exception vector
__unknown:
#ifdef CYG_HAL_HANDLE_UNKNOWN_INT_DEFINED
	hal_handle_unknown_int
#endif

##-----------------------------------------------------------------------------
## NMI vector

	.globl __nmi
__nmi:
#ifdef CYGPKG_CYGMON
	hal_cygmon_switch_app_stack
#else
	add	-4,sp				# space for SP
#endif
	hal_cpu_save_all			# push all registers
	mov	(_hal_vsr_table+28),a0 
	jmp	(a0)

##-----------------------------------------------------------------------------
## Trap vector

	.globl __trap
__trap:
#ifdef CYGPKG_CYGMON
	add	-4,sp				# space for PSW
	hal_cygmon_switch_app_stack
#else
	add	-8,sp				# space for SP and PSW
#endif
	hal_cpu_save_all			# push all registers
	mov	(_hal_vsr_table+32),a0
	jmp	(a0)
		
##-----------------------------------------------------------------------------
## Macro to define a hardware VSR	

	.macro	hardware_vector name
	.globl	__hardware_vector_\name
__hardware_vector_\name:
#ifdef CYGPKG_CYGMON
	hal_cygmon_switch_app_stack
#else
	add	-4,sp				# space for SP
#endif
	hal_cpu_save_all
	mov	\name,d0			# d0 = vector id
	mov	d0,(0,sp)			# save in dummy stack loc
	mov	_hal_vsr_table,a0		# a0 = vsr table
	add	\name<<2,a0			# a0 = &required vsr
	mov	(a0),a0				# a0 = required vsr
	jmp	(a0)				# go there
	.endm	

##-----------------------------------------------------------------------------
## Hardware Vectors. These are pointed to by the registers in
## mn10300_interrupt_vectors and must be in the range 0x4000XXXX.

	hardware_vector	0
	hardware_vector	1
	hardware_vector	2
	hardware_vector	3
	hardware_vector	4
	hardware_vector	5
	hardware_vector	6
		
##-----------------------------------------------------------------------------
## Startup code
			
	.text

	.globl	_start
_start:

#ifdef HAL_EARLY_INIT
	HAL_EARLY_INIT
#endif
	# set up stack

	mov	__interrupt_stack,a0
	sub	8,a0
	mov	a0,sp

	# Initialize hardware
	hal_cpu_init
	hal_mmu_init
	hal_memc_init
	hal_diag_init
	hal_intc_init
	hal_cache_init
	hal_timer_init
	hal_mon_init

#ifdef CYG_HAL_STARTUP_ROM
	
	# Copy data from ROM to RAM

	mov	__rom_data_start,a0
	mov	__ram_data_end,a1
	mov	__ram_data_start,a2
	
	cmp	a2,a1
	beq	8f
1:	
	movbu	(a0),d0
	movbu	d0,(a2)
	inc	a0
	inc	a2
	cmp	a2,a1
	bne	1b	
8:	
	
#endif
	
	# Clear BSS
	mov	__bss_start,a0
	mov	__bss_end,a1

	cmp	a0,a1
	beq	8f
	clr	d0
1:	
	movbu	d0,(a0)
	inc	a0
	cmp	a0,a1
	bne	1b	
8:	

	# Call variant and platform HAL
	# initialization routines.

	.extern _hal_variant_init
	call    _hal_variant_init,[],0

	.extern _hal_platform_init
	call	_hal_platform_init,[],0
	
	# Call constructors

	.extern _cyg_hal_invoke_constructors
	call    _cyg_hal_invoke_constructors,[],0

#ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS
        .extern _initialize_stub
        call    _initialize_stub,[],0
#endif

#ifdef CYGDBG_HAL_MIPS_DEBUG_GDB_CTRLC_SUPPORT
	.extern hal_ctrlc_isr_init
	call    hal_ctrlc_isr_init,[],0
#endif

       	# Call cyg_start
	clr	d0
	mov	d0,(4,sp)
	
	.extern _cyg_start
	call    _cyg_start,[],0

9:
	bra	9b		# Loop if we return

##-----------------------------------------------------------------------------
## The following macros are defined depending on whether the HAL is configured
## to support the kernel or not. 

#ifdef CYGFUN_HAL_COMMON_KERNEL_SUPPORT
	
	.extern	_cyg_scheduler_sched_lock
	
	# Increment the scheduler lock
			
	.macro increment_sched_lock reg=d0
	mov	(_cyg_scheduler_sched_lock),\reg
	inc	\reg
	mov	\reg,(_cyg_scheduler_sched_lock)
	.endm

#else
	
	.macro increment_sched_lock reg=d0
	.endm

#endif		

##-----------------------------------------------------------------------------
## Default interrupt VSR

	.text
	.globl	__default_interrupt_vsr
__default_interrupt_vsr:

	# We come here with all the registers pushed
	# onto the stack.

	hal_diag_intr_start
	
	increment_sched_lock
	
#if defined(CYGPKG_CYGMON)
        // For Cygmon, we saved this back when we originally switched stacks.
	mov	(sp),a2				# A2 = saved thread state
#elif defined(CYGIMP_HAL_COMMON_INTERRUPTS_USE_INTERRUPT_STACK)
	# Increment interrupt nesting counter
	mov	__interrupt_stack,a0		# A0 = interrupt stack top
	mov	sp,a2				# A2 = SP
	cmp	__interrupt_stack_base,a2	# compare with base of stack
	blt	1f				# if lt switch to int stack
	cmp	a0,a2				# compare sp with stack top
	ble	8f				# if le already on istack
1:
	mov	a0,sp				# switch to new SP
8:
	movm	[a2],(sp)			# save old SP

#else
	mov	sp,a2				# A2 = saved thread state
#endif

	# Here A2 -> saved thread state on the threads own