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# we can reuse the code from __default_interrupt_vsr
    ldi:32  #hal_exception_return,  r0
    jmp    @r0

#==============================================================================
# Default interrupt VSR
#
#

    .align  2, 0xcc
    .globl  __default_interrupt_vsr
__default_interrupt_vsr:

    ## We enter here with the CPU state still in the registers and:
    ##  r0          vector number
    ##  @(ssp)      old register r0 content pushed by trampoline
    ##  @(ssp,4)    PS pushed by hardware
    ##  @(ssp,8)    PC pushed by hardware

    # begin to save registers (to USP)
    orccr   #0x20

    st      mdl,    @-r15
    st      mdh,    @-r15
    st      rp,     @-r15

    stm1    (r8, r9, r10, r11, r12, r13)
    stm0    (r1, r2, r3 , r4 , r5 , r6, r7)

    andccr  #0xdf
    ld      @r15+,  r8          ; read old r0 content from SSP
    ld      @r15+,  r9          ; read pc pushed by hardware
    ld      @r15+,  r10         ; read ps pushed by hardware
    orccr   #0x20

    st      r8,     @-r15       ; push old r0 content to USP

# we should be finished saving irq context here

#if defined(CYGFUN_HAL_COMMON_KERNEL_SUPPORT)
# Increment scheduler lock
    .extern cyg_scheduler_sched_lock
    ldi:32  #cyg_scheduler_sched_lock,   r1
    ld      @r1,    r2
    addn    #1,     r2
    st      r2,     @r1
#endif

# Call hal_interrupt_handlers[vector](vector, cyg_hal_interrupt_data[vector])
    mov     r0,     r8                      ; copy the vector
    lsl     #2,     r8                      ; multiply vector by 4

    ldi:32  #hal_interrupt_handlers,    r13 ; load handlers table
    ld      @(r13, r8), r1                  ; current handler
    ldi:32  #hal_interrupt_data,    r13     ; load data table
    ld      @(r13, r8), r5                  ; current data, second argument
    call:d  @r1
    mov     r0,    r4                      ; exception number as argument

# At this point:
# r15 = stack pointer /*(should be usable as pointer to HAL_SavedRegisters)*/
# r4  = ISR return code (returned by call)
# r8  = ISR table offset (saved across call)
# r0  = vector number (NOT saved across call, but we don't need it)

/*
	# If we are returning from the last nested interrupt, move back
	# to the thread stack. interrupt_end() must be called on the
	# thread stack since it potentially causes a context switch.
	
	hal_from_intstack	
*/

#ifdef CYGFUN_HAL_COMMON_KERNEL_SUPPORT

# Call interrupt_end(return_value, hal_interrupt_objects[vector], regs)
# - r4 is the return value from the ISR
# - regs points to saved CPU context

    ldi:32  #hal_interrupt_objects,  r13    ; load objects table
    ld      @(r13, r8), r5                  ; current object, second argument
    ldi:32  #interrupt_end, r12
    call:d  @r12
    mov     r15,    r6                      ; third argument TODO is not in
                                            ; HAL_Saved_Registers format

#endif

##.globl hal_exception_return
hal_exception_return:

# Now pull saved state from stack and return to
# what thread was originally doing.

# at first store return values to SSP
    andccr  #0xdf
    st      r10,    @-r15                   ; store ps
    st      r9,     @-r15                   ; store pc
    orccr   #0x20

# and then restore normal registers from USP
    ldm0    (r0, r1, r2 , r3 , r4 , r5, r6, r7)
    ldm1    (r8, r9, r10, r11, r12, r13)

    ld      @r15+,  rp
    ld      @r15+,  mdh
    ld      @r15+,  mdl

    andccr  #0xdf
    reti

#==============================================================================
# Exception trampolines
# TBR table points to these short code sequences here that push the vector
# number on to the stack and then indirect via the VSR table to a handler.
# (__default_interrupt_vsr)

    .text

# macro to create exception handler (no error code)

.macro  hal_fr30_exception_noerr idx
    .globl hal_fr30_exception_noerr_\idx
hal_fr30_exception_noerr_\idx:
    st	r0,  @-r15
    ldi:32  #hal_vsr_table + \idx * 4,  r0
    ld  @r0,    r0
    jmp:d   @r0
    ldi:8   #\idx,    r0
.endm

    # Now generate all the default exception VSR trampolines.

#   hal_fr30_exception_noerr  1 no trampoline needed for reset and mode vector
    hal_fr30_exception_noerr  2
    hal_fr30_exception_noerr  3
    hal_fr30_exception_noerr  4
    hal_fr30_exception_noerr  5
    hal_fr30_exception_noerr  6
    hal_fr30_exception_noerr  7
    hal_fr30_exception_noerr  8
    hal_fr30_exception_noerr  9
    hal_fr30_exception_noerr 10
    hal_fr30_exception_noerr 11
    hal_fr30_exception_noerr 12
    hal_fr30_exception_noerr 13
    hal_fr30_exception_noerr 14

#==============================================================================
# IRQ handler trampolines

# macro to create exception handler (no error code)

.macro  hal_fr30_irq_handler idx
    .globl hal_fr30_irq_\idx
hal_fr30_irq_\idx:
    st  r0, @-r15
    ldi:32  #hal_vsr_table + \idx * 4,  r0
    ld  @r0,    r0
    jmp:d   @r0
    ldi:8   #\idx,    r0
.endm

    hal_fr30_irq_handler 15
    hal_fr30_irq_handler 16
    hal_fr30_irq_handler 17
    hal_fr30_irq_handler 18
    hal_fr30_irq_handler 19
    hal_fr30_irq_handler 20
    hal_fr30_irq_handler 21
    hal_fr30_irq_handler 22
    hal_fr30_irq_handler 23
    hal_fr30_irq_handler 24
    hal_fr30_irq_handler 25
    hal_fr30_irq_handler 26
    hal_fr30_irq_handler 27
    hal_fr30_irq_handler 28
    hal_fr30_irq_handler 29
    hal_fr30_irq_handler 30
    hal_fr30_irq_handler 31
    hal_fr30_irq_handler 32
    hal_fr30_irq_handler 33
    hal_fr30_irq_handler 34
    hal_fr30_irq_handler 35
    hal_fr30_irq_handler 36
    hal_fr30_irq_handler 37
    hal_fr30_irq_handler 38
    hal_fr30_irq_handler 39
    hal_fr30_irq_handler 40
    hal_fr30_irq_handler 41
    hal_fr30_irq_handler 42
    hal_fr30_irq_handler 43
    hal_fr30_irq_handler 44
    hal_fr30_irq_handler 45
    hal_fr30_irq_handler 46
    hal_fr30_irq_handler 47
    hal_fr30_irq_handler 48
    hal_fr30_irq_handler 49
    hal_fr30_irq_handler 50
    hal_fr30_irq_handler 51
    hal_fr30_irq_handler 52
    hal_fr30_irq_handler 53
    hal_fr30_irq_handler 54
    hal_fr30_irq_handler 55
    hal_fr30_irq_handler 56
    hal_fr30_irq_handler 57
    hal_fr30_irq_handler 58
    hal_fr30_irq_handler 59
    hal_fr30_irq_handler 60
    hal_fr30_irq_handler 61
    hal_fr30_irq_handler 62
    hal_fr30_irq_handler 63


    .data
//
// "Vectors" - fixed location data items
// This section contains any data which might be shared between
// an eCos application and any other environment, e.g. the debug
// ROM.
//
    .section ".fixed_vectors"
// Space for the virtual vectors        
    .balign 4
// Vectors used to communicate between eCos and ROM environments
    .globl  hal_virtual_vector_table
hal_virtual_vector_table:
    .rept   64                  // CYGNUM_CALL_IF_TABLE_SIZE
    .long   0
    .endr

    .globl  hal_vsr_table
hal_vsr_table:
    .rept   CYGNUM_HAL_VSR_COUNT            // exceptions & interrupts
    .long   0
    .endr

#==============================================================================
# Initial and interrupt stack

    .section ".bss"

    .balign 4
    .global cyg_interrupt_stack_base
cyg_interrupt_stack_base:
__interrupt_stack_base:
    .rept CYGNUM_HAL_COMMON_INTERRUPTS_STACK_SIZE
    .byte 0
    .endr
    .balign 4
    .global cyg_interrupt_stack
cyg_interrupt_stack:
__interrupt_stack:
    .long   0,0,0,0,0,0,0,0


#ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS
    .global __stub_stack_base
__stub_stack_base:
    .rept CYGNUM_HAL_COMMON_INTERRUPTS_STACK_SIZE
    .byte 0
    .endr
    .balign 4
    .global __stub_stack
__stub_stack:

    .long   0,0,0,0,0,0,0,0
#endif // CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS

    .balign 4
__user_stack_base:
//  FIXME TODO import symbolic constant from C-code
    .rept 4532
    .byte 0
    .endr
    .balign 4
__user_stack:
    .long   0

#------------------------------------------------------------------------------
# end of vectors.S

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