vectors.s

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##=============================================================================
##
##      vectors.S
##
##      fr30 startup code and exception and interrupt vectors
##
##=============================================================================
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## Copyright (C) 2007 eCosCentric Ltd.
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##=============================================================================
#######DESCRIPTIONBEGIN####
##
## Author(s):   larsi
## Contributors:larsi
## Date:        2006-06-26
## Purpose:     fr30 exception vectors
## Description: This file defines the code placed into the exception
##              vectors. It also contains the startup code and first
##              level default VSRs that save and restore state for
##              both exceptions and interrupts.
##
######DESCRIPTIONEND####
##
##=============================================================================


#include <pkgconf/system.h>
#include <pkgconf/hal.h>
#include CYGBLD_HAL_PLATFORM_H

#ifdef CYGPKG_KERNEL
#include <pkgconf/kernel.h>
#endif /* CYGPKG_KERNEL */

#include <cyg/hal/arch.inc>

#==============================================================================

    .file   "vectors.S"

#==============================================================================
# Real startup code. We jump here from the various reset vectors to set up the
# world.

    .text
    .globl	_start

_start:

# disable interrupts and set priority to lowest (=disable)
    andccr  #0xef
    stilm   #0x0

    hal_diag_init_led
#ifdef CYGPKG_HAL_FR30_FLASH_INIT_DEFINED
    hal_flash_init
#endif
    hal_cpu_init

#ifdef CYGPKG_HAL_FR30_MEMC_INIT_DEFINED
    hal_memc_init
#endif

    hal_intc_init

    hal_cache_init

    hal_timer_init

# Zero the BSS. If the BSS is not a whole number of words
# long we will write up to 3 extra bytes at the end.
# (This should not be a problem usually).
    ldi:32  #__bss_end - 8,     r12
    ldi:32  #__bss_start - 4,   r13
    eor     r0, r0 ; zero r0
2:
    add     #0x4,   r13
    cmp     r12,    r13
    ble:d   2b
    st      r0,     @r13


#if defined(CYG_HAL_STARTUP_ROM) || defined(CYG_HAL_STARTUP_ROMRAM)

# In a ROM booted system, we also need to copy the data section
# out to the RAM.
    ldi:32  #__rom_data_start - 4,  r11
    ldi:32  #__ram_data_start - 4,  r13
    ldi:32  #__ram_data_end - 8,    r12
3:
    add     #0x4,   r11
    add     #0x4,   r13
    ld      @r11,   r0
    cmp     r12,    r13
    ble:d   3b
    st      r0,     @r13

#endif

    # Set up the stacks
    # Begin with interrupt (system) stack

    ldi:32  #__interrupt_stack, r11
    mov     r11,    ssp

    # and now continue with user stack

    orccr   #0x20
    ldi:32  #__user_stack,  r11
    mov     r11,    usp

#if defined(CYG_HAL_STARTUP_ROM) || defined(CYG_HAL_STARTUP_ROMRAM)
# If we are here, initialize the hal_vsr_table. RAM startup
# configurations can assume that Redboot has already set it up.

    .extern hal_mon_init
    ldi:32  #hal_mon_init,  r11
    call    @r11

#endif

    .extern hal_variant_init
    ldi:32  #hal_variant_init,  r11
    call	@r11

    .extern hal_platform_init
    ldi:32  #hal_platform_init,  r11
    call    @r11


#ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS
    // This is here so we can debug the constructors.
    .extern initialize_stub
    ldi:32  #initialize_stub,   r11
    call    @r11
#endif

    .extern cyg_hal_invoke_constructors
    ldi:32  #cyg_hal_invoke_constructors,  r11
    call    @r11

# TODO integrate into hal_intr.h
# set irq 25 priority (for reload timer 1)
    ldi:20  #0x449,     r4
    ldi:8   #0x10,      r5
    stb     r5,         @r4

#ifdef CYGDBG_HAL_DEBUG_GDB_INITIAL_BREAK
        .extern breakpoint
        call breakpoint
#endif

    .extern cyg_start
    ldi:32  #cyg_start,  r11
    call    @r11

# Hmm.  Not expecting to return from cyg_start, endless nop loop
1:  nop
    call   1b

#==============================================================================
# Default exception VSR

    .align  2, 0xcc
    .globl  __default_exception_vsr
__default_exception_vsr:

    ## We enter here with the CPU state still in the registers and:
    ##  @(ssp,8)    PS pushed by hardware
    ##  @(ssp,4)    PC pushed by hardware
    ##  @(ssp)      old register r0 content pushed by trampoline
    ##  r0 now contains the vector number

# at first switch to USP (set bit 5 in CCR in PS)
    orccr   #0x20

    st      r0,     @-r15
    st      mdl,    @-r15
    st      mdh,    @-r15

    mov     r0,     mdh         ; save exception/interrupt number
    mov     r15,    r0
    addn    #+12,   r0
    mov     r0,     mdl         ; save r15 also in mdl

    st      r0,     @-r15       ; store usp
    mov     ssp,    r0
    st      r0,     @-r15       ; store ssp (TODO maybe have to sub 12 before)
    st      rp,     @-r15
    st      tbr,    @-r15
    addsp   #-8                 ; skip 2 positions for PS and PC
    mov     r15,    r0          ; save stack position to later store PS and PC

    st      mdl,    @-r15       ; store original r15 here
    stm1    (r8, r9, r10, r11, r12, r13, r14)
    stm0    (r1, r2, r3, r4, r5, r6, r7)

    mov     ssp,    r14
    ld      @r14,   r1          ; get original r0 content
    st      r1,     @-r15       ; and store it

    ld      @(r14,4),   r2      ; get hardware pushed PC
    st      r2,     @r0         ; and store it
    ld      @(r14,8),   r3      ; get hardware pushed PS
    addn    #4,     r0          ; and
    st      r3,     @r0         ; store it

# we should be finished saving context here

# Call exception handler
    .extern hal_default_exception_handler

    ldi:32  #hal_default_exception_handler,  r11
    mov     r15,    r5          ; pointer to saved state as second argument
    call:d  @r11
    mov     mdh,    r4          ; exception number as first argument

__default_exception_vsr_return:


    ## At this point, the user stack (USP) contains:
    ## @(usp,0x60) trap number
    ## @(usp,0x5c) mdl
    ## @(usp,0x58) mdh
    ## @(usp,0x54) usp
    ## @(usp,0x50) ssp
    ## @(usp,0x4c) rp
    ## @(usp,0x48) tbr
    ## @(usp,0x44) ps
    ## @(usp,0x40) pc
    ## @(usp,0x3c) r15
    ## @(usp,0x38) r14
    ## @(usp,0x34) r13
    ## @(usp,0x30) r12
    ## @(usp,0x2c) r11
    ## @(usp,0x28) r10
    ## @(usp,0x24) r9
    ## @(usp,0x20) r8
    ## @(usp,0x1c) r7
    ## @(usp,0x18) r6
    ## @(usp,0x14) r5
    ## @(usp,0x10) r4
    ## @(usp,0xc)  r3
    ## @(usp,8)    r2
    ## @(usp,4)    r1
    ## @(usp)      r0
    ##
    ## and system stack (SSP) contains:
    ## @(ssp,8) PS
    ## @(ssp,4) PC
    ## @(ssp)   old r0 content