hal_intr.h

开放源码实时操作系统源码.

#define HAL_DISABLE_INTERRUPTS(_old_)           \
CYG_MACRO_START                                 \
    register int x ;                            \
    asm volatile ("st   r1, @-r15 ;\n"          \
         "MOV PS, r1 ;\n"                       \
         "LDI:8 #0x10,%0 ;\n"                   \
         "AND r1, %0 ;\n"                       \
         "LSR #1,%0 ;\n"                        \
         "ld    @r15+,  r1 ;\n"                 \
         "ANDCCR #0xEF \n"                      \
         :  "=r" (x)                            \
        );                                      \
    (_old_) = (x);                              \
CYG_MACRO_END

#define HAL_RESTORE_INTERRUPTS(_old_)           \
CYG_MACRO_START                                 \
    register int x = _old_;                     \
    asm volatile ( "CMP #8, %0 ;\n"             \
                   "BEQ 0f ;\n"                 \
                   "ANDCCR #0xEF ;\n"           \
                   "BRA 1f;\n"                  \
                   "0:\n"                       \
                   "ORCCR #0x10 ;\n"            \
                   "1:\n"                       \
                   : /* No outputs */           \
                   : "r"(x)                     \
                 );                             \
CYG_MACRO_END

// 5th bit (0x10 / #10H) is interrupt flag
// it is shifted right to be able to work with 4 bit immediate in the other macros
#define HAL_QUERY_INTERRUPTS(_old_)             \
CYG_MACRO_START                                 \
    register int x ;                            \
    asm volatile ("MOV PS,__tmp_reg__ ;\n"      \
         "LDI:8 #10H,%0 ;\n"                    \
         "AND __tmp_reg__,%0 ;\n"               \
         "LSR #1,%0 ;\n"                        \
         :  "=r" (x)                            \
        );                                      \
    (_old_) = (x);                              \
CYG_MACRO_END

//---------------------------------------------------------------------------
// Interrupt and VSR attachment macros


#define HAL_INTERRUPT_IN_USE( _vector_, _state_)        \
    CYG_MACRO_START                                     \
    cyg_uint32 _index_;                                 \
    HAL_TRANSLATE_VECTOR ((_vector_), _index_);         \
                                                        \
    if (hal_interrupt_handlers[_index_]                 \
        ==(CYG_ADDRESS)HAL_DEFAULT_ISR)                 \
        (_state_) = 0;                                  \
    else                                                \
        (_state_) = 1;                                  \
    CYG_MACRO_END

#ifndef HAL_INTERRUPT_ATTACH
externC void __default_interrupt_vsr(void);
#define HAL_INTERRUPT_ATTACH( _vector_, _isr_, _data_, _object_ )               \
    CYG_MACRO_START                                                             \
    cyg_uint32 _index_;                                                         \
    HAL_TRANSLATE_VECTOR((_vector_), _index_);                                  \
                                                                                \
    HAL_VSR_SET( _vector_, &__default_interrupt_vsr , NULL);                    \
    if( hal_interrupt_handlers[_index_] == (CYG_ADDRESS)HAL_DEFAULT_ISR )       \
    {                                                                           \
        hal_interrupt_handlers[_index_] = (CYG_ADDRESS)(_isr_);                 \
        hal_interrupt_data[_index_] = (CYG_ADDRWORD)(_data_);                   \
        hal_interrupt_objects[_index_] = (CYG_ADDRESS)(_object_);               \
    }                                                                           \
    CYG_MACRO_END
#endif /* HAL_INTERRUPT_ATTACH */

#define HAL_INTERRUPT_DETACH( _vector_, _isr_ ) \
    CYG_MACRO_START                             \
    cyg_uint32 _index_;                         \
    HAL_TRANSLATE_VECTOR((_vector_), _index_);  \
                                                \
    if (hal_interrupt_handlers[_index_]         \
        == (CYG_ADDRESS)(_isr_))                \
    {                                           \
        hal_interrupt_handlers[_index_] =       \
            (CYG_ADDRESS)HAL_DEFAULT_ISR;       \
        hal_interrupt_data[_index_] = 0;        \
        hal_interrupt_objects[_index_] = 0;     \
    }                                           \
    CYG_MACRO_END

#define HAL_VSR_GET( _vector_, _pvsr_ )                         \
    *((CYG_ADDRESS *)(_pvsr_)) = hal_vsr_table[(_vector_)];


#define HAL_VSR_SET( _vector_, _vsr_, _poldvsr_ )               \
    CYG_MACRO_START                                             \
    CYG_ADDRESS *__poldvsr = (CYG_ADDRESS *)(_poldvsr_);        \
    if( __poldvsr != NULL )                                     \
        *__poldvsr = hal_vsr_table[(_vector_)];                 \
    hal_vsr_table[(_vector_)] = (CYG_ADDRESS)(_vsr_);           \
    CYG_MACRO_END

// This is an ugly name, but what it means is: grab the VSR back to eCos
// internal handling, or if you like, the default handler.  But if
// cooperating with GDB and CygMon, the default behaviour is to pass most
// exceptions to CygMon.  This macro undoes that so that eCos handles the
// exception.  So use it with care.

externC void __default_exception_vsr(void);
externC void __default_interrupt_vsr(void);

#define HAL_VSR_SET_TO_ECOS_HANDLER( _vector_, _poldvsr_ )                  \
CYG_MACRO_START                                                             \
    HAL_VSR_SET( _vector_, _vector_ > CYGNUM_HAL_EXCEPTION_MAX              \
                              ? (CYG_ADDRESS)__default_interrupt_vsr        \
                                : (CYG_ADDRESS)__default_exception_vsr,     \
                 _poldvsr_ );                                               \
CYG_MACRO_END

//--------------------------------------------------------------------------
// Vector translation.
// For chained interrupts we only have a single vector though which all
// are passed. For unchained interrupts we have a vector per interrupt.

#ifndef HAL_TRANSLATE_VECTOR

#if defined(CYGIMP_HAL_COMMON_INTERRUPTS_CHAIN)

#define HAL_TRANSLATE_VECTOR(_vector_,_index_) (_index_) = 0

#else

#define HAL_TRANSLATE_VECTOR(_vector_,_index_) (_index_) = (_vector_)

#endif

#endif

//--------------------------------------------------------------------------
// Clock control.
// This code uses the 16 bit reload timer 1. The defines are used to specify
// the IO adress of the registers, that are different in FR30 variants.

#ifndef CYGHWR_HAL_CLOCK_CONTROL_DEFINED

extern CYG_WORD32 cyg_hal_clock_period;

#define CYGHWR_HAL_CLOCK_PERIOD_DEFINED

#define HAL_CLOCK_INITIALIZE( _period_ )                    \
CYG_MACRO_START                                             \
    HAL_WRITE_UINT16( CYG_HAL_FR30_RTC_TMRLR , _period_);   \
    HAL_WRITE_UINT16( CYG_HAL_FR30_RTC_TMCSR , 0x081b);     \
    cyg_hal_clock_period = _period_;                        \
CYG_MACRO_END

// This clears the interrupt request for reload timer 1 (RTC)
#define HAL_CLOCK_RESET( _vector_, _period_ )               \
CYG_MACRO_START                                             \
asm volatile("ldi:8     #0x57,  r0;\n"                      \
             "bandl     #0xb,   @r0;\n"                     \
             : : :"r0");                                    \
CYG_MACRO_END

#define HAL_CLOCK_READ( _pvalue_ )                          \
CYG_MACRO_START                                             \
    CYG_FAIL("clock_read");                                 \
    register CYG_WORD32 result;                             \
    HAL_READ_UINT16( CYG_HAL_FR30_RTC_TMR, result);         \
    *(_pvalue_) = cyg_hal_clock_period - result;            \
CYG_MACRO_END

#define CYGHWR_HAL_CLOCK_CONTROL_DEFINED

#endif


#if defined(CYGVAR_KERNEL_COUNTERS_CLOCK_LATENCY) && \
    !defined(HAL_CLOCK_LATENCY)
#define HAL_CLOCK_LATENCY( _pvalue_ )                       \
CYG_MACRO_START                                             \
    register CYG_WORD32 _cval_;                             \
    HAL_CLOCK_READ(&_cval_);                                \
    *(_pvalue_) = _cval_ - cyg_hal_clock_period;            \
CYG_MACRO_END
#endif

//----------------------------------------------------------------------------
// Reset
// this clears BIT4 in STCR(0x481), which should issue a reset

#define HAL_PLATFORM_RESET()                                \
    asm volatile (                                          \
        "ldi:20 #0x481, r0;\n"                              \
        "bandh  #1,     @r0;\n"                             \
        : : :"r0");

externC void _start(void);
#define HAL_PLATFORM_RESET_ENTRY        (&_start)

//--------------------------------------------------------------------------
// Microsecond delay
// This uses reload timer 2, because timer 0 and 1 can cause DMA transfers.
// Timer 2 is only used for delay service. We maybe support it out of the
// scheduler clock in the future.

externC void hal_delay_us(cyg_int32 usecs);
#define HAL_DELAY_US(_millis_)           hal_delay_us(_millis_);

//---------------------------------------------------------------------------
#endif // ifndef CYGONCE_HAL_HAL_INTR_H
// End of hal_intr.h