hal_intr.h

开放源码实时操作系统源码.

#ifndef CYGONCE_HAL_HAL_INTR_H
#define CYGONCE_HAL_HAL_INTR_H

//==========================================================================
//
//      hal_intr.h
//
//      FR30 HAL Interrupt and clock support
//
//==========================================================================
//####ECOSGPLCOPYRIGHTBEGIN####
// -------------------------------------------
// This file is part of eCos, the Embedded Configurable Operating System.
// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
// Copyright (C) 2007 eCosCentric Ltd.
//
// eCos is free software; you can redistribute it and/or modify it under
// the terms of the GNU General Public License as published by the Free
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//
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// WARRANTY; without even the implied warranty of MERCHANTABILITY or
// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
// for more details.
//
// You should have received a copy of the GNU General Public License along
// with eCos; if not, write to the Free Software Foundation, Inc.,
// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
//
// As a special exception, if other files instantiate templates or use macros
// or inline functions from this file, or you compile this file and link it
// with other works to produce a work based on this file, this file does not
// by itself cause the resulting work to be covered by the GNU General Public
// License. However the source code for this file must still be made available
// in accordance with section (3) of the GNU General Public License.
//
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// this file might be covered by the GNU General Public License.
//
// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
// at http://sources.redhat.com/ecos/ecos-license/
// -------------------------------------------
//####ECOSGPLCOPYRIGHTEND####
//==========================================================================
//#####DESCRIPTIONBEGIN####
//
// Author(s):    larsi
// Contributors: larsi
// Date:         2006-06-09
// Purpose:      Define Interrupt support
// Description:  The macros defined here provide the HAL APIs for handling
//               interrupts and the clock.
//              
// Usage:
//               #include <cyg/hal/hal_intr.h>
//               ...
//
//####DESCRIPTIONEND####
//
//==========================================================================

#include <pkgconf/hal.h>
#include <pkgconf/hal_fr30.h>

#include <cyg/infra/cyg_type.h>

#include <cyg/hal/var_intr.h>

//--------------------------------------------------------------------------
// Exception vectors.
// Standard exception,interrupt and trap(EIT) vectors supported by FR30 CPUs
// These values are the ones to use for HAL_VSR_GET/SET
// The FR30 vector table lies in reversed in memory, therefore we do
// the 255-x thing here.

#define CYGNUM_HAL_VECTOR_RESET                   0
// Values from 1 - 8 are system reserved
#define CYGNUM_HAL_VECTOR_MODE_VECTOR             1
#define CYGNUM_HAL_VECTOR_COPR_NOT_FOUND          7
#define CYGNUM_HAL_VECTOR_COPR_ERROR              8
#define CYGNUM_HAL_VECTOR_BREAKPOINT              9
#define CYGNUM_HAL_VECTOR_INTE                    CYGNUM_HAL_VECTOR_BREAKPOINT
// Values 10 and 11 are system reserved
#define CYGNUM_HAL_VECTOR_INSTR_BREAK_EXCEPTION   10
#define CYGNUM_HAL_VECTOR_OPERAND_BREAK_TRAP      11
#define CYGNUM_HAL_VECTOR_DEBUG                   12
#define CYGNUM_HAL_VECTOR_STEP_TRACE              CYGNUM_HAL_VECTOR_DEBUG
// Value 13 is system reserved
#define CYGNUM_HAL_VECTOR_NMI_INTR_TOOL           13
// Value 14 undefined instruction exception
#define CYGNUM_HAL_VECTOR_OPCODE                  14
// NMI (special non maskable interrupt)
#define CYGNUM_HAL_VECTOR_NMI                     15
// interrupts
// Note that these defines are for C code and have to be the same like those in
// arch.inc for assembler code !
#define CYGNUM_HAL_VECTOR_INTRFIRST               15
#define CYGNUM_HAL_VECTOR_INTRLAST                63
#define CYGNUM_HAL_VECTOR_NUMINTRS                (CYGNUM_HAL_VECTOR_INTRLAST-CYGNUM_HAL_VECTOR_INTRFIRST+1)
// Values 64 and 65 are reserved for system
// traps
#define CYGNUM_HAL_VECTOR_TRAPFIRST               80
#define CYGNUM_HAL_VECTOR_SYSTEM_CALL             CYGNUM_HAL_VECTOR_TRAPFIRST
#define CYGNUM_HAL_VECTOR_TRAPLAST                255
#define CYGNUM_HAL_VECTOR_NUMTRAPS                (CYGNUM_HAL_VECTOR_TRAPLAST-CYGNUM_HAL_VECTOR_TRAPFIRST+1)

// The default size of the VSR table is 256 entries.
#ifndef CYGNUM_HAL_VSR_MIN
#define CYGNUM_HAL_VSR_MIN                        0
#define CYGNUM_HAL_VSR_MAX                        255
#define CYGNUM_HAL_VSR_COUNT                      256
#endif

// For ecos fr30 interrupts are interrupts and fr30 exceptions and
// fr30 traps are both exceptions

// Common interrupt vectors
#ifndef CYGNUM_HAL_ISR_MIN
#define CYGNUM_HAL_ISR_MIN                       CYGNUM_HAL_VECTOR_INTRFIRST
#define CYGNUM_HAL_ISR_MAX                       CYGNUM_HAL_VECTOR_INTRLAST
#define CYGNUM_HAL_ISR_COUNT                     (CYGNUM_HAL_VECTOR_NUMINTRS)
#endif
// Common exception vectors. (so these are fr30 exceptions and traps)
#define CYGNUM_HAL_EXCEPTION_RESET               CYGNUM_HAL_VECTOR_RESET
#define CYGNUM_HAL_EXCEPTION_FPU_NOT_AVAIL       CYGNUM_HAL_VECTOR_COPR_NOT_FOUND
#define CYGNUM_HAL_EXCEPTION_FPU                 CYGNUM_HAL_VECTOR_COPR_ERROR
#define CYGNUM_HAL_EXCEPTION_TRAP                CYGNUM_HAL_VECTOR_INTE
// #define CYGNUM_HAL_EXCEPTION_INTERRUPT           CYGNUM_HAL_VECTOR_BREAKPOINT
// #define CYGNUM_HAL_EXCEPTION_TRAP                CYGNUM_HAL_VECTOR_STEP_TRACE
#define CYGNUM_HAL_EXCEPTION_SINGLE_STEP         CYGNUM_HAL_VECTOR_STEP_TRACE
#define CYGNUM_HAL_EXCEPTION_ILLEGAL_INSTRUCTION CYGNUM_HAL_VECTOR_OPCODE

// common interrupt vectors
// I am sure more defines can be moved from variant to architecture HAL here
#define CYGNUM_HAL_INTERRUPT_NMI                 15

// here we define exceptions and traps as the fr30 docs termini
#define CYGNUM_HAL_EXCEPTION_FR30_MIN            0
#define CYGNUM_HAL_EXCEPTION_FR30_MAX            14
#define CYGNUM_HAL_EXCEPTION_FR30_COUNT (CYGNUM_HAL_EXCEPTION_FR30_MAX - CYGNUM_HAL_EXCEPTION_FR30_MIN + 1)

#define CYGNUM_HAL_TRAP_FR30_MIN                 80
#define CYGNUM_HAL_TRAP_FR30_MAX                 255
#define CYGNUM_HAL_TRAP_FR30_COUNT (CYGNUM_HAL_TRAP_FR30_MAX - CYGNUM_HAL_TRAP_FR30_MIN + 1)

// here we define the ecos ones
// nicht mehr aktuell:(calculated from fr30 ones) FIXME maybe have to
// change to correspons to durchgaengig vector numbers. In this table
// exceptions are unterbrochen from interrupts
#define CYGNUM_HAL_EXCEPTION_MIN                 0
#define CYGNUM_HAL_EXCEPTION_MAX                 255
#define CYGNUM_HAL_EXCEPTION_COUNT           \
                 ( CYGNUM_HAL_EXCEPTION_MAX - CYGNUM_HAL_EXCEPTION_MIN + 1 )

//--------------------------------------------------------------------------
// Interrupt levels
// Lower numbers mean stronger interrupt levels
// values 0 - 14 are system reserved and can not be set by a program
// (setting them would add 16 to the value automatically)
// value 15 is for NMI
// value 31 disables the interrupt

#ifndef CYGHWR_HAL_INTERRUPT_LEVELS_DEFINED

#define CYGNUM_HAL_INTERRUPT_LEVEL_0                     16
#define CYGNUM_HAL_INTERRUPT_LEVEL_1                     17
#define CYGNUM_HAL_INTERRUPT_LEVEL_2                     18
#define CYGNUM_HAL_INTERRUPT_LEVEL_3                     19
#define CYGNUM_HAL_INTERRUPT_LEVEL_4                     20
#define CYGNUM_HAL_INTERRUPT_LEVEL_5                     21
#define CYGNUM_HAL_INTERRUPT_LEVEL_6                     22
#define CYGNUM_HAL_INTERRUPT_LEVEL_7                     23
#define CYGNUM_HAL_INTERRUPT_LEVEL_8                     24
#define CYGNUM_HAL_INTERRUPT_LEVEL_9                     25
#define CYGNUM_HAL_INTERRUPT_LEVEL_10                    26
#define CYGNUM_HAL_INTERRUPT_LEVEL_11                    27
#define CYGNUM_HAL_INTERRUPT_LEVEL_12                    28
#define CYGNUM_HAL_INTERRUPT_LEVEL_13                    29
#define CYGNUM_HAL_INTERRUPT_LEVEL_14                    30
#define CYGNUM_HAL_INTERRUPT_LEVEL_15                    31
#define CYGNUM_HAL_INTERRUPT_LEVEL_DISABLE              \
  CYGNUM_HAL_INTERRUPT_LEVEL_15

#define CYGHWR_HAL_INTERRUPT_LEVELS_DEFINED

#endif

//--------------------------------------------------------------------------
// Static data used by HAL

// ISR tables
externC volatile CYG_ADDRESS  hal_interrupt_handlers[CYGNUM_HAL_ISR_COUNT];
externC volatile CYG_ADDRWORD hal_interrupt_data[CYGNUM_HAL_ISR_COUNT];
externC volatile CYG_ADDRESS  hal_interrupt_objects[CYGNUM_HAL_ISR_COUNT];

// VSR table
externC volatile CYG_ADDRESS  hal_vsr_table[CYGNUM_HAL_VSR_COUNT];

//--------------------------------------------------------------------------
// Interrupt state storage

typedef cyg_uint32 CYG_INTERRUPT_STATE;

//---------------------------------------------------------------------------
// Default ISR
externC cyg_uint32 hal_default_isr(CYG_ADDRWORD vector, CYG_ADDRWORD data);

#define HAL_DEFAULT_ISR hal_default_isr

//--------------------------------------------------------------------------
// CPU interrupt enable/disable macros

#define HAL_ENABLE_INTERRUPTS()                 \
CYG_MACRO_START                                 \
    asm volatile ("orccr #0x10;\n") ;           \
CYG_MACRO_END