📄 var_intr.h
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); \
CYG_MACRO_END
#define CYGHWR_HAL_INTERRUPT_ENABLE_DISABLE_RESTORE_DEFINED
// ------------------------------------------------------------------------
// For the bits which are in the SR, we only need to diddle the shadow
// variable; restore interrupts will pick that up at the end of the macro.
// Neat, huh.
#ifndef CYGOPT_HAL_MIPS_UPD985XX_HARDWARE_BUGS_S2
// Vanilla versions here: trick versions with the workaround follow:
#define HAL_INTERRUPT_MASK( _vector_ ) \
CYG_MACRO_START \
register int _intstate; \
register int _shift; \
HAL_DISABLE_INTERRUPTS( _intstate ); \
if ( CYGNUM_HAL_INTERRUPT_SYSCTL_LOW > (_vector_) ) { \
/* mask starts at bit 8 */ \
_shift = 8 + (_vector_) - CYGNUM_HAL_INTERRUPT_STATUS_CAUSE_LOW; \
hal_interrupt_sr_mask_shadow &=~(1 << _shift); \
} \
else { \
_shift = (_vector_) - CYGNUM_HAL_INTERRUPT_SYSCTL_LOW; \
*S_IMR &=~(1 << _shift); \
} \
HAL_RESTORE_INTERRUPTS( _intstate ); \
CYG_MACRO_END
#define HAL_INTERRUPT_UNMASK( _vector_ ) \
CYG_MACRO_START \
register int _intstate; \
register int _shift; \
HAL_DISABLE_INTERRUPTS( _intstate ); \
if ( CYGNUM_HAL_INTERRUPT_SYSCTL_LOW > (_vector_) ) { \
/* mask starts at bit 8 */ \
_shift = 8 + (_vector_) - CYGNUM_HAL_INTERRUPT_STATUS_CAUSE_LOW; \
hal_interrupt_sr_mask_shadow |= (1 << _shift); \
} \
else { \
_shift = (_vector_) - CYGNUM_HAL_INTERRUPT_SYSCTL_LOW; \
*S_IMR |= (1 << _shift); \
} \
HAL_RESTORE_INTERRUPTS( _intstate ); \
CYG_MACRO_END
#define HAL_INTERRUPT_ACKNOWLEDGE( _vector_ ) \
CYG_MACRO_START \
register int _intstate; \
HAL_DISABLE_INTERRUPTS( _intstate ); \
/* Default clears the bit in the cause register. But VR4120 doc */ \
/* says this is a NOP so we ignore low numbered sources except the */ \
/* software interrupt bits. */ \
if ( CYGNUM_HAL_INTERRUPT_SYSCTL_LOW <= (_vector_) || \
CYGNUM_HAL_INTERRUPT_SYSCTL == (_vector_) ) { \
register int i; \
i = *S_ISR; /* This is read-clear! */ \
} \
else if ( CYGNUM_HAL_INTERRUPT_SOFT_ZERO == (_vector_) || \
CYGNUM_HAL_INTERRUPT_SOFT_ONE == (_vector_) ) { \
/* These two are acknowledged by writing the bit to zero in */ \
/* the cause register. NB not the status register! */ \
asm volatile ( \
"mfc0 $3,$13\n" \
"la $2,0x00000100\n" \
"sllv $2,$2,%0\n" \
"andi $2,$2,0x0300\n" \
"nor $2,$2,$0\n" \
"and $3,$3,$2\n" \
"mtc0 $3,$13\n" \
"nop; nop; nop\n" \
: \
: "r"((_vector_)-CYGNUM_HAL_INTERRUPT_STATUS_CAUSE_LOW) \
: "$2", "$3" \
); \
} \
HAL_RESTORE_INTERRUPTS( _intstate ); \
CYG_MACRO_END
#else // DEFINED: CYGOPT_HAL_MIPS_UPD985XX_HARDWARE_BUGS_S2
#ifdef __cplusplus
extern "C" {
#endif
extern void cyg_hal_interrupt_unmask( int vec );
extern void cyg_hal_interrupt_mask( int vec );
extern void cyg_hal_interrupt_acknowledge( int vec );
#ifdef __cplusplus
} /* extern "C" */
#endif
#define HAL_INTERRUPT_MASK( _vector_ ) \
CYG_MACRO_START \
register int _intstate; \
register int _shift; \
HAL_DISABLE_INTERRUPTS( _intstate ); \
if ( CYGNUM_HAL_INTERRUPT_SYSCTL_LOW > (_vector_) ) { \
/* mask starts at bit 8 */ \
_shift = 8 + (_vector_) - CYGNUM_HAL_INTERRUPT_STATUS_CAUSE_LOW; \
hal_interrupt_sr_mask_shadow &=~(1 << _shift); \
} \
else { \
cyg_hal_interrupt_mask( (_vector_) ); \
} \
HAL_RESTORE_INTERRUPTS( _intstate ); \
CYG_MACRO_END
#define HAL_INTERRUPT_UNMASK( _vector_ ) \
CYG_MACRO_START \
register int _intstate; \
register int _shift; \
HAL_DISABLE_INTERRUPTS( _intstate ); \
if ( CYGNUM_HAL_INTERRUPT_SYSCTL_LOW > (_vector_) ) { \
/* mask starts at bit 8 */ \
_shift = 8 + (_vector_) - CYGNUM_HAL_INTERRUPT_STATUS_CAUSE_LOW; \
hal_interrupt_sr_mask_shadow |= (1 << _shift); \
} \
else { \
cyg_hal_interrupt_unmask( (_vector_) ); \
} \
HAL_RESTORE_INTERRUPTS( _intstate ); \
CYG_MACRO_END
#define HAL_INTERRUPT_ACKNOWLEDGE( _vector_ ) \
CYG_MACRO_START \
register int _intstate; \
HAL_DISABLE_INTERRUPTS( _intstate ); \
/* Default clears the bit in the cause register. But VR4120 doc */ \
/* says this is a NOP so we ignore low numbered sources except the */ \
/* software interrupt bits. */ \
if ( CYGNUM_HAL_INTERRUPT_SYSCTL_LOW <= (_vector_) || \
CYGNUM_HAL_INTERRUPT_SYSCTL == (_vector_) ) { \
cyg_hal_interrupt_acknowledge( (_vector_) ); \
} \
else if ( CYGNUM_HAL_INTERRUPT_SOFT_ZERO == (_vector_) || \
CYGNUM_HAL_INTERRUPT_SOFT_ONE == (_vector_) ) { \
/* These two are acknowledged by writing the bit to zero in */ \
/* the cause register. NB not the status register! */ \
asm volatile ( \
"mfc0 $3,$13\n" \
"la $2,0x00000100\n" \
"sllv $2,$2,%0\n" \
"andi $2,$2,0x0300\n" \
"nor $2,$2,$0\n" \
"and $3,$3,$2\n" \
"mtc0 $3,$13\n" \
"nop; nop; nop\n" \
: \
: "r"((_vector_)-CYGNUM_HAL_INTERRUPT_STATUS_CAUSE_LOW) \
: "$2", "$3" \
); \
} \
HAL_RESTORE_INTERRUPTS( _intstate ); \
CYG_MACRO_END
#endif // CYGOPT_HAL_MIPS_UPD985XX_HARDWARE_BUGS_S2
#define HAL_INTERRUPT_CONFIGURE( _vector_, _level_, _up_ )
#define HAL_INTERRUPT_SET_LEVEL( _vector_, _level_ )
#define CYGHWR_HAL_INTERRUPT_CONTROLLER_ACCESS_DEFINED
//--------------------------------------------------------------------------
// Useful for debugging...
#define HAL_READ_INTR_REGS( _status, _cause ) \
{ \
asm volatile ( \
"mfc0 %0,$12; nop;" \
: "=r"(_status) \
); \
asm volatile ( \
"mfc0 %0,$13; nop;" \
: "=r"(_cause) \
); \
}
//--------------------------------------------------------------------------
#endif // ! __ASSEMBLER__
#endif // ifndef CYGONCE_HAL_VAR_INTR_H
// End of var_intr.h
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