mcf5272_serial.c

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        port->autobaud_state = AB_IDLE;
#else
        // Disable autobaud detection for this port
        port->autobaud_state = AB_DISABLED;
#endif

        // Initialize the UART 1 output pins
        HAL_READ_UINT32(&MCF5272_DEVS->gpio.pdcnt, pdcnt);
        HAL_WRITE_UINT32(&MCF5272_DEVS->gpio.pdcnt, 
                         MCF5272_GPIO_PDCNT_URT1_EN |
                         (pdcnt & ~MCF5272_GPIO_PDCNT_URT1_MSK));

    }
#endif // CYGPKG_IO_SERIAL_COLDFIRE_MCF5272_CHANNEL1


    if (chan->out_cbuf.len > 0)
    {
        // If the the buffer is greater than zero, then the driver will
        // use interrupt driven  I/O. Hence, the driver creates an
        // interrupt context for the UART device.

        cyg_drv_interrupt_create(port->uart_vector,
                                 priority_level,           // Priority
                                 (cyg_addrword_t)chan,     // Data item passed
                                                       // to interrupt handler
                                 MCF5272_uart_ISR,
                                 MCF5272_uart_DSR,
                                 &port->serial_interrupt_handle,
                                 &port->serial_interrupt);

        cyg_drv_interrupt_attach(port->serial_interrupt_handle);

        cyg_drv_interrupt_unmask(port->uart_vector);
    }

    // Really only required for interrupt driven devices
    (chan->callbacks->serial_init)(chan);

#ifdef CYGDBG_IO_INIT
    diag_printf("MCF5272 UART init - dev: %p.%d\n", port->base,
        port->uart_vector);
#endif
    
    // Configure Serial device
    return (MCF5272_uart_config_port(chan, &chan->config));
}


// ***************************************************************************
// MCF5272_uart_config_port() - Configure the UART port.
//
// Internal function to actually configure the hardware to desired baud rate,
// etc.
//
// INPUT:
//    chan        - The channel information.
//    new_confg   - The port configuration which include the desired
//                  baud rate, etc.
//
// RETURN:
//    Returns true if the port configuration is successful. Otherwise,
//    it retuns false.

static bool MCF5272_uart_config_port(serial_channel *chan,
                                     cyg_serial_info_t *new_config)
{
    MCF5272_uart_info_t *port = (MCF5272_uart_info_t *) chan->dev_priv;
    cyg_uint8 mode_reg = 0;
    cyg_uint32 ubgs;


    // If we are configuring the port once again, disable all interrupts
    HAL_WRITE_UINT8(&port->base->uisr_uimr, 0);

    // If the baud rate is null, we don't configure the port
    if (new_config->baud == 0) return false;
    
    // Get the  divider  from  the  baudrate  table  which  will  use  to
    // configure the port's baud rate.
    ubgs = (cyg_uint16) dividers_table[new_config->baud];

    // Save the configuration value for later use
    port->config = *new_config;

    // We first write the reset values into the device and then configure
    // the device the way we want to use it.
    
    // Reset Transmitter
    HAL_WRITE_UINT8(&port->base->ucr, MCF5272_UART_UCR_RESET_TX);

    // Reset Receiver
    HAL_WRITE_UINT8(&port->base->ucr, MCF5272_UART_UCR_RESET_RX);

    // Reset Mode Register
    HAL_WRITE_UINT8(&port->base->ucr, MCF5272_UART_UCR_RESET_MR);

    // Translate the parity configuration to UART mode bits
    switch(port->config.parity)
    {
        default:
        case CYGNUM_SERIAL_PARITY_NONE:
            mode_reg = 0 | MCF5272_UART_UMR1_PM_NONE;
            break;
            
        case CYGNUM_SERIAL_PARITY_EVEN:
            mode_reg = 0 | MCF5272_UART_UMR1_PM_EVEN;
            break;
        
        case CYGNUM_SERIAL_PARITY_ODD:
            mode_reg = 0 | MCF5272_UART_UMR1_PM_ODD;
            break;
        
        case CYGNUM_SERIAL_PARITY_MARK:
            mode_reg = 0 | MCF5272_UART_UMR1_PM_FORCE_HI;
            break;
        
        case CYGNUM_SERIAL_PARITY_SPACE:
            mode_reg = 0 | MCF5272_UART_UMR1_PM_FORCE_LO;
            break;
    }

    // Translate the number of bits per character configuration to
    // UART mode bits
    switch(port->config.word_length)
    {
        case CYGNUM_SERIAL_WORD_LENGTH_5:
            mode_reg |= MCF5272_UART_UMR1_BC_5;
            break;
            
        case CYGNUM_SERIAL_WORD_LENGTH_6:
            mode_reg |= MCF5272_UART_UMR1_BC_6;
            break;
            
        case CYGNUM_SERIAL_WORD_LENGTH_7:
            mode_reg |= MCF5272_UART_UMR1_BC_7;
            break;
            
        default:
        case CYGNUM_SERIAL_WORD_LENGTH_8:
            mode_reg |= MCF5272_UART_UMR1_BC_8;
            break;
    }

    // Enable HW flow control for receiver
    if(port->config.flags & CYGNUM_SERIAL_FLOW_RTSCTS_RX)
        mode_reg |= MCF5272_UART_UMR1_RXRTS;
    
    // Configure the parity, HW flow control and the bits per character.
    // After this write MR pointer points to mode register 2.
    HAL_WRITE_UINT8(&port->base->umr, mode_reg);

    // Translate the stop bit length to UART mode bits
    switch(port->config.stop)
    {
        default:
        case CYGNUM_SERIAL_STOP_1:
            mode_reg = MCF5272_UART_UMR2_STOP_BITS_1;
            break;
            
        case CYGNUM_SERIAL_STOP_1_5:
            mode_reg = MCF5272_UART_UMR2_STOP_BITS_15;
            break;
            
        case CYGNUM_SERIAL_STOP_2:
            mode_reg = MCF5272_UART_UMR2_STOP_BITS_2;
            break;
    }
    
    // Enable HW flow control for transmitter
    if(port->config.flags & CYGNUM_SERIAL_FLOW_RTSCTS_TX)
        mode_reg |= MCF5272_UART_UMR2_TXCTS;

    // No echo or loopback
    mode_reg |= MCF5272_UART_UMR2_CM_NORMAL;
    
    // Write to mode register 2
    HAL_WRITE_UINT8(&port->base->umr, mode_reg);

    // Set Rx and Tx baud by timer
    HAL_WRITE_UINT8(&port->base->usr_ucsr, 0 | MCF5272_UART_UCSR_RCS(0xD) |
                       MCF5272_UART_UCSR_TCS(0xD));

    // Mask all UART interrupts
    HAL_WRITE_UINT8(&port->base->uisr_uimr, 0);

    // Program the baud settings to the device
    HAL_WRITE_UINT8(&port->base->udu, (cyg_uint8)((ubgs & 0xFF00) >> 8));
    HAL_WRITE_UINT8(&port->base->udl, (cyg_uint8)(ubgs & 0x00FF));

    // Enable receiver and transmitter
    HAL_WRITE_UINT8(&port->base->ucr, 0 | MCF5272_UART_UCR_TXRXEN);

    // Enable both transmit and receive interrupt
    port->imr_mirror = MCF5272_UART_UIMR_TXRDY | MCF5272_UART_UIMR_FFULL_RXRDY;
    
    // Enable break interrupt only if autobaud is enabled
    if (port->autobaud_state != AB_DISABLED)
        port->imr_mirror |= MCF5272_UART_UIMR_DB;
        
    HAL_WRITE_UINT8(&port->base->uisr_uimr, port->imr_mirror);

    // Return true to indicate a successful configuration
    return true;
}


// ***************************************************************************
// MCF5272_uart_lookup() - This routine is called when the device is "looked"
//                         up (i.e. attached)
//
// INPUT:
//    tab - pointer to a pointer of the device table.
//    sub_tab - Pointer to the sub device table.
//    name - name of the device.
//
// RETURN:
//    Always return ENOERR.

static Cyg_ErrNo MCF5272_uart_lookup(struct cyg_devtab_entry **tab,
                                     struct cyg_devtab_entry *sub_tab,
                                     const char *name)
{
    serial_channel *chan = (serial_channel *)(*tab)->priv;

    // Really only required for interrupt driven devices
    (chan->callbacks->serial_init)(chan);
    return ENOERR;
}


// ***************************************************************************
// MCF5272_uart_putc() - Send a character to the device output buffer.
//
// INPUT:
//    chan - pointer to the serial private data.
//    c    - the character to output.
//
// RETURN:
//    'true' if character is sent to device, return 'false' when we've
//    ran out of buffer space in the device itself.

static bool MCF5272_uart_putc(serial_channel *chan, unsigned char c)
{
    MCF5272_uart_info_t *port = (MCF5272_uart_info_t *) chan->dev_priv;
    cyg_uint8 usr_ucsr;

    // Make sure the transmitter is not full. If it is full, return false.
    HAL_READ_UINT8(&port->base->usr_ucsr, usr_ucsr);
    if (!(usr_ucsr & MCF5272_UART_USR_TXRDY))
        return false;

    // Send the character
    HAL_WRITE_UINT8(&port->base->urb_utb, c);

    return true ;
}


// ***************************************************************************
// MCF5272_uart_getc() - Fetch a character from the device input buffer and
//                       return it to the calling routine. Wait until there
//                       is a character ready.
//
// INPUT:
//    chan - pointer to the serial private data.
//
// RETURN:
//    the character read from the UART.

static unsigned char MCF5272_uart_getc(serial_channel *chan)
{
    MCF5272_uart_info_t *port = (MCF5272_uart_info_t *) chan->dev_priv;
    cyg_uint8 usr_ucsr, urb_utb;

    // Wait until character has been received
    do
    {
        HAL_READ_UINT8(&port->base->usr_ucsr, usr_ucsr);
    }
    while (!(usr_ucsr & MCF5272_UART_USR_RXRDY)) ;

    // Read the character from the FIFO queue
    HAL_READ_UINT8(&port->base->urb_utb, urb_utb);

    return urb_utb;
}


// ***************************************************************************
// MCF5272_uart_set_config() - Set up the device characteristics; baud rate,
//                             etc.
//
// INPUT:
//    chan - pointer to the serial private data.
//    key  - configuration key (command).
//    xbuf - pointer to the configuration buffer.
//    len  - the length of the configuration buffer.
//
// RETURN:
//    NOERR - If the configuration is successful.
//    EINVAL -  If the argument is invalid.

Cyg_ErrNo MCF5272_uart_set_config(serial_channel *chan,
                                  cyg_uint32 key,
                                  const void *xbuf,
                                  cyg_uint32 *len)
{
    cyg_serial_info_t *config = (cyg_serial_info_t *) xbuf;
    MCF5272_uart_info_t *port = (MCF5272_uart_info_t *) chan->dev_priv;

    switch (key)
    {
        case CYG_IO_SET_CONFIG_SERIAL_INFO:
        {
            // Set serial configuration
            if (*len < sizeof(cyg_serial_info_t))
                return EINVAL;
          
            *len = sizeof(cyg_serial_info_t);

            if (!MCF5272_uart_config_port(chan, config))
                return EINVAL;
        }
        break;

        case CYG_IO_GET_CONFIG_SERIAL_INFO:
            // Retrieve UART configuration
            *config = port->config;
            break;
            
#ifdef CYGOPT_IO_SERIAL_FLOW_CONTROL_HW
        case CYG_IO_SET_CONFIG_SERIAL_HW_RX_FLOW_THROTTLE:
        {
            cyg_uint32 *f = (cyg_uint32 *)xbuf;

            if (*len < sizeof(*f))
                return -EINVAL;
          
            // we should throttle
            if (*f) HAL_WRITE_UINT8(&port->base->uop0, MCF5272_UART_UOP0_RTS);
            // we should no longer throttle
            else HAL_WRITE_UINT8(&port->base->uop1, MCF5272_UART_UOP1_RTS);
        }
        break;

        case CYG_IO_SET_CONFIG_SERIAL_HW_FLOW_CONFIG:
        // We only support RTSCTS (and software) flow control.
        // We clear any unsupported flags here and
        // then return -ENOSUPP - the higher layer can then query
        // what flags are set and decide what to do.
        {
            unsigned int flags_mask;
            cyg_uint8 umr1_mask, umr2_mask;

            // These are the control flow modes we support
            flags_mask = (CYGNUM_SERIAL_FLOW_RTSCTS_RX | 
                          CYGNUM_SERIAL_FLOW_RTSCTS_RX);
#ifdef CYGOPT_IO_SERIAL_FLOW_CONTROL_SOFTWARE
            flags_mask |= (CYGNUM_SERIAL_FLOW_XONXOFF_RX | 
                           CYGNUM_SERIAL_FLOW_XONXOFF_TX);
#endif          
            if (chan->config.flags & ~flags_mask)
            {
                chan->config.flags &= flags_mask;
                return -ENOSUPP;
            }
          
            // For security, mask UART interrupt while we change configuration
            cyg_drv_interrupt_mask(port->uart_vector);

            // Reset mode register pointer
            HAL_WRITE_UINT8(&port->base->ucr, MCF5272_UART_UCR_RESET_MR);
          
            // Read mode register 1
            HAL_READ_UINT8(&port->base->umr, umr1_mask);

            // Read mode register 2
            HAL_READ_UINT8(&port->base->umr, umr2_mask);