spi.c

三星2443芯片

	SPI1_Master_nSS_Con(0);

	pISR_SPI1=(unsigned)Spi1_Rx_fifo_Int;
	rINTMSK&=~(BIT_SPI1);

	rSPPIN1 = (rSPPIN1&~(1<<3))|(1<<3)|(1<<0);//Feedback Clock Disable, Master Out Keep
	rSPFIC1 = (rSPFIC1&~0xfff)|(1<<7)|(1<<5)|(0<<3);	// Rx FIFO Time-Out, Rx FIFO Almost Full Interrupt Enable
	rSPTOV = 0xfffff;	// Rx FIFO Time-out Count
	rSPCON1 = (rSPCON1&~0xffff)|(1<<16)|(0<<14)|(1<<9)|(0<<5)|(1<<4)|(1<<3)|(0<<0);//Poll,en-SCK,master
	rSPCON1|=(1<<7); // Rx dir (Clock Out Start)

	while(endSpi1Rx==0){
    		if(Uart_GetKey())
			break;
	}

//	while(((rSPSTA1>>4)&0x1)==0);	// wait for fifo empty state
	for(i=0;i<7000;i++);
	SPI1_Master_nSS_Con(1);

	rx_ptr=(unsigned char *)(SPI_BUFFER1);
	printf("Data trans_count %d\n",trans_count);	
	printf("Data compare !!\n");
	ErrCnt=0;
	for(i=0,j=0;i<76800;i++,j+=4) {
		read_data = (U32)(*(rx_ptr+j+3)<<24|*(rx_ptr+j+2)<<16|*(rx_ptr+j+1)<<8|*(rx_ptr+j));
		if(pspi_dma[i]!=read_data)  {
			printf("%d Ori [%08x]\t",i,pspi_dma[i]);
			printf("Cpy [%08x]\t",read_data);
			ErrCnt++;
			printf("E");
			getchar();
			}
		}

	printf("Error Count : %d\n",ErrCnt);

	rSPCON0 = 0x0008;
	rSPFIC1 = 0x0;
	rSPPIN1 = 0x02;
//	rSPCON0=(0<<5)|(0<<4)|(1<<3)|(1<<2)|(0<<1)|(0<<0);//Poll,dis-SCK,master,low,A,normal
	SPI_Port_Recovery();
}

void Test_Spi1_S_Tx_Fifo_Int(void)
{
	int i;

	SPI_Port_Init();

	rSPCON1=(1<<11)|(1<<10);		// FIFO Clear
	while((rSPCON1>>10)&0x3 > 0);	// Wait for FIFO clear

	endSpi1Tx=0;
#if 1
	spi1TxStr = (volatile char *)pspi_dma;
	trans_count = 307200-3;
#else
	spi1TxStr = "1234567890!@#$%^&*()";
	trans_count = 20-3;
#endif
	
	SPI_Baud_Rate_Set(1000000);
	SPI_Transfer_Format();

	rSPPIN1 = (rSPPIN1&~(1<<3))|(1<<0);//Feedback Clock Disable, Master Out Keep
	rSPFIC1 = (rSPFIC1&~0xfff)|(1<<4)|(1<<2);
	rSPCON1 = (rSPCON1&~0xffff)|(0<<12)|(1<<8)|(0<<7)|(0<<5)|(0<<4)|(0<<3)|(0<<0);//DMA,dis-SCK,slave

	pISR_SPI1=(unsigned)Spi1_Tx_fifo_Int;
	rINTMSK&=~(BIT_SPI1);

	rSPTXFIFO1 = *spi1TxStr++;
	rSPTXFIFO1 = *spi1TxStr++;
	rSPTXFIFO1 = *spi1TxStr++;

	while(endSpi1Tx==0){
    		if(Uart_GetKey())
			break;
	}

	while(((rSPSTA1>>4)&0x1)==0);	// wait for fifo empty state
	for(i=0;i<7000;i++);

	rSPCON0 = 0x0008;
	rSPFIC1 = 0x0;
	rSPPIN1 = 0x02;
//	rSPCON0=(0<<5)|(0<<4)|(1<<3)|(1<<2)|(0<<1)|(0<<0);//Poll,dis-SCK,master,low,A,normal
	SPI_Port_Recovery();
}

void Test_Spi1_S_Tx_Fifo_Int2(void)
{
	int i;

	SPI_Port_Init();

	rSPCON1=(1<<11)|(1<<10);		// FIFO Clear
	while((rSPCON1>>10)&0x3 > 0);	// Wait for FIFO clear

	endSpi1Tx=0;
#if 1
	spi1TxStr = (volatile char *)pspi_dma;
	trans_count = 307200;
#else
	spi1TxStr = "1234567890!@#$%^&*()";
	trans_count = 20-3;
#endif
	
	SPI_Baud_Rate_Set(1000000);
	SPI_Transfer_Format();

	rSPPIN1 = (rSPPIN1&~(1<<3))|(1<<0);//Feedback Clock Disable, Master Out Keep
	rSPFIC1 = (rSPFIC1&~0xfff)|(1<<4)|(1<<2);
	rSPCON1 = (rSPCON1&~0xffff)|(0<<12)|(1<<8)|(0<<7)|(0<<5)|(0<<4)|(0<<3)|(0<<0);//DMA,dis-SCK,slave

	pISR_SPI1=(unsigned)Spi1_Tx_fifo_Int;
	rINTMSK&=~(BIT_SPI1);

	while(endSpi1Tx==0){
    		if(Uart_GetKey())
			break;
	}

	while(((rSPSTA1>>4)&0x1)==0);	// wait for fifo empty state
	for(i=0;i<7000;i++);

	rSPCON0 = 0x0008;
	rSPFIC1 = 0x0;
	rSPPIN1 = 0x02;
//	rSPCON0=(0<<5)|(0<<4)|(1<<3)|(1<<2)|(0<<1)|(0<<0);//Poll,dis-SCK,master,low,A,normal
	SPI_Port_Recovery();
}

void Test_Spi1_M_Tx_Fifo_DMA(void)
{
	int i;
	printf("[This Board is SPI1(Master Tx), Another Board are SPI1(Slave Rx) Fifo DMA. test]\n");
	printf("Slave is ready? Then press any key, Start\n");
	getchar();

	SPI_Port_Init();

	rSPCON1=(1<<11)|(1<<10);		// FIFO Clear
	while((rSPCON1>>10)&0x3 > 0);	// Wait for FIFO clear

	SPI_Baud_Rate_Set(1000000);
	SPI_Transfer_Format();

	SPI1_Master_nSS_Con(0);
	Set_Spi1_Tx_Fifo_DMA(0);

	rSPPIN1 = (rSPPIN1&~(1<<3))|(1<<3)|(1<<0);//Feedback Clock Disable, Master Out Keep
	rSPFIC1 = (rSPFIC1&~0xfff)|(2<<8);
	rSPCON1 = (rSPCON1&~0xffff)|(1<<8)|(0<<7)|(0<<5)|(1<<4)|(1<<3)|(0<<0);//DMA,en-SCK,master

	while(tx_dmaDone){
			if(Uart_GetKey())
			break;
	}

	while(((rSPSTA1>>4)&0x1)==0);	// wait for fifo empty state
	for(i=0;i<7000;i++);
	SPI1_Master_nSS_Con(1);

	rSPCON0 = 0x0008;
	rSPFIC1 = 0x0;
	rSPPIN1 = 0x02;
//	rSPCON0=(0<<5)|(0<<4)|(1<<3)|(1<<2)|(0<<1)|(0<<0);//Poll,dis-SCK,master,low,A,normal
	SPI_Port_Recovery();

}

void Set_Spi1_Tx_Fifo_DMA(U32 ch)
{	
	unsigned char *tx_ptr;
	DMA *pDMA;

	tx_ptr = (unsigned char *)pspi_dma;

	tx_dmaDone=1;

	pISR_DMA = (unsigned)DmaTx_Int;		// DMA ISR Address Mapping
	switch(ch) {
		case 0 :
			pDMA=(void *)0x4b000000;
			rINTSUBMSK&=~(BIT_SUB_DMA0);		// Interrupt SUB Mask Disable, Interrupt Enable
			break;
		case 1 :
			pDMA=(void *)0x4b000100;
			rINTSUBMSK&=~(BIT_SUB_DMA1);		// Interrupt SUB Mask Disable, Interrupt Enable
			break;
		case 2 :
			pDMA=(void *)0x4b000200;
			rINTSUBMSK&=~(BIT_SUB_DMA2);		// Interrupt SUB Mask Disable, Interrupt Enable
			break;
		case 3 :
			pDMA=(void *)0x4b000300;
			rINTSUBMSK&=~(BIT_SUB_DMA3);		// Interrupt SUB Mask Disable, Interrupt Enable
			break;
		case 4 :
			pDMA=(void *)0x4b000400;
			rINTSUBMSK&=~(BIT_SUB_DMA4);		// Interrupt SUB Mask Disable, Interrupt Enable
			break;
		case 5 :
			pDMA=(void *)0x4b000500;
			rINTSUBMSK&=~(BIT_SUB_DMA5);		// Interrupt SUB Mask Disable, Interrupt Enable
			break;
		default :
			pDMA=(void *)0x4b000500;
			rINTSUBMSK&=~(BIT_SUB_DMA5);		// Interrupt SUB Mask Disable, Interrupt Enable
		}
	rINTMSK&=~(BIT_DMA);				// Interrupt Mask Disable, Interrupt Enable

	pDMA->DISRC=(unsigned)tx_ptr;
	pDMA->DISRCC=(0<<1)|(0<<0);					//AHB(Memory), inc
	pDMA->DIDST=(unsigned)0x59000018;
	pDMA->DIDSTC=(1<<1)|(1);						//APB(SPI), fix
	pDMA->DCON=(1<<31)|(0<<30)|(1<<29)|(1<<28)|(0<<27)|(1<<22)|(0<<20)|(0x12c00);
			   //HS|APB|InterruptEn|TransferSize|WholeServ|RelaodOff|DataSize|TransferCount
	pDMA->DMAREQSEL=(2<<1)|(1<<0);				// HWSRC SPI1 TX
	pDMA->DMASKTRIG=(0<<2)|(1<<1)|(0);    			//run, DMA channel on, no-sw trigger 
}

void Test_Spi1_S_Rx_Fifo_DMA(void)
{
	unsigned int i,j;
	unsigned char *rx_ptr;
	unsigned int read_data,dummy_data;
	unsigned int ErrCnt;

	SPI_Port_Init();

	rSPCON1=(1<<11)|(1<<10);		// FIFO Clear
	while((rSPCON1>>10)&0x3 > 0);	// Wait for FIFO clear

	SPI_Baud_Rate_Set(1000000);
	SPI_Transfer_Format();

	Set_Spi1_Rx_Fifo_DMA(0);

	rSPPIN1 = (rSPPIN1&~(1<<3))|(1<<1)|(1<<0);//Feedback Clock Disable, Master Out Keep
	rSPFIC1 = (rSPFIC1&~0xfff)|(2<<10);
	rSPCON1 = (rSPCON1&~0xffff)|(1<<14)|(1<<9)|(1<<7)|(0<<5)|(0<<4)|(0<<3)|(0<<0);//DMA,dis-SCK,Slave

	while(rx_dmaDone){
		if(Uart_GetKey())
		break;
	}

	rx_ptr=(unsigned char *)(SPI_BUFFER1);
	printf("Data compare !!\n");
	ErrCnt=0;
	for(i=0,j=0;i<76800;i++,j+=4) {
		read_data = (U32)(*(rx_ptr+j+3)<<24|*(rx_ptr+j+2)<<16|*(rx_ptr+j+1)<<8|*(rx_ptr+j));
		if(pspi_dma[i]!=read_data)  {
			printf("%d Ori [%08x]\t",i,pspi_dma[i]);
			printf("Cpy [%08x]\t",read_data);
			ErrCnt++;
			printf("E");
			getchar();
			}
		}

	printf("Error Count : %d\n",ErrCnt);

	rSPCON0 = 0x0008;
	rSPFIC1 = 0x0;
	rSPPIN1 = 0x02;

	SPI_Port_Recovery();
}

void Set_Spi1_Rx_Fifo_DMA(U32 ch)
{
	int i;
	U32 *ptr_erase;
	DMA *pDMA;

	ptr_erase = (unsigned int *)(SPI_BUFFER1);
	for(i=0;i<76800;i++) {
		*ptr_erase++ = 0;
		}
	
	rx_dmaDone=1;

	pISR_DMA = (unsigned)DmaRx_Int;		// DMA ISR Address Mapping
	switch(ch) {
		case 0 :
			pDMA=(void *)0x4b000000;
			rINTSUBMSK&=~(BIT_SUB_DMA0);		// Interrupt SUB Mask Disable, Interrupt Enable
			break;
		case 1 :
			pDMA=(void *)0x4b000100;
			rINTSUBMSK&=~(BIT_SUB_DMA1);		// Interrupt SUB Mask Disable, Interrupt Enable
			break;
		case 2 :
			pDMA=(void *)0x4b000200;
			rINTSUBMSK&=~(BIT_SUB_DMA2);		// Interrupt SUB Mask Disable, Interrupt Enable
			break;
		case 3 :
			pDMA=(void *)0x4b000300;
			rINTSUBMSK&=~(BIT_SUB_DMA3);		// Interrupt SUB Mask Disable, Interrupt Enable
			break;
		case 4 :
			pDMA=(void *)0x4b000400;
			rINTSUBMSK&=~(BIT_SUB_DMA4);		// Interrupt SUB Mask Disable, Interrupt Enable
			break;
		case 5 :
			pDMA=(void *)0x4b000500;
			rINTSUBMSK&=~(BIT_SUB_DMA5);		// Interrupt SUB Mask Disable, Interrupt Enable
			break;
		default :
			pDMA=(void *)0x4b000500;
			rINTSUBMSK&=~(BIT_SUB_DMA5);		// Interrupt SUB Mask Disable, Interrupt Enable
		}
	rINTMSK&=~(BIT_DMA);				// Interrupt Mask Disable, Interrupt Enable

	pDMA->DISRC=(unsigned)(0x5900001c);
	pDMA->DISRCC=(1<<1)|(1<<0);					//AHB(Memory), inc
	pDMA->DIDST=(unsigned)(SPI_BUFFER1);
	pDMA->DIDSTC=(0<<1)|(0);						//APB(SPI), fix
	pDMA->DCON=(1<<31)|(0<<30)|(1<<29)|(1<<28)|(0<<27)|(1<<24)|(1<<22)|(0<<20)|(0x12c00);
			   //HS|APB|InterruptEn|TransferSize|WholeServ|RelaodOff|DataSize|TransferCount
	pDMA->DMAREQSEL=(3<<1)|(1<<0);				// HWSRC SPI1 RX
	pDMA->DMASKTRIG=(0<<2)|(1<<1)|(0);    			//run, DMA channel on, no-sw trigger 

}

void Test_Spi1_M_Rx_Fifo_DMA(void)
{
	unsigned int i,j;
	unsigned char *rx_ptr;
	unsigned int read_data,dummy_data;
	unsigned int ErrCnt;

	printf("[This Board is SPI1(Master Rx), Another Board are SPI1(Slave Tx) Fifo DMA. test]\n");
	printf("Slave is ready? Then press any key, Start\n");
	getchar();

	SPI_Port_Init();

	rSPCON1=(1<<11)|(1<<10);		// FIFO Clear
	while((rSPCON1>>10)&0x3 > 0);	// Wait for FIFO clear

	SPI_Baud_Rate_Set(1000000);
	SPI_Transfer_Format();

	rSPPIN1 = (rSPPIN1&~(1<<3))|(3<<1)|(1<<0);//Feedback Clock Disable, Master Out Keep
	rSPFIC1 = (rSPFIC1&~0xfff)|(2<<10);
	rSPCON1 = (rSPCON1&~0xffff)|(1<<14)|(1<<9)|(0<<5)|(1<<4)|(1<<3)|(0<<0);//DMA,en-SCK,Master
	SPI1_Master_nSS_Con(0);
	Set_Spi1_Rx_Fifo_DMA(0);
	rSPCON1|=(1<<7); // Rx dir (Clock Out Start)

	while(rx_dmaDone){
		if(Uart_GetKey())
		break;
	}

//	for(i=0;i<7000;i++);
	SPI1_Master_nSS_Con(1);

	rx_ptr=(unsigned char *)(SPI_BUFFER1);
	printf("Data compare !!\n");
	ErrCnt=0;
	for(i=0,j=0;i<76800;i++,j+=4) {
		read_data = (U32)(*(rx_ptr+j+3)<<24|*(rx_ptr+j+2)<<16|*(rx_ptr+j+1)<<8|*(rx_ptr+j));
		if(pspi_dma[i]!=read_data)  {
			printf("%d Ori [%08x]\t",i,pspi_dma[i]);
			printf("Cpy [%08x]\t",read_data);
			ErrCnt++;
			printf("E");
			getchar();
			}
		}

	printf("Error Count : %d\n",ErrCnt);

	rSPCON0 = 0x0008;
	rSPFIC1 = 0x0;
	rSPPIN1 = 0x02;

	SPI_Port_Recovery();
}

void Test_Spi1_S_Tx_Fifo_DMA(void)
{
	int i;

	SPI_Port_Init();

	rSPCON1=(1<<11)|(1<<10);		// FIFO Clear
	while((rSPCON1>>10)&0x3 > 0);	// Wait for FIFO clear

	SPI_Baud_Rate_Set(1000000);
	SPI_Transfer_Format();

	Set_Spi1_Tx_Fifo_DMA(0);

	rSPPIN1 = (rSPPIN1&~(1<<3))|(1<<0);//Feedback Clock Disable, Master Out Keep
	rSPFIC1 = (rSPFIC1&~0xfff)|(2<<8);
	rSPCON1 = (rSPCON1&~0xffff)|(1<<8)|(0<<7)|(0<<5)|(0<<4)|(0<<3)|(0<<0);//DMA,dis-SCK,slave

	while(tx_dmaDone){
		if(Uart_GetKey())
		break;
	}

	while(((rSPSTA1>>4)&0x1)==0);	// wait for fifo empty state
	for(i=0;i<7000;i++);

	rSPCON0 = 0x0008;
	rSPFIC1 = 0x0;
	rSPPIN1 = 0x02;

	SPI_Port_Recovery();
}

void SPI_Port_Init(void)
{
	rGPECON_saved = rGPECON;
	rGPEUDP_saved = rGPEUDP;
	rGPLCON_saved = rGPLCON;
	rGPLUDP_saved = rGPLUDP;

	rGPEUDP = 0xaaaaaaaa; // Disable pull-up/down function
	rGPLUDP = 0xaaaaaaaa; // Disable pull-up/down function

	rGPECON = (rGPECON&~(0x3f<<22))|(0x2a<<22);		// GPE13,12,11 <= SPICLK0,SPIMOSI0,SPIMISO0
	rGPLCON = (rGPLCON&~(0x3ff<<20))|(0x2aa<<20);	// GPL14,13,12,11,10 <= SS1,SS0,SPIMISO1,SPIMOSI1,SPICLK1
	printf("SPI Port Init\n");
}

void SPI_Port_Recovery(void)
{
	rGPECON = rGPECON_saved;
	rGPEUDP = rGPEUDP_saved;
	rGPLCON = rGPLCON_saved;
	rGPLUDP = rGPLUDP_saved;
	printf("SPI Port Recovery\n");
}

void SPI1_Master_nSS_Con(U32 CSout)
{
#if 0
	if(CSout==0) {
		printf("CS1 Active(Low)\n");
		}
	else {
		printf("CS1 Inactive(High)\n");
		}
#endif
	rSPPIN1=(rSPPIN1&~(1<<1))|(CSout<<1);
}

void SPI_Baud_Rate_Set(float BaudRate)
{
	U32 PrescalerVal;

	SystemCLK(0);

	if(BaudRate>(PCLK/2)) {
		printf("SPI Baud Rate is too big (<%.1f MHz)\n",(float)(PCLK)/2/1000000);
		while(1);
		}
	
	PrescalerVal = (U32)(PCLK/2/BaudRate-1);

	rSPPRE1 = PrescalerVal;
	printf("BaudRate [%.3f MHz]\trSPPRE1 [0x%08x]\n",((float)PCLK/2/(PrescalerVal+1))/1000000,rSPPRE1);

	printf("PCLK = %d\n",PCLK);
	printf("PrescalerVal = %d\n",PrescalerVal);

}

void SPI_Transfer_Format(void)
{
#if 0
	printf("SPI : Select Transfer Type\n[0] Low,A\t[1] Low,B\t[2] High,A\t[3] High,B\n");
	switch(GetIntNum()) {
		case 0 :
			rSPCON1 = (rSPCON1 &~(3<<1))|(0<<2)|(0<<1);
			printf("SPI CPOL=0, CPHA=0\n");
			break;
		case 1 :
			rSPCON1 = (rSPCON1 &~(3<<1))|(0<<2)|(1<<1);
			printf("SPI CPOL=0, CPHA=1\n");
			break;
		case 2 :
			rSPCON1 = (rSPCON1 &~(3<<1))|(1<<2)|(0<<1);
			printf("SPI CPOL=1, CPHA=0\n");
			break;
		case 3 :
			rSPCON1 = (rSPCON1 &~(3<<1))|(1<<2)|(1<<1);
			printf("SPI CPOL=1, CPHA=1\n");
			break;
		default :
			rSPCON1 = (rSPCON1 &~(3<<1))|(0<<2)|(0<<1);
			printf("SPI CPOL=0, CPHA=0\n");
		}
#else
	rSPCON1 = (rSPCON1 &~(3<<1))|(0<<2)|(0<<1);
	printf("SPI CPOL=0, CPHA=0\n");
#endif
}