spi.c

三星2443芯片

		break;
	}
	for(i=0;i<400;i++);

	SPI1_Master_nSS_Con(1);

	rSPCON1=(0<<5)|(0<<4)|(1<<3)|(1<<2)|(0<<1)|(0<<0);//Poll,dis-SCK,master,low,A,normal

	SPI_Port_Recovery();
}

void Set_Spi1_Tx_DMA_Set(U32 ch)
{
	int i;
	unsigned char *tx_ptr;
	DMA *pDMA;

	tx_ptr=(unsigned char *)(SPI_BUFFER1+0x1000000);
	for(i=0;i<76800;i++) {
		*tx_ptr++=(unsigned char)(pspi_dma[i]);
		*tx_ptr++=(unsigned char)(pspi_dma[i]>>8);
		*tx_ptr++=(unsigned char)(pspi_dma[i]>>16);
		*tx_ptr++=(unsigned char)(pspi_dma[i]>>24);
		}
	
	tx_dmaDone=1;

	pISR_DMA = (unsigned)DmaTx_Int;		// DMA ISR Address Mapping
	switch(ch) {
		case 0 :
			pDMA=(void *)0x4b000000;
			rINTSUBMSK&=~(BIT_SUB_DMA0);		// Interrupt SUB Mask Disable, Interrupt Enable
			break;
		case 1 :
			pDMA=(void *)0x4b000100;
			rINTSUBMSK&=~(BIT_SUB_DMA1);		// Interrupt SUB Mask Disable, Interrupt Enable
			break;
		case 2 :
			pDMA=(void *)0x4b000200;
			rINTSUBMSK&=~(BIT_SUB_DMA2);		// Interrupt SUB Mask Disable, Interrupt Enable
			break;
		case 3 :
			pDMA=(void *)0x4b000300;
			rINTSUBMSK&=~(BIT_SUB_DMA3);		// Interrupt SUB Mask Disable, Interrupt Enable
			break;
		case 4 :
			pDMA=(void *)0x4b000400;
			rINTSUBMSK&=~(BIT_SUB_DMA4);		// Interrupt SUB Mask Disable, Interrupt Enable
			break;
		case 5 :
			pDMA=(void *)0x4b000500;
			rINTSUBMSK&=~(BIT_SUB_DMA5);		// Interrupt SUB Mask Disable, Interrupt Enable
			break;
		default :
			pDMA=(void *)0x4b000500;
			rINTSUBMSK&=~(BIT_SUB_DMA5);		// Interrupt SUB Mask Disable, Interrupt Enable
		}
	rINTMSK&=~(BIT_DMA);				// Interrupt Mask Disable, Interrupt Enable

	pDMA->DISRC=(unsigned)(SPI_BUFFER1+0x1000000);
	pDMA->DISRCC=(0<<1)|(0<<0);					//AHB(Memory), inc
	pDMA->DIDST=(unsigned)0x59000010;
	pDMA->DIDSTC=(1<<1)|(1);						//APB(SPI), fix
	pDMA->DCON=(1<<31)|(0<<30)|(1<<29)|(0<<28)|(0<<27)|(1<<22)|(0<<20)|(0x4b001);
			   //HS|APB|InterruptEn|TransferSize|WholeServ|RelaodOff|DataSize|TransferCount
	pDMA->DMAREQSEL=(2<<1)|(1<<0);				// HWSRC SPI1 TX
	pDMA->DMASKTRIG=(0<<2)|(1<<1)|(0);    			//run, DMA channel on, no-sw trigger 

}

void __irq DmaTx_Int(void)
{
	rINTSUBMSK|=(BIT_SUB_DMA0|BIT_SUB_DMA1|BIT_SUB_DMA2|BIT_SUB_DMA3|BIT_SUB_DMA4|BIT_SUB_DMA5);
	rINTMSK|=(BIT_DMA);

	rSUBSRCPND |= (BIT_SUB_DMA0|BIT_SUB_DMA1|BIT_SUB_DMA2|BIT_SUB_DMA3|BIT_SUB_DMA4|BIT_SUB_DMA5);
	ClearPending(BIT_DMA);
	
	tx_dmaDone=0;
}

void Test_Spi1_S_Rx_Buf_DMA(void)
{
	unsigned int i,j;
	unsigned char *rx_ptr;
	unsigned int read_data,dummy_data;
	unsigned int ErrCnt;

	printf("[One Board SPI1(Master Tx), Another Board SPI1(Slave Rx) DMA test]\n");

	SPI_Port_Init();

	SPI_Baud_Rate_Set(1000000);
	SPI_Transfer_Format();

	rSPCON1 = (rSPCON1&0x7)|(1<<7)|(3<<5)|(0<<4)|(0<<3)|(0<<0);//DMA,en-SCK,master
	rSPPIN1 |= (1<<0);//Feedback Clock Disable, Master Out Keep

	Set_Spi1_Rx_DMA_Set(0);	// Spi1 Slave DMA channel 1 Set

	while(rx_dmaDone) {
		if(Uart_GetKey())
		break;
	}

	for(i=0;i<1000;i++);
	rSPCON0=(0<<5)|(0<<4)|(0<<3)|(1<<2)|(0<<1)|(0<<0);//Poll,dis-SCK,slave,low,A,normal

	rx_ptr=(unsigned char *)(SPI_BUFFER1);
	rx_ptr += 2;	// dummy removed

	printf("Data compare !!\n");
	ErrCnt=0;
	for(i=0,j=0;i<76800;i++,j+=4) {
		read_data = (U32)(*(rx_ptr+j+3)<<24|*(rx_ptr+j+2)<<16|*(rx_ptr+j+1)<<8|*(rx_ptr+j));
		if(pspi_dma[i]!=read_data)  {
			printf("%d Ori [%08x]\t",i,pspi_dma[i]);
			printf("Cpy [%08x]\t",read_data);
			ErrCnt++;
			printf("E");
			getchar();
			}
		}

	printf("Error Count : %d\n",ErrCnt);
	SPI_Port_Recovery();
}

void Set_Spi1_Rx_DMA_Set(U32 ch)
{
	int i;
	U32 *ptr_erase;
	DMA *pDMA;

	ptr_erase = (unsigned int *)(SPI_BUFFER1);
	for(i=0;i<76800;i++) {
		*ptr_erase++ = 0;
		}
	
	rx_dmaDone=1;

	pISR_DMA = (unsigned)DmaRx_Int;		// DMA ISR Address Mapping
	switch(ch) {
		case 0 :
			pDMA=(void *)0x4b000000;
			rINTSUBMSK&=~(BIT_SUB_DMA0);		// Interrupt SUB Mask Disable, Interrupt Enable
			break;
		case 1 :
			pDMA=(void *)0x4b000100;
			rINTSUBMSK&=~(BIT_SUB_DMA1);		// Interrupt SUB Mask Disable, Interrupt Enable
			break;
		case 2 :
			pDMA=(void *)0x4b000200;
			rINTSUBMSK&=~(BIT_SUB_DMA2);		// Interrupt SUB Mask Disable, Interrupt Enable
			break;
		case 3 :
			pDMA=(void *)0x4b000300;
			rINTSUBMSK&=~(BIT_SUB_DMA3);		// Interrupt SUB Mask Disable, Interrupt Enable
			break;
		case 4 :
			pDMA=(void *)0x4b000400;
			rINTSUBMSK&=~(BIT_SUB_DMA4);		// Interrupt SUB Mask Disable, Interrupt Enable
			break;
		case 5 :
			pDMA=(void *)0x4b000500;
			rINTSUBMSK&=~(BIT_SUB_DMA5);		// Interrupt SUB Mask Disable, Interrupt Enable
			break;
		default :
			pDMA=(void *)0x4b000500;
			rINTSUBMSK&=~(BIT_SUB_DMA5);		// Interrupt SUB Mask Disable, Interrupt Enable
		}
	rINTMSK&=~(BIT_DMA);				// Interrupt Mask Disable, Interrupt Enable

	pDMA->DISRC=(unsigned)(0x59000020);
	pDMA->DISRCC=(1<<1)|(1<<0);					//AHB(Memory), inc
	pDMA->DIDST=(unsigned)(SPI_BUFFER1);
	pDMA->DIDSTC=(0<<1)|(0);						//APB(SPI), fix
	pDMA->DCON=(1<<31)|(0<<30)|(1<<29)|(0<<28)|(0<<27)|(1<<22)|(0<<20)|(0x4b002);
			   //HS|APB|InterruptEn|TransferSize|WholeServ|RelaodOff|DataSize|TransferCount
	pDMA->DMAREQSEL=(3<<1)|(1<<0);				// HWSRC SPI1 RX
	pDMA->DMASKTRIG=(0<<2)|(1<<1)|(0);    			//run, DMA channel on, no-sw trigger 

}

void __irq DmaRx_Int(void)
{
	rINTSUBMSK|=(BIT_SUB_DMA0|BIT_SUB_DMA1|BIT_SUB_DMA2|BIT_SUB_DMA3|BIT_SUB_DMA4|BIT_SUB_DMA5);
	rINTMSK|=(BIT_DMA);

	rSPCON1&=~(1<<7); // Rx dir (Clock Out Stop)

	rSUBSRCPND |= (BIT_SUB_DMA0|BIT_SUB_DMA1|BIT_SUB_DMA2|BIT_SUB_DMA3|BIT_SUB_DMA4|BIT_SUB_DMA5);
	ClearPending(BIT_DMA);
	
	rx_dmaDone=0;
}

void Test_Spi1_M_Rx_Buf_DMA(void)
{
	unsigned int i,j;
	unsigned char *rx_ptr;
	unsigned int read_data,dummy_data;
	unsigned int ErrCnt;

	printf("[This Board is SPI1(Master Rx), Another Board are SPI1(Slave Tx) DMA test]\n");
	printf("Slave is ready? Then press any key, Start\n");
	getchar();

	SPI_Port_Init();

	SPI_Baud_Rate_Set(1000000);
	SPI_Transfer_Format();
	rSPCON1 = (rSPCON1&0x7)|(1<<7)|(3<<5)|(1<<4)|(1<<3)|(0<<0);//DMA,en-SCK,master
	rSPPIN1 |= (1<<3)|(1<<0);//Feedback Clock Disable, Master Out Keep

	SPI1_Master_nSS_Con(0);
	Set_Spi1_Rx_DMA_Set(0);	// Spi1 Master DMA channel 0 Set

	while(rx_dmaDone) {
		if(Uart_GetKey())
		break;
	}
	for(i=0;i<1000;i++);

	SPI1_Master_nSS_Con(1);

	rSPCON1=(0<<5)|(0<<4)|(1<<3)|(1<<2)|(0<<1)|(0<<0);//Poll,dis-SCK,master,low,A,normal

	rx_ptr=(unsigned char *)(SPI_BUFFER1);
	rx_ptr += 2;	// dummy removed

	printf("Data compare !!\n");
	ErrCnt=0;
	for(i=0,j=0;i<76800;i++,j+=4) {
		read_data = (U32)(*(rx_ptr+j+3)<<24|*(rx_ptr+j+2)<<16|*(rx_ptr+j+1)<<8|*(rx_ptr+j));
		if(pspi_dma[i]!=read_data)  {
			printf("%d Ori [%08x]\t",i,pspi_dma[i]);
			printf("Cpy [%08x]\t",read_data);
			ErrCnt++;
			printf("E");
			getchar();
			}
		}

	printf("Error Count : %d\n",ErrCnt);
	SPI_Port_Recovery();
}

void Test_Spi1_S_Tx_Buf_DMA(void)
{
	int i;
	printf("[One Board SPI0(Master Rx), Another Board SPI0(Slave Tx) DMA test]\n");

	SPI_Port_Init();

	SPI_Baud_Rate_Set(1000000);
	SPI_Transfer_Format();
	rSPCON1 = (rSPCON1&0x7)|(2<<5)|(0<<4)|(0<<3)|(0<<0);//DMA,dis-SCK,slave
	rSPPIN1 = (rSPPIN1&~(1<<3))|(1<<0);//Feedback Clock Disable, Master Out Keep

	Set_Spi1_Tx_DMA_Set(0);	// Spi1 Master DMA channel 1 Set

	while(tx_dmaDone) {
		if(Uart_GetKey())
		break;
	}
	for(i=0;i<400;i++);

	rSPCON1=(0<<5)|(0<<4)|(1<<3)|(1<<2)|(0<<1)|(0<<0);//Poll,dis-SCK,master,low,A,normal

	SPI_Port_Recovery();
}

void Test_Spi1_M_Tx_Fifo_Int(void)
{
	int i;
	printf("[This Board is SPI1(Master Tx), Another Board are SPI1(Slave Rx) Fifo Int. test]\n");
	printf("Slave is ready? Then press any key, Start\n");
	getchar();

	SPI_Port_Init();

	rSPCON1=(1<<11)|(1<<10);		// FIFO Clear
	while((rSPCON1>>10)&0x3 > 0);	// Wait for FIFO clear

	endSpi1Tx=0;
#if 1
	spi1TxStr = (volatile char *)pspi_dma;
	trans_count = 307200-3;
#else
	spi1TxStr = "1234567890!@#$%^&*()";
	trans_count = 20-3;
#endif
	
	SPI_Baud_Rate_Set(1000000);
	SPI_Transfer_Format();

	rSPPIN1 = (rSPPIN1&~(1<<3))|(1<<0);//Feedback Clock Disable, Master Out Keep
	rSPFIC1 = (rSPFIC1&~0xfff)|(1<<4)|(1<<2);
	rSPCON1 = (rSPCON1&~0xffff)|(0<<14)|(0<<12)|(1<<8)|(0<<7)|(0<<5)|(1<<4)|(1<<3)|(0<<0);//DMA,dis-SCK,slave

	SPI1_Master_nSS_Con(0);

	pISR_SPI1=(unsigned)Spi1_Tx_fifo_Int;
	rINTMSK&=~(BIT_SPI1);

	rSPTXFIFO1 = *spi1TxStr++;
	rSPTXFIFO1 = *spi1TxStr++;
	rSPTXFIFO1 = *spi1TxStr++;

	while(endSpi1Tx==0){
    		if(Uart_GetKey())
			break;
	}

	while(((rSPSTA1>>4)&0x1)==0);	// wait for fifo empty state
	for(i=0;i<7000;i++);
	SPI1_Master_nSS_Con(1);

	rSPCON0 = 0x0008;
	rSPFIC1 = 0x0;
	rSPPIN1 = 0x02;
//	rSPCON0=(0<<5)|(0<<4)|(1<<3)|(1<<2)|(0<<1)|(0<<0);//Poll,dis-SCK,master,low,A,normal
	SPI_Port_Recovery();
}

void Test_Spi1_M_Tx_Fifo_Int2(void)
{
	int i;
	printf("[This Board is SPI1(Master Tx), Another Board are SPI1(Slave Rx) Fifo Int. test]\n");
	printf("Slave is ready? Then press any key, Start\n");
	getchar();

	SPI_Port_Init();

	rSPCON1=(1<<11)|(1<<10);		// FIFO Clear
	while((rSPCON1>>10)&0x3 > 0);	// Wait for FIFO clear

	endSpi1Tx=0;
#if 1
	spi1TxStr = (volatile char *)pspi_dma;
	trans_count = 307200;
#else
	spi1TxStr = "1234567890!@#$%^&*()";
	trans_count = 20-3;
#endif
	
	SPI_Baud_Rate_Set(1000000);
	SPI_Transfer_Format();

	rSPPIN1 = (rSPPIN1&~(1<<3))|(1<<0);//Feedback Clock Disable, Master Out Keep
	rSPFIC1 = (rSPFIC1&~0xfff)|(1<<4)|(1<<2);
	rSPCON1 = (rSPCON1&~0xffff)|(0<<14)|(0<<12)|(1<<8)|(0<<7)|(0<<5)|(1<<4)|(1<<3)|(0<<0);//DMA,dis-SCK,slave

	SPI1_Master_nSS_Con(0);

	pISR_SPI1=(unsigned)Spi1_Tx_fifo_Int;
	rINTMSK&=~(BIT_SPI1);

	while(endSpi1Tx==0){
    		if(Uart_GetKey())
			break;
	}

	while(((rSPSTA1>>4)&0x1)==0);	// wait for fifo empty state
	for(i=0;i<7000;i++);
	SPI1_Master_nSS_Con(1);

	rSPCON0 = 0x0008;
	rSPFIC1 = 0x0;
	rSPPIN1 = 0x02;
//	rSPCON0=(0<<5)|(0<<4)|(1<<3)|(1<<2)|(0<<1)|(0<<0);//Poll,dis-SCK,master,low,A,normal
	SPI_Port_Recovery();
}

void __irq Spi1_Tx_fifo_Int(void)
{
	rINTMSK|=(BIT_SPI1);

	while((rSPSTA1>>5)&0x1) {
//	while((rSPSTA1>>16)&0x1f) {

		rSPTXFIFO1 = *spi1TxStr++;
		trans_count--;

		if(trans_count==0) {
			endSpi1Tx=1;
			ClearPending(BIT_SPI1);
			return;
			}
		}

	ClearPending(BIT_SPI1);
	rINTMSK&=~(BIT_SPI1);
}

void Test_Spi1_S_Rx_Fifo_Int(void)
{
	unsigned int i,j;
	unsigned char *rx_ptr;
	unsigned int read_data,dummy_data;
	unsigned int ErrCnt;
	U32 *ptr_erase;

	ptr_erase = (unsigned int *)(SPI_BUFFER1);
	for(i=0;i<76800;i++) {
		*ptr_erase++ = 0;
		}

	SPI_Port_Init();

	rSPCON1=(1<<11)|(1<<10);		// FIFO Clear
	while((rSPCON1>>10)&0x3 == 3);	// Wait for FIFO clear

	endSpi1Rx=0;
	spi1RxStr=(char *) SPI_BUFFER1; 					// Rx Buffer to receive
	trans_count = 307200;

	SPI_Baud_Rate_Set(1000000);
	SPI_Transfer_Format();

	rSPFIC1 = (rSPFIC1&~0xfff)|(1<<7)|(1<<5)|(0<<3);	// Rx FIFO Time-Out, Rx FIFO Almost Full Interrupt Enable
	rSPTOV = 0xfffff;	// Rx FIFO Time-out Count
	rSPCON1 = (rSPCON1&~0xffff)|(1<<16)|(2<<14)|(1<<9)|(0<<7)|(0<<5)|(0<<4)|(0<<3)|(0<<0);//Poll,dis-SCK,slave

	pISR_SPI1=(unsigned)Spi1_Rx_fifo_Int;
	rINTMSK&=~(BIT_SPI1);

	while(endSpi1Rx==0){
    		if(Uart_GetKey())
			break;
	}

	rSPCON0=(0<<5)|(0<<4)|(1<<3)|(1<<2)|(0<<1)|(0<<0);//Poll,dis-SCK,master,low,A,normal

	rx_ptr=(unsigned char *)(SPI_BUFFER1);
	printf("Data trans_count %d\n",trans_count);	
	printf("Data compare !!\n");
	ErrCnt=0;
	for(i=0,j=0;i<76800;i++,j+=4) {
		read_data = (U32)(*(rx_ptr+j+3)<<24|*(rx_ptr+j+2)<<16|*(rx_ptr+j+1)<<8|*(rx_ptr+j));
		if(pspi_dma[i]!=read_data)  {
			printf("%d Ori [%08x]\t",i,pspi_dma[i]);
			printf("Cpy [%08x]\t",read_data);
			ErrCnt++;
			printf("E");
			getchar();
			}
		}

	printf("Error Count : %d\n",ErrCnt);

	SPI_Port_Recovery();
}

void __irq Spi1_Rx_fifo_Int(void)
{
	rINTMSK|=(BIT_SPI1);

	if((rSPSTA1>>12)&0x1)
		rSPSTA1 |= (1<<12); // Rx FIFO Trailing Byte Time-out interrupt bit clear
	
//	while((rSPSTA1>>24)&0x1f) {
	while((rSPSTA1>>6)&0x1) {

		*spi1RxStr++ = rSPRXFIFO1;
		trans_count--;

		if(trans_count==0) {
			rSPCON1&=~(1<<7); // Rx dir (Clock Out Stop)
			endSpi1Rx=1;
			printf("Rx fifo time out\n");
			ClearPending(BIT_SPI1);
			return;
			}
		}

	ClearPending(BIT_SPI1);
	rINTMSK&=~(BIT_SPI1);
}

void Test_Spi1_M_Rx_Fifo_Int(void)
{
	unsigned int i,j;
	unsigned char *rx_ptr;
	unsigned int read_data,dummy_data;
	unsigned int ErrCnt;
	U32 *ptr_erase;

	ptr_erase = (unsigned int *)(SPI_BUFFER1);
	for(i=0;i<76800;i++) {
		*ptr_erase++ = 0;
		}

	printf("[This Board is SPI1(Master Rx), Another Board are SPI1(Slave Tx) Fifo Int. test]\n");
	printf("Slave is ready? Then press any key, Start\n");
	getchar();

	SPI_Port_Init();

	rSPCON1=(1<<11)|(1<<10);		// FIFO Clear
	while((rSPCON1>>10)&0x3 > 0);	// Wait for FIFO clear

	endSpi1Rx=0;
	spi1RxStr=(char *) SPI_BUFFER1; 					// Rx Buffer to receive
	trans_count = 307200;
	
	SPI_Baud_Rate_Set(1000000);
	SPI_Transfer_Format();