periph.c

可以用的ＥＺ－ＵＳＢ控制器ＳＬＡＶＥ ＦＩＦＯ Ｃ＋＋程序

#pragma NOIV               // Do not generate interrupt vectors
//-----------------------------------------------------------------------------
//   File:      periph.c
//   Contents:   Hooks required to implement USB peripheral function.
//
//   Copyright (c) 1997 AnchorChips, Inc. All rights reserved
//-----------------------------------------------------------------------------
#include "fx2.h"
#include "fx2regs.h"
#include "fx2sdly.h"     
#include "gpif.h"

extern BOOL   GotSUD;         // Received setup data flag
extern BOOL   Sleep;
extern BOOL   Rwuen;
extern BOOL   Selfpwr;

BYTE   Configuration;      // Current configuration
BYTE   AlternateSetting;   // Alternate settings   
BYTE   High_Full_Flag;

extern const char xdata FlowStates[36];
//-----------------------------------------------------------------------------
// Task Dispatcher hooks
//   The following hooks are called by the task dispatcher.
//-----------------------------------------------------------------------------

void TD_Init(void)             // Called once at startup
{
  // set the CPU clock to 48MHz
  CPUCS = ((CPUCS & ~bmCLKSPD) | bmCLKSPD1);
  SYNCDELAY; 


   Rwuen = TRUE;            // Enable remote-wakeup

   // EP2 512 BULK OUT 4x
   SYNCDELAY;                    // see TRM section 15.14
   EP2CFG = 0xA0; //512PACKET;                // BUF[1:0]=00 for 4x buffering
  
  // EP4 and  EP6 and EP8 are not used in this implementation...

  SYNCDELAY;                    // 
  EP6CFG = 0xE0;                // clear valid bit


  SYNCDELAY;                    // 
  FIFORESET = 0x80;             // activate NAK-ALL to avoid race conditions
  SYNCDELAY;                    // 
  FIFORESET = 0x02;             // reset, FIFO 2

  SYNCDELAY;                    // 
  FIFORESET = 0x06;             // reset, FIFO 6

  SYNCDELAY;                    // 
  FIFORESET = 0x00;             // deactivate NAK-ALL
  SYNCDELAY;

	 // 8-bit bus (WORDWIDE=1)...
   EP2FIFOCFG = 0x10;//AUTO OUT 8-BIT BUS
   SYNCDELAY; 
   EP6FIFOCFG = 0x08;//AUTO IN  8-BIT BUS
   SYNCDELAY; 
  
   GpifInit();

  // setup INT4 as internal source for GPIF interrupts
  // using INT4CLR (SFR), automatically enabled
  SYNCDELAY;
  INTSETUP |= 0x03;   // Enable INT4 FIFO/GPIF Autovectoring
  SYNCDELAY;          // used here as "delay"
	EXIF &=  ~0x40;     // just in case one was pending...
  SYNCDELAY;          // used here as "delay"
  GPIFIRQ = 0x03;
  SYNCDELAY;          // 
  GPIFIE = 0x03;      // Enable GPIFDONE interrupt
  SYNCDELAY;          // 
  EIE |= 0x04;        // Enable INT4 ISR, EIE.2(EIEX4=1)
}

void TD_Poll(void)             // Called repeatedly while the device is idle
{

//	OEA=0xff;
//	IOA=~(IOA&0x01);

  if( GPIFTRIG & 0x80 )               // if GPIF interface IDLE
  {   
    if ( ! ( EP24FIFOFLGS & 0x02 ) )  // if there's a packet in the peripheral domain for EP2
	{ 
			Peripheral_SetEP2GPIFTC(512);        //write 512 byte data to gipf
			Peripheral_FIFOWrite(0);
    }

	 else   if ( !( EP68FIFOFLGS & 0x01 ) )     // if EP6 FIFO is not full
		{ 
		    Peripheral_SetEP6GPIFTC(512);        //read 512 byte data from gipf
			Peripheral_FIFORead(2);
        }
  }
}

BOOL TD_Suspend(void)          // Called before the device goes into suspend mode
{
   return(TRUE);
}

BOOL TD_Resume(void)          // Called after the device resumes
{
   return(TRUE);
}
#define TESTING_GPIF // NOTE: Comment this line out for frameworks based firmware
                     // See the example GPIF Tool Utility under Application
                     // Reference Material for more advanced development info
#ifdef TESTING_GPIF
// TODO: You may add additional code below.

void OtherInit( void )
{ // interface initialization
  // ...see TD_Init( );
}

// Set EP2GPIF Transaction Count
void Peripheral_SetEP2GPIFTC( WORD xfrcnt )
{
  SYNCDELAY;                    // 
  EP2GPIFTCH = xfrcnt >> 8;  // setup transaction count
  SYNCDELAY;                    // 
  EP2GPIFTCL = ( BYTE )xfrcnt;
}

// Set EP6GPIF Transaction Count
void Peripheral_SetEP6GPIFTC( WORD xfrcnt )
{
  SYNCDELAY;                    // 
  EP6GPIFTCH = xfrcnt >> 8;  // setup transaction count
  SYNCDELAY;                    // 
  EP6GPIFTCL = ( BYTE )xfrcnt;
}

#define GPIF_FLGSELPF 0
#define GPIF_FLGSELEF 1
#define GPIF_FLGSELFF 2

// Set EP2GPIF Decision Point FIFO Flag Select (PF, EF, FF)
void SetEP2GPIFFLGSEL( WORD DP_FIFOFlag )
{
  EP2GPIFFLGSEL = DP_FIFOFlag;
}

// Set EP6GPIF Decision Point FIFO Flag Select (PF, EF, FF)
void SetEP6GPIFFLGSEL( WORD DP_FIFOFlag )
{
  EP6GPIFFLGSEL = DP_FIFOFlag;
}


// Set EP2GPIF Programmable Flag STOP, overrides Transaction Count
void SetEP2GPIFPFSTOP( void )
{
  EP2GPIFPFSTOP = 0x01;
}

// Set EP6GPIF Programmable Flag STOP, overrides Transaction Count
void SetEP6GPIFPFSTOP( void )
{
  EP6GPIFPFSTOP = 0x01;
}

#define GPIFTRIGWR 0
#define GPIFTRIGRD 4


// write byte(s)/word(s) to PERIPHERAL, using GPIF and EPxFIFO
// if EPx WORDWIDE=0 then write byte(s)
// if EPx WORDWIDE=1 then write word(s)
void Peripheral_FIFOWrite( BYTE FIFO_EpNum )
{
  while( !( GPIFTRIG & 0x80 ) ) // poll GPIFTRIG.7 Done bit
  {
     ;
  }

  // trigger FIFO write transaction(s), using SFR
  GPIFTRIG = FIFO_EpNum;  // R/W=0, EP[1:0]=FIFO_EpNum for EPx write(s)
}

// read byte(s)/word(s) from PERIPHERAL, using GPIF and EPxFIFO
// if EPx WORDWIDE=0 then read byte(s)
// if EPx WORDWIDE=1 then read word(s)
void Peripheral_FIFORead( BYTE FIFO_EpNum )
{
  while( !( GPIFTRIG & 0x80 ) ) // poll GPIFTRIG.7 GPIF Done bit
  {
     ;
  }

  // trigger FIFO read transaction(s), using SFR
  GPIFTRIG = GPIFTRIGRD | FIFO_EpNum; // R/W=1, EP[1:0]=FIFO_EpNum for EPx read(s)
}


#endif
//-----------------------------------------------------------------------------
// Device Request hooks
//   The following hooks are called by the end point 0 device request parser.
//-----------------------------------------------------------------------------

BOOL DR_GetDescriptor(void)
{
   return(TRUE);
}

BOOL DR_SetConfiguration(void)   // Called when a Set Configuration command is received
{
   Configuration = SETUPDAT[2];
   if(High_Full_Flag == 1)
   {
   		SYNCDELAY;                    // 
		EP2AUTOINLENH  = 0x02;        //ep2 auto commit length 512
        SYNCDELAY;
        EP2AUTOINLENL = 0x00;
        SYNCDELAY;
        EP6AUTOINLENH  = 0x02;       //ep6 auto commit length 512
        SYNCDELAY;
        EP6AUTOINLENL = 0x00;
        SYNCDELAY;
   }
   else
   {
   		SYNCDELAY;                    // 
		EP2AUTOINLENH  = 0x00;        //ep2 auto commit length 512
        SYNCDELAY;
        EP2AUTOINLENL = 0x40;
        SYNCDELAY;
        EP6AUTOINLENH  = 0x00;       //ep6 auto commit length 512
        SYNCDELAY;
        EP6AUTOINLENL = 0x40;
        SYNCDELAY;
   }
   return(TRUE);            // Handled by user code
}

BOOL DR_GetConfiguration(void)   // Called when a Get Configuration command is received
{
   EP0BUF[0] = Configuration;
   EP0BCH = 0;
   EP0BCL = 1;
   return(TRUE);            // Handled by user code
}

BOOL DR_SetInterface(void)       // Called when a Set Interface command is received
{
   AlternateSetting = SETUPDAT[2];
   return(TRUE);            // Handled by user code
}

BOOL DR_GetInterface(void)       // Called when a Set Interface command is received
{
   EP0BUF[0] = AlternateSetting;
   EP0BCH = 0;
   EP0BCL = 1;
   return(TRUE);            // Handled by user code
}

BOOL DR_GetStatus(void)
{
   return(TRUE);
}

BOOL DR_ClearFeature(void)
{
   return(TRUE);
}

BOOL DR_SetFeature(void)
{
   return(TRUE);
}

BOOL DR_VendorCmnd(void)
{
   return(TRUE);
}

//-----------------------------------------------------------------------------
// USB Interrupt Handlers
//   The following functions are called by the USB interrupt jump table.
//-----------------------------------------------------------------------------

// Setup Data Available Interrupt Handler
void ISR_Sudav(void) interrupt 0
{
   GotSUD = TRUE;            // Set flag
   EZUSB_IRQ_CLEAR();
   USBIRQ = bmSUDAV;         // Clear SUDAV IRQ
}

// Setup Token Interrupt Handler
void ISR_Sutok(void) interrupt 0
{
   EZUSB_IRQ_CLEAR();
   USBIRQ = bmSUTOK;         // Clear SUTOK IRQ
}

void ISR_Sof(void) interrupt 0
{
   EZUSB_IRQ_CLEAR();
   USBIRQ = bmSOF;            // Clear SOF IRQ
}

void ISR_Ures(void) interrupt 0
{
   // whenever we get a USB reset, we should revert to full speed mode
   pConfigDscr = pFullSpeedConfigDscr;
   ((CONFIGDSCR xdata *) pConfigDscr)->type = CONFIG_DSCR;
   pOtherConfigDscr = pHighSpeedConfigDscr;
   ((CONFIGDSCR xdata *) pOtherConfigDscr)->type = OTHERSPEED_DSCR;
   High_Full_Flag = 0;

   EZUSB_IRQ_CLEAR();
   USBIRQ = bmURES;         // Clear URES IRQ
}

void ISR_Susp(void) interrupt 0
{
   Sleep = TRUE;
   EZUSB_IRQ_CLEAR();
   USBIRQ = bmSUSP;
}

void ISR_Highspeed(void) interrupt 0
{
   if (EZUSB_HIGHSPEED())
   {
      pConfigDscr = pHighSpeedConfigDscr;
      ((CONFIGDSCR xdata *) pConfigDscr)->type = CONFIG_DSCR;
      pOtherConfigDscr = pFullSpeedConfigDscr;
      ((CONFIGDSCR xdata *) pOtherConfigDscr)->type = OTHERSPEED_DSCR;
	  High_Full_Flag = 1;
   }

   EZUSB_IRQ_CLEAR();
   USBIRQ = bmHSGRANT;
}

void ISR_Ep0ack(void) interrupt 0
{
}
void ISR_Stub(void) interrupt 0
{
}
void ISR_Ep0in(void) interrupt 0
{
}
void ISR_Ep0out(void) interrupt 0
{
}
void ISR_Ep1in(void) interrupt 0
{
}
void ISR_Ep1out(void) interrupt 0
{
}
void ISR_Ep2inout(void) interrupt 0
{
}
void ISR_Ep4inout(void) interrupt 0
{
}
void ISR_Ep6inout(void) interrupt 0
{
}
void ISR_Ep8inout(void) interrupt 0
{
}
void ISR_Ibn(void) interrupt 0
{
}
void ISR_Ep0pingnak(void) interrupt 0
{
}
void ISR_Ep1pingnak(void) interrupt 0
{
}
void ISR_Ep2pingnak(void) interrupt 0
{
}
void ISR_Ep4pingnak(void) interrupt 0
{
}
void ISR_Ep6pingnak(void) interrupt 0
{
}
void ISR_Ep8pingnak(void) interrupt 0
{
}
void ISR_Errorlimit(void) interrupt 0
{
}
void ISR_Ep2piderror(void) interrupt 0
{
}
void ISR_Ep4piderror(void) interrupt 0
{
}
void ISR_Ep6piderror(void) interrupt 0
{
}
void ISR_Ep8piderror(void) interrupt 0
{
}
void ISR_Ep2pflag(void) interrupt 0
{
}
void ISR_Ep4pflag(void) interrupt 0
{
}
void ISR_Ep6pflag(void) interrupt 0
{
}
void ISR_Ep8pflag(void) interrupt 0
{
}
void ISR_Ep2eflag(void) interrupt 0
{
}
void ISR_Ep4eflag(void) interrupt 0
{
}
void ISR_Ep6eflag(void) interrupt 0
{
}
void ISR_Ep8eflag(void) interrupt 0
{
}
void ISR_Ep2fflag(void) interrupt 0
{
}
void ISR_Ep4fflag(void) interrupt 0
{
}
void ISR_Ep6fflag(void) interrupt 0
{
}
void ISR_Ep8fflag(void) interrupt 0
{
}
void ISR_GpifComplete(void) interrupt 0
{
//	GpifFinishFlag = 1;	
    EXIF &=  ~0x40;
    INT4CLR = 0xFF;             // automatically enabled at POR
}
void ISR_GpifWaveform(void) interrupt 0
{

    EXIF &=  ~0x40;
    INT4CLR = 0xFF;             // automatically enabled at POR
}