usb_fpga.fit.eqn

ＥＺ－ＵＳＢ控制器６８０１３ＧＰＩＦ－ＦＩＦＯ读写的Ｃ语言程序

--A1L51 is add~1110 at LC_X20_Y15_N7
--operation mode is normal

A1L51 = A1L48 & (!A1L281 # !fifordaddr[9]);

--fifordaddr[3] is fifordaddr[3] at LC_X20_Y15_N7
--operation mode is normal

fifordaddr[3] = DFFEAS(A1L51, GLOBAL(gclk), GLOBAL(RESETFPGA), , !CTL1_FLAGB, , , , );


--A1L52 is add~1111 at LC_X21_Y15_N2
--operation mode is arithmetic

A1L52 = fifordaddr[2] $ (!A1L37);

--A1L53 is add~1113 at LC_X21_Y15_N2
--operation mode is arithmetic

A1L53_cout_0 = fifordaddr[2] & (!A1L37);
A1L53 = CARRY(A1L53_cout_0);

--A1L54 is add~1113COUT1_1146 at LC_X21_Y15_N2
--operation mode is arithmetic

A1L54_cout_1 = fifordaddr[2] & (!A1L38);
A1L54 = CARRY(A1L54_cout_1);


--A1L55 is add~1116 at LC_X19_Y15_N3
--operation mode is normal

A1L55 = A1L52 & (!A1L281 # !fifordaddr[9]);

--fifordaddr[2] is fifordaddr[2] at LC_X19_Y15_N3
--operation mode is normal

fifordaddr[2] = DFFEAS(A1L55, GLOBAL(gclk), GLOBAL(RESETFPGA), , !CTL1_FLAGB, , , , );


--A1L56 is add~1117 at LC_X21_Y15_N6
--operation mode is arithmetic

A1L56_carry_eqn = (!A1L65 & A1L45) # (A1L65 & A1L46);
A1L56 = fifordaddr[6] $ (!A1L56_carry_eqn);

--A1L57 is add~1119 at LC_X21_Y15_N6
--operation mode is arithmetic

A1L57_cout_0 = fifordaddr[6] & (!A1L45);
A1L57 = CARRY(A1L57_cout_0);

--A1L58 is add~1119COUT1_1149 at LC_X21_Y15_N6
--operation mode is arithmetic

A1L58_cout_1 = fifordaddr[6] & (!A1L46);
A1L58 = CARRY(A1L58_cout_1);


--A1L59 is add~1122 at LC_X20_Y15_N9
--operation mode is normal

A1L59 = A1L56 & (!A1L281 # !fifordaddr[9]);

--fifordaddr[6] is fifordaddr[6] at LC_X20_Y15_N9
--operation mode is normal

fifordaddr[6] = DFFEAS(A1L59, GLOBAL(gclk), GLOBAL(RESETFPGA), , !CTL1_FLAGB, , , , );


--A1L60 is add~1123 at LC_X21_Y15_N8
--operation mode is arithmetic

A1L60_carry_eqn = (!A1L65 & A1L33) # (A1L65 & A1L34);
A1L60 = fifordaddr[8] $ (!A1L60_carry_eqn);

--A1L61 is add~1125 at LC_X21_Y15_N8
--operation mode is arithmetic

A1L61_cout_0 = fifordaddr[8] & (!A1L33);
A1L61 = CARRY(A1L61_cout_0);

--A1L62 is add~1125COUT1_1151 at LC_X21_Y15_N8
--operation mode is arithmetic

A1L62_cout_1 = fifordaddr[8] & (!A1L34);
A1L62 = CARRY(A1L62_cout_1);


--A1L63 is add~1128 at LC_X19_Y15_N8
--operation mode is normal

A1L63 = A1L60 & (!A1L281 # !fifordaddr[9]);

--fifordaddr[8] is fifordaddr[8] at LC_X19_Y15_N8
--operation mode is normal

fifordaddr[8] = DFFEAS(A1L63, GLOBAL(gclk), GLOBAL(RESETFPGA), , !CTL1_FLAGB, , , , );


--A1L64 is add~1129 at LC_X21_Y15_N4
--operation mode is arithmetic

A1L64 = fifordaddr[4] $ !A1L49;

--A1L65 is add~1131 at LC_X21_Y15_N4
--operation mode is arithmetic

A1L65 = CARRY(fifordaddr[4] & !A1L50);


--A1L66 is add~1134 at LC_X19_Y15_N7
--operation mode is normal

A1L66 = A1L64 & (!fifordaddr[9] # !A1L281);

--fifordaddr[4] is fifordaddr[4] at LC_X19_Y15_N7
--operation mode is normal

fifordaddr[4] = DFFEAS(A1L66, GLOBAL(gclk), GLOBAL(RESETFPGA), , !CTL1_FLAGB, , , , );


--A1L231 is LessThan~415 at LC_X21_Y14_N8
--operation mode is arithmetic

A1L231_cout_0 = fifowraddr[8] & (!A1L234 # !fifordaddr[8]) # !fifowraddr[8] & !fifordaddr[8] & !A1L234;
A1L231 = CARRY(A1L231_cout_0);

--A1L232 is LessThan~415COUT1_466 at LC_X21_Y14_N8
--operation mode is arithmetic

A1L232_cout_1 = fifowraddr[8] & (!A1L235 # !fifordaddr[8]) # !fifowraddr[8] & !fifordaddr[8] & !A1L235;
A1L232 = CARRY(A1L232_cout_1);


--A1L259 is process0~190 at LC_X21_Y16_N8
--operation mode is normal

A1L259 = A1L257 & fifowraddr[8] & A1L258;


--A1L260 is process0~191 at LC_X21_Y16_N2
--operation mode is normal

A1L260 = !A1L170 & A1L173 & A1L176 & !fifowraddr[9];


--A1L261 is process0~192 at LC_X19_Y18_N7
--operation mode is normal

A1L261 = A1L179 & A1L182 & A1L185 & A1L188;


--A1L262 is process0~193 at LC_X19_Y18_N6
--operation mode is normal

A1L262 = A1L194 & A1L197 & A1L191 & A1L200;


--A1L263 is process0~194 at LC_X19_Y18_N1
--operation mode is normal

A1L263 = A1L206 & A1L203 & A1L209 & A1L212;


--A1L264 is process0~195 at LC_X19_Y18_N2
--operation mode is normal

A1L264 = A1L262 & A1L215 & A1L261 & A1L263;


--A1L256 is process0~0 at LC_X21_Y16_N3
--operation mode is normal

A1L256 = A1L260 & (A1L259 & A1L264);


--A1L234 is LessThan~420 at LC_X21_Y14_N7
--operation mode is arithmetic

A1L234_cout_0 = fifowraddr[7] & fifordaddr[7] & !A1L237 # !fifowraddr[7] & (fifordaddr[7] # !A1L237);
A1L234 = CARRY(A1L234_cout_0);

--A1L235 is LessThan~420COUT1_465 at LC_X21_Y14_N7
--operation mode is arithmetic

A1L235_cout_1 = fifowraddr[7] & fifordaddr[7] & !A1L238 # !fifowraddr[7] & (fifordaddr[7] # !A1L238);
A1L235 = CARRY(A1L235_cout_1);


--A1L171Q is FX2FD[0]~reg0 at LC_X13_Y17_N2
--operation mode is normal
--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.

A1L171Q_lut_out = GND;
A1L171Q = DFFEAS(A1L171Q_lut_out, GLOBAL(gclk), VCC, , RESETFPGA, data2usb[0], , , VCC);


--A1L265Q is process1~0 at LC_X10_Y20_N2
--operation mode is normal

A1L265Q_lut_out = !CTL2_FLAGC;
A1L265Q = DFFEAS(A1L265Q_lut_out, GLOBAL(gclk), VCC, , RESETFPGA, , , , );


--A1L174Q is FX2FD[1]~reg0 at LC_X16_Y16_N5
--operation mode is normal
--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.

A1L174Q_lut_out = GND;
A1L174Q = DFFEAS(A1L174Q_lut_out, GLOBAL(gclk), VCC, , RESETFPGA, data2usb[1], , , VCC);


--A1L177Q is FX2FD[2]~reg0 at LC_X16_Y16_N4
--operation mode is normal

A1L177Q_lut_out = data2usb[2];
A1L177Q = DFFEAS(A1L177Q_lut_out, GLOBAL(gclk), VCC, , RESETFPGA, , , , );


--A1L180Q is FX2FD[3]~reg0 at LC_X16_Y16_N1
--operation mode is normal

A1L180Q_lut_out = data2usb[3];
A1L180Q = DFFEAS(A1L180Q_lut_out, GLOBAL(gclk), VCC, , RESETFPGA, , , , );


--A1L183Q is FX2FD[4]~reg0 at LC_X16_Y16_N2
--operation mode is normal

A1L183Q_lut_out = data2usb[4];
A1L183Q = DFFEAS(A1L183Q_lut_out, GLOBAL(gclk), VCC, , RESETFPGA, , , , );


--A1L186Q is FX2FD[5]~reg0 at LC_X16_Y16_N9
--operation mode is normal
--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.

A1L186Q_lut_out = GND;
A1L186Q = DFFEAS(A1L186Q_lut_out, GLOBAL(gclk), VCC, , RESETFPGA, data2usb[5], , , VCC);


--A1L189Q is FX2FD[6]~reg0 at LC_X7_Y20_N2
--operation mode is normal
--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.

A1L189Q_lut_out = GND;
A1L189Q = DFFEAS(A1L189Q_lut_out, GLOBAL(gclk), VCC, , RESETFPGA, data2usb[6], , , VCC);


--A1L192Q is FX2FD[7]~reg0 at LC_X8_Y19_N2
--operation mode is normal
--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.

A1L192Q_lut_out = GND;
A1L192Q = DFFEAS(A1L192Q_lut_out, GLOBAL(gclk), VCC, , RESETFPGA, data2usb[7], , , VCC);


--A1L195Q is FX2FD[8]~reg0 at LC_X20_Y18_N2
--operation mode is normal
--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.

A1L195Q_lut_out = GND;
A1L195Q = DFFEAS(A1L195Q_lut_out, GLOBAL(gclk), VCC, , RESETFPGA, data2usb[8], , , VCC);


--A1L198Q is FX2FD[9]~reg0 at LC_X21_Y19_N2
--operation mode is normal
--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.

A1L198Q_lut_out = GND;
A1L198Q = DFFEAS(A1L198Q_lut_out, GLOBAL(gclk), VCC, , RESETFPGA, data2usb[9], , , VCC);


--A1L201Q is FX2FD[10]~reg0 at LC_X21_Y17_N2
--operation mode is normal

A1L201Q_lut_out = data2usb[10];
A1L201Q = DFFEAS(A1L201Q_lut_out, GLOBAL(gclk), VCC, , RESETFPGA, , , , );


--A1L204Q is FX2FD[11]~reg0 at LC_X20_Y17_N2
--operation mode is normal
--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.

A1L204Q_lut_out = GND;
A1L204Q = DFFEAS(A1L204Q_lut_out, GLOBAL(gclk), VCC, , RESETFPGA, data2usb[11], , , VCC);


--A1L207Q is FX2FD[12]~reg0 at LC_X25_Y19_N2
--operation mode is normal
--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.

A1L207Q_lut_out = GND;
A1L207Q = DFFEAS(A1L207Q_lut_out, GLOBAL(gclk), VCC, , RESETFPGA, data2usb[12], , , VCC);


--A1L210Q is FX2FD[13]~reg0 at LC_X28_Y20_N2
--operation mode is normal

A1L210Q_lut_out = data2usb[13];
A1L210Q = DFFEAS(A1L210Q_lut_out, GLOBAL(gclk), VCC, , RESETFPGA, , , , );


--A1L213Q is FX2FD[14]~reg0 at LC_X19_Y20_N2
--operation mode is normal

A1L213Q_lut_out = data2usb[14];
A1L213Q = DFFEAS(A1L213Q_lut_out, GLOBAL(gclk), VCC, , RESETFPGA, , , , );


--A1L216Q is FX2FD[15]~reg0 at LC_X31_Y19_N2
--operation mode is normal
--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.

A1L216Q_lut_out = GND;
A1L216Q = DFFEAS(A1L216Q_lut_out, GLOBAL(gclk), VCC, , RESETFPGA, data2usb[15], , , VCC);


--A1L237 is LessThan~425 at LC_X21_Y14_N6
--operation mode is arithmetic

A1L237_cout_0 = fifowraddr[6] & (!A1L240 # !fifordaddr[6]) # !fifowraddr[6] & !fifordaddr[6] & !A1L240;
A1L237 = CARRY(A1L237_cout_0);