usb_fpga.qsf

ＥＺ－ＵＳＢ控制器６８０１３ＧＰＩＦ－ＦＩＦＯ读写的Ｃ语言程序

# Copyright (C) 1991-2006 Altera Corporation
# Your use of Altera Corporation's design tools, logic functions 
# and other software and tools, and its AMPP partner logic 
# functions, and any output files any of the foregoing 
# (including device programming or simulation files), and any 
# associated documentation or information are expressly subject 
# to the terms and conditions of the Altera Program License 
# Subscription Agreement, Altera MegaCore Function License 
# Agreement, or other applicable license agreement, including, 
# without limitation, that your use is for the sole purpose of 
# programming logic devices manufactured by Altera and sold by 
# Altera or its authorized distributors.  Please refer to the 
# applicable agreement for further details.


# The default values for assignments are stored in the file
#		USB_FPGA_assignment_defaults.qdf
# If this file doesn't exist, and for assignments not listed, see file
#		assignment_defaults.qdf

# Altera recommends that you do not modify this file. This
# file is updated automatically by the Quartus II software
# and any changes you make may be lost or overwritten.


set_global_assignment -name FAMILY Cyclone
set_global_assignment -name DEVICE EP1C6Q240C8
set_global_assignment -name TOP_LEVEL_ENTITY USB_FPGA
set_global_assignment -name ORIGINAL_QUARTUS_VERSION "5.1 SP2"
set_global_assignment -name PROJECT_CREATION_TIME_DATE "19:55:53  MAY 28, 2007"
set_global_assignment -name LAST_QUARTUS_VERSION 5.1
set_global_assignment -name VHDL_FILE USB_FPGA.vhd
set_location_assignment PIN_222 -to FX2ADR[0]
set_location_assignment PIN_221 -to FX2ADR[1]
set_location_assignment PIN_220 -to FX2ADR[2]
set_location_assignment PIN_219 -to FX2ADR[3]
set_location_assignment PIN_218 -to FX2ADR[4]
set_location_assignment PIN_217 -to FX2ADR[5]
set_location_assignment PIN_216 -to FX2ADR[6]
set_location_assignment PIN_215 -to FX2ADR[7]
set_location_assignment PIN_185 -to FX2ADR[8]
set_location_assignment PIN_4 -to FX2FD[0]
set_location_assignment PIN_3 -to FX2FD[1]
set_location_assignment PIN_2 -to FX2FD[2]
set_location_assignment PIN_1 -to FX2FD[3]
set_location_assignment PIN_236 -to FX2FD[4]
set_location_assignment PIN_235 -to FX2FD[5]
set_location_assignment PIN_234 -to FX2FD[6]
set_location_assignment PIN_233 -to FX2FD[7]
set_location_assignment PIN_201 -to FX2FD[8]
set_location_assignment PIN_200 -to FX2FD[9]
set_location_assignment PIN_199 -to FX2FD[10]
set_location_assignment PIN_198 -to FX2FD[11]
set_location_assignment PIN_184 -to FX2FD[12]
set_location_assignment PIN_183 -to FX2FD[13]
set_location_assignment PIN_182 -to FX2FD[14]
set_location_assignment PIN_181 -to FX2FD[15]
set_location_assignment PIN_39 -to KEY1
set_location_assignment PIN_41 -to KEY2
set_location_assignment PIN_42 -to KEY3
set_location_assignment PIN_141 -to LED1
set_location_assignment PIN_140 -to LED2
set_location_assignment PIN_139 -to LED3
set_location_assignment PIN_138 -to LED4
set_location_assignment PIN_225 -to CTL0_FLAGA
set_location_assignment PIN_224 -to CTL1_FLAGB
set_location_assignment PIN_223 -to CTL2_FLAGC
set_location_assignment PIN_227 -to CTL3
set_location_assignment PIN_226 -to CTL4
set_location_assignment PIN_202 -to CTL5
set_location_assignment PIN_179 -to RDY0_SLRD
set_location_assignment PIN_178 -to RDY1_SLWR
set_location_assignment PIN_177 -to RDY2
set_location_assignment PIN_176 -to RDY3
set_location_assignment PIN_175 -to RDY4
set_location_assignment PIN_174 -to RDY5
set_location_assignment PIN_153 -to RESETFPGA
set_location_assignment PIN_28 -to gclk
set_global_assignment -name VECTOR_WAVEFORM_FILE USB_FPGA.vwf
set_location_assignment PIN_43 -to KEY4
set_instance_assignment -name IO_STANDARD LVTTL -to LED1
set_instance_assignment -name IO_STANDARD LVTTL -to LED2
set_instance_assignment -name IO_STANDARD LVTTL -to LED3
set_instance_assignment -name IO_STANDARD LVTTL -to LED4
set_instance_assignment -name IO_STANDARD LVTTL -to CTL0_FLAGA
set_instance_assignment -name IO_STANDARD LVTTL -to CTL1_FLAGB
set_instance_assignment -name IO_STANDARD LVTTL -to CTL2_FLAGC
set_instance_assignment -name IO_STANDARD LVTTL -to CTL3
set_instance_assignment -name IO_STANDARD LVTTL -to CTL4
set_instance_assignment -name IO_STANDARD LVTTL -to CTL5
set_instance_assignment -name IO_STANDARD LVTTL -to RDY0_SLRD
set_instance_assignment -name IO_STANDARD LVTTL -to RDY1_SLWR
set_instance_assignment -name IO_STANDARD LVTTL -to RDY2
set_instance_assignment -name IO_STANDARD LVTTL -to RDY3
set_instance_assignment -name IO_STANDARD LVTTL -to RDY4
set_instance_assignment -name IO_STANDARD LVTTL -to RDY5
set_instance_assignment -name IO_STANDARD LVTTL -to RESETFPGA
set_instance_assignment -name IO_STANDARD LVTTL -to gclk
set_global_assignment -name RESERVE_ALL_UNUSED_PINS "AS INPUT TRI-STATED"
set_global_assignment -name STRATIX_DEVICE_IO_STANDARD LVTTL
set_global_assignment -name RESERVE_ASDO_AFTER_CONFIGURATION "AS INPUT TRI-STATED"
set_global_assignment -name RESERVE_ALL_UNUSED_PINS_NO_OUTPUT_GND "AS INPUT TRI-STATED"