usb_fpga.map.eqn

ＥＺ－ＵＳＢ控制器６８０１３ＧＰＩＦ－ＦＩＦＯ读写的Ｃ语言程序

-- Copyright (C) 1991-2005 Altera Corporation
-- Your use of Altera Corporation's design tools, logic functions 
-- and other software and tools, and its AMPP partner logic 
-- functions, and any output files any of the foregoing 
-- (including device programming or simulation files), and any 
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-- to the terms and conditions of the Altera Program License 
-- Subscription Agreement, Altera MegaCore Function License 
-- Agreement, or other applicable license agreement, including, 
-- without limitation, that your use is for the sole purpose of 
-- programming logic devices manufactured by Altera and sold by 
-- Altera or its authorized distributors.  Please refer to the 
-- applicable agreement for further details.
--fifowraddr[7] is fifowraddr[7]
--operation mode is arithmetic

fifowraddr[7]_carry_eqn = A1L128;
fifowraddr[7]_lut_out = fifowraddr[7] $ (fifowraddr[7]_carry_eqn);
fifowraddr[7] = DFFEAS(fifowraddr[7]_lut_out, gclk, RESETFPGA, , !CTL0_FLAGA, , , A1L205, );

--A1L130 is fifowraddr[7]~196
--operation mode is arithmetic

A1L130 = CARRY(!A1L128 # !fifowraddr[7]);


--fifowraddr[9] is fifowraddr[9]
--operation mode is normal

fifowraddr[9]_carry_eqn = A1L132;
fifowraddr[9]_lut_out = fifowraddr[9] $ (fifowraddr[9]_carry_eqn);
fifowraddr[9] = DFFEAS(fifowraddr[9]_lut_out, gclk, RESETFPGA, , !CTL0_FLAGA, , , A1L205, );


--fifordaddr[9] is fifordaddr[9]
--operation mode is normal

fifordaddr[9]_lut_out = A1L23;
fifordaddr[9] = DFFEAS(fifordaddr[9]_lut_out, gclk, RESETFPGA, , !CTL1_FLAGB, , , , );


--fifordaddr[7] is fifordaddr[7]
--operation mode is normal

fifordaddr[7]_lut_out = A1L26;
fifordaddr[7] = DFFEAS(fifordaddr[7]_lut_out, gclk, RESETFPGA, , !CTL1_FLAGB, , , , );


--A1L241 is rtl~139
--operation mode is normal

A1L241 = fifowraddr[7] & fifordaddr[7] & (fifowraddr[9] $ !fifordaddr[9]) # !fifowraddr[7] & !fifordaddr[7] & (fifowraddr[9] $ !fifordaddr[9]);


--fifowraddr[0] is fifowraddr[0]
--operation mode is arithmetic

fifowraddr[0]_lut_out = !fifowraddr[0];
fifowraddr[0] = DFFEAS(fifowraddr[0]_lut_out, gclk, RESETFPGA, , !CTL0_FLAGA, , , A1L205, );

--A1L116 is fifowraddr[0]~204
--operation mode is arithmetic

A1L116 = CARRY(fifowraddr[0]);


--fifowraddr[1] is fifowraddr[1]
--operation mode is arithmetic

fifowraddr[1]_carry_eqn = A1L116;
fifowraddr[1]_lut_out = fifowraddr[1] $ (fifowraddr[1]_carry_eqn);
fifowraddr[1] = DFFEAS(fifowraddr[1]_lut_out, gclk, RESETFPGA, , !CTL0_FLAGA, , , A1L205, );

--A1L118 is fifowraddr[1]~208
--operation mode is arithmetic

A1L118 = CARRY(!A1L116 # !fifowraddr[1]);


--fifordaddr[1] is fifordaddr[1]
--operation mode is normal

fifordaddr[1]_lut_out = A1L29;
fifordaddr[1] = DFFEAS(fifordaddr[1]_lut_out, gclk, RESETFPGA, , !CTL1_FLAGB, , , , );


--fifordaddr[0] is fifordaddr[0]
--operation mode is normal

fifordaddr[0]_lut_out = A1L32;
fifordaddr[0] = DFFEAS(fifordaddr[0]_lut_out, gclk, RESETFPGA, , !CTL1_FLAGB, , , , );


--A1L242 is rtl~140
--operation mode is normal

A1L242 = fifowraddr[0] & fifordaddr[0] & (fifowraddr[1] $ !fifordaddr[1]) # !fifowraddr[0] & !fifordaddr[0] & (fifowraddr[1] $ !fifordaddr[1]);


--fifowraddr[3] is fifowraddr[3]
--operation mode is arithmetic

fifowraddr[3]_carry_eqn = A1L120;
fifowraddr[3]_lut_out = fifowraddr[3] $ (fifowraddr[3]_carry_eqn);
fifowraddr[3] = DFFEAS(fifowraddr[3]_lut_out, gclk, RESETFPGA, , !CTL0_FLAGA, , , A1L205, );

--A1L122 is fifowraddr[3]~212
--operation mode is arithmetic

A1L122 = CARRY(!A1L120 # !fifowraddr[3]);


--fifowraddr[5] is fifowraddr[5]
--operation mode is arithmetic

fifowraddr[5]_carry_eqn = A1L124;
fifowraddr[5]_lut_out = fifowraddr[5] $ (fifowraddr[5]_carry_eqn);
fifowraddr[5] = DFFEAS(fifowraddr[5]_lut_out, gclk, RESETFPGA, , !CTL0_FLAGA, , , A1L205, );

--A1L126 is fifowraddr[5]~216
--operation mode is arithmetic

A1L126 = CARRY(!A1L124 # !fifowraddr[5]);


--fifordaddr[5] is fifordaddr[5]
--operation mode is normal

fifordaddr[5]_lut_out = A1L35;
fifordaddr[5] = DFFEAS(fifordaddr[5]_lut_out, gclk, RESETFPGA, , !CTL1_FLAGB, , , , );


--fifordaddr[3] is fifordaddr[3]
--operation mode is normal

fifordaddr[3]_lut_out = A1L38;
fifordaddr[3] = DFFEAS(fifordaddr[3]_lut_out, gclk, RESETFPGA, , !CTL1_FLAGB, , , , );


--A1L243 is rtl~141
--operation mode is normal

A1L243 = fifowraddr[3] & fifordaddr[3] & (fifowraddr[5] $ !fifordaddr[5]) # !fifowraddr[3] & !fifordaddr[3] & (fifowraddr[5] $ !fifordaddr[5]);


--fifowraddr[6] is fifowraddr[6]
--operation mode is arithmetic

fifowraddr[6]_carry_eqn = A1L126;
fifowraddr[6]_lut_out = fifowraddr[6] $ (!fifowraddr[6]_carry_eqn);
fifowraddr[6] = DFFEAS(fifowraddr[6]_lut_out, gclk, RESETFPGA, , !CTL0_FLAGA, , , A1L205, );

--A1L128 is fifowraddr[6]~220
--operation mode is arithmetic

A1L128 = CARRY(fifowraddr[6] & (!A1L126));


--fifowraddr[2] is fifowraddr[2]
--operation mode is arithmetic

fifowraddr[2]_carry_eqn = A1L118;
fifowraddr[2]_lut_out = fifowraddr[2] $ (!fifowraddr[2]_carry_eqn);
fifowraddr[2] = DFFEAS(fifowraddr[2]_lut_out, gclk, RESETFPGA, , !CTL0_FLAGA, , , A1L205, );

--A1L120 is fifowraddr[2]~224
--operation mode is arithmetic

A1L120 = CARRY(fifowraddr[2] & (!A1L118));


--fifordaddr[2] is fifordaddr[2]
--operation mode is normal

fifordaddr[2]_lut_out = A1L41;
fifordaddr[2] = DFFEAS(fifordaddr[2]_lut_out, gclk, RESETFPGA, , !CTL1_FLAGB, , , , );


--fifordaddr[6] is fifordaddr[6]
--operation mode is normal

fifordaddr[6]_lut_out = A1L44;
fifordaddr[6] = DFFEAS(fifordaddr[6]_lut_out, gclk, RESETFPGA, , !CTL1_FLAGB, , , , );


--A1L244 is rtl~142
--operation mode is normal

A1L244 = fifowraddr[6] & fifordaddr[6] & (fifowraddr[2] $ !fifordaddr[2]) # !fifowraddr[6] & !fifordaddr[6] & (fifowraddr[2] $ !fifordaddr[2]);


--A1L245 is rtl~143
--operation mode is normal

A1L245 = A1L241 & A1L242 & A1L243 & A1L244;


--fifowraddr[4] is fifowraddr[4]
--operation mode is arithmetic

fifowraddr[4]_carry_eqn = A1L122;
fifowraddr[4]_lut_out = fifowraddr[4] $ (!fifowraddr[4]_carry_eqn);
fifowraddr[4] = DFFEAS(fifowraddr[4]_lut_out, gclk, RESETFPGA, , !CTL0_FLAGA, , , A1L205, );

--A1L124 is fifowraddr[4]~228
--operation mode is arithmetic

A1L124 = CARRY(fifowraddr[4] & (!A1L122));


--fifowraddr[8] is fifowraddr[8]
--operation mode is arithmetic

fifowraddr[8]_carry_eqn = A1L130;
fifowraddr[8]_lut_out = fifowraddr[8] $ (!fifowraddr[8]_carry_eqn);
fifowraddr[8] = DFFEAS(fifowraddr[8]_lut_out, gclk, RESETFPGA, , !CTL0_FLAGA, , , A1L205, );

--A1L132 is fifowraddr[8]~232
--operation mode is arithmetic

A1L132 = CARRY(fifowraddr[8] & (!A1L130));


--fifordaddr[8] is fifordaddr[8]
--operation mode is normal

fifordaddr[8]_lut_out = A1L47;
fifordaddr[8] = DFFEAS(fifordaddr[8]_lut_out, gclk, RESETFPGA, , !CTL1_FLAGB, , , , );


--fifordaddr[4] is fifordaddr[4]
--operation mode is normal

fifordaddr[4]_lut_out = A1L50;
fifordaddr[4] = DFFEAS(fifordaddr[4]_lut_out, gclk, RESETFPGA, , !CTL1_FLAGB, , , , );


--A1L246 is rtl~144
--operation mode is normal

A1L246 = fifowraddr[4] & fifordaddr[4] & (fifowraddr[8] $ !fifordaddr[8]) # !fifowraddr[4] & !fifordaddr[4] & (fifowraddr[8] $ !fifordaddr[8]);


--A1L75 is fifoef~4
--operation mode is normal

A1L75 = !A1L246 # !A1L245 # !RESETFPGA;


--A1L204 is LessThan~407
--operation mode is normal

A1L204_carry_eqn = A1L207;
A1L204 = fifordaddr[9] & fifowraddr[9] & A1L204_carry_eqn # !fifordaddr[9] & (fifowraddr[9] # A1L204_carry_eqn);


--A1L1 is add~1020
--operation mode is arithmetic

A1L1 = fifordaddr[0] $ fifowraddr[0];

--A1L2 is add~1022
--operation mode is arithmetic

A1L2 = CARRY(fifowraddr[0] # !fifordaddr[0]);


--A1L3 is add~1025
--operation mode is arithmetic

A1L3_carry_eqn = A1L2;
A1L3 = fifordaddr[1] $ fifowraddr[1] $ !A1L3_carry_eqn;

--A1L4 is add~1027
--operation mode is arithmetic

A1L4 = CARRY(fifordaddr[1] & (!A1L2 # !fifowraddr[1]) # !fifordaddr[1] & !fifowraddr[1] & !A1L2);


--A1L76 is fifoff~89
--operation mode is normal

A1L76 = !RESETFPGA # !A1L3 # !A1L1 # !A1L204;


--A1L5 is add~1030
--operation mode is arithmetic

A1L5_carry_eqn = A1L4;
A1L5 = fifordaddr[2] $ fifowraddr[2] $ A1L5_carry_eqn;

--A1L6 is add~1032
--operation mode is arithmetic

A1L6 = CARRY(fifordaddr[2] & fifowraddr[2] & !A1L4 # !fifordaddr[2] & (fifowraddr[2] # !A1L4));


--A1L7 is add~1035
--operation mode is arithmetic

A1L7_carry_eqn = A1L6;
A1L7 = fifordaddr[3] $ fifowraddr[3] $ !A1L7_carry_eqn;

--A1L8 is add~1037
--operation mode is arithmetic

A1L8 = CARRY(fifordaddr[3] & (!A1L6 # !fifowraddr[3]) # !fifordaddr[3] & !fifowraddr[3] & !A1L6);


--A1L9 is add~1040
--operation mode is arithmetic

A1L9_carry_eqn = A1L8;
A1L9 = fifordaddr[4] $ fifowraddr[4] $ A1L9_carry_eqn;

--A1L10 is add~1042
--operation mode is arithmetic

A1L10 = CARRY(fifordaddr[4] & fifowraddr[4] & !A1L8 # !fifordaddr[4] & (fifowraddr[4] # !A1L8));


--A1L11 is add~1045
--operation mode is arithmetic

A1L11_carry_eqn = A1L10;
A1L11 = fifordaddr[5] $ fifowraddr[5] $ !A1L11_carry_eqn;

--A1L12 is add~1047
--operation mode is arithmetic

A1L12 = CARRY(fifordaddr[5] & (!A1L10 # !fifowraddr[5]) # !fifordaddr[5] & !fifowraddr[5] & !A1L10);


--A1L77 is fifoff~90
--operation mode is normal

A1L77 = !A1L11 # !A1L9 # !A1L7 # !A1L5;


--A1L13 is add~1050
--operation mode is arithmetic

A1L13_carry_eqn = A1L12;
A1L13 = fifordaddr[6] $ fifowraddr[6] $ A1L13_carry_eqn;

--A1L14 is add~1052
--operation mode is arithmetic

A1L14 = CARRY(fifordaddr[6] & fifowraddr[6] & !A1L12 # !fifordaddr[6] & (fifowraddr[6] # !A1L12));


--A1L15 is add~1055
--operation mode is arithmetic

A1L15_carry_eqn = A1L14;
A1L15 = fifordaddr[7] $ fifowraddr[7] $ !A1L15_carry_eqn;

--A1L16 is add~1057
--operation mode is arithmetic

A1L16 = CARRY(fifordaddr[7] & (!A1L14 # !fifowraddr[7]) # !fifordaddr[7] & !fifowraddr[7] & !A1L14);


--A1L17 is add~1060
--operation mode is arithmetic

A1L17_carry_eqn = A1L16;
A1L17 = fifordaddr[8] $ fifowraddr[8] $ A1L17_carry_eqn;

--A1L18 is add~1062
--operation mode is arithmetic

A1L18 = CARRY(fifordaddr[8] & fifowraddr[8] & !A1L16 # !fifordaddr[8] & (fifowraddr[8] # !A1L16));


--A1L19 is add~1065
--operation mode is arithmetic

A1L19_carry_eqn = A1L18;
A1L19 = fifowraddr[9] $ fifordaddr[9] $ !A1L19_carry_eqn;

--A1L20 is add~1067
--operation mode is arithmetic

A1L20 = CARRY(fifowraddr[9] & fifordaddr[9] & !A1L18 # !fifowraddr[9] & (fifordaddr[9] # !A1L18));


--A1L78 is fifoff~91
--operation mode is normal

A1L78 = !A1L19 # !A1L17 # !A1L15 # !A1L13;


--A1L21 is add~1070
--operation mode is normal

A1L21_carry_eqn = A1L20;
A1L21 = !A1L21_carry_eqn;


--A1L79 is fifoff~92
--operation mode is normal

A1L79 = A1L76 # A1L77 # A1L78 # !A1L21;


--A1L80 is fifoff~93
--operation mode is normal

A1L80 = A1L79 # A1L245 & A1L246;


--led2buf is led2buf
--operation mode is normal