msp430x20x2_adc10_03.s43

LSD-EZ430-F2013在IAR环境下的汇编语言开发例程

;*******************************************************************************
;   MSP430F20x2 Demo - ADC10, Sample A10 Temp, Set P1.0 if Temp ++ ~2C
;
;   Description: Set ADC10 and the integrated temperature sensor to detect
;   temperature gradients. The temperature sensor output voltage is sampled
;   ~ every 120ms and compared with the defined delta values using an ISR.
;   (ADC10OSC/4)/64 determines sample time which needs to be greater than
;   30us for temperature sensor.
;   ADC10 is operated in repeat-single channel mode with the sample and
;   convert trigger sourced from Timer_A CCR1. The ADC10IFG at the end
;   of each converstion will trigger an ISR.
;   ACLK = n/a, MCLK = SMCLK = default DCO ~1.2MHz, ADC10CLK = ADC10OSC
;
;                MSP430F20x2
;             -----------------
;         /|\|              XIN|-
;          | |                 |
;          --|RST          XOUT|-
;            |                 |
;            |A10 (Temp)   P1.0|-->LED
;
;   L. Westlund
;   Texas Instruments Inc.
;   May 2006
;   Built with IAR Embedded Workbench Version: 3.41A
;*******************************************************************************
#include "msp430x20x2.h"
;-------------------------------------------------------------------------------
ADCDeltaOn  EQU      3                      ;  ~ 2 Deg C delta for LED on
;-------------------------------------------------------------------------------
            RSEG    CSTACK                  ; Define stack segment
;-------------------------------------------------------------------------------
            RSEG    CODE                    ; Assemble to Flash memory
;-------------------------------------------------------------------------------
RESET       mov.w   #SFE(CSTACK),SP         ; Initialize stackpointer
            mov.w   #WDTPW+WDTHOLD,&WDTCTL  ; Stop WDT
            mov.w   #ADC10DIV_3+INCH_10+SHS_1+CONSEQ_2,&ADC10CTL1
            mov.w   #SREF_1+ADC10SHT_3+REF2_5V+ADC10IE+REFON+ADC10ON,&ADC10CTL0
            mov.w   #30,&TACCR0             ; Delay to allow Ref to settle
            bis.w   #CCIE,&TACCTL0          ; Compare-mode interrupt.
            mov.w   #TACLR+MC_1+TASSEL_2,&TACTL; up mode, SMCLK
            bis.w   #LPM0+GIE,SR            ; Enter LPM0, enable interrupts
            bic.w   #CCIE,&TACCTL0          ; Disable timer interrupt
            dint                            ; Disable Interrupts
            bis.w   #ENC,&ADC10CTL0
            mov.w   #OUTMOD_4,&TACCTL1      ; Toggle on EQU1 (TAR = 0)
            mov.w   #TASSEL_2+MC_2,&TACTL   ; SMCLK, cont-mode
ADC_Wait    bit.w   #ADC10IFG,&ADC10CTL0    ; First conversion?
            jnc     ADC_Wait
            mov.w   &ADC10MEM,R4            ; Read out 1st ADC value
            add.w   #ADCDeltaOn,R4          ;
            clr.b   &P1OUT                  ; Clear P1
            bis.b   #01h,&P1DIR             ; P1.0 as output
                                            ;
Mainloop    bis.w   #LPM0+GIE,SR            ; Enter LPM0, enable interrupts
            nop                             ; Required only for debugger

;-------------------------------------------------------------------------------
TA0_ISR;    ISR for TACCR0
;-------------------------------------------------------------------------------
            clr.w   &TACTL                  ; Clear Timer_A control registers
            bic.w   #LPM0,0(SP)             ; Exit LPM0 on reti
            reti                            ;
;-------------------------------------------------------------------------------
ADC10_ISR;
;-------------------------------------------------------------------------------
            cmp.w   R4,&ADC10MEM            ; ADC10MEM = A10 > R4
            jlo     ADC_ISR_1               ; Again
            bis.b   #01h,&P1OUT             ; P1.0 = 1
            reti                            ;
ADC_ISR_1   bic.b   #01h,&P1OUT             ; P1.0 = 0
            reti                            ;
                                            ;
;-------------------------------------------------------------------------------
            COMMON  INTVEC                  ; Interrupt Vectors
;-------------------------------------------------------------------------------
            ORG     ADC10_VECTOR            ; ADC10 Vector
            DW      ADC10_ISR
            ORG     TIMERA0_VECTOR          ; Timer_A0 Vector
            DW      TA0_ISR
            ORG     RESET_VECTOR            ; POR, ext. Reset
            DW      RESET
            END