📄 usbhidio.lst
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0010 ;======================================================================
0010
0010 ;----------------------------------------------------------------------
0010 ; 128-microsecond interrupt, Cext
0010 ; Unused. If this interrupt occurs, just push the accumulator (because
0010 ; ipret pops it) and re-enable the interrupts.
0010 ;----------------------------------------------------------------------
0010
0010 DoNothing_ISR:
0010 2D [05] push A
0011 ;Enable interrupts and return
0011 1A 20 [06] mov A,[interrupt_mask]
0013 1E 20 [13] ipret Global_Interrupt
0015
0015 ;----------------------------------------------------------------------
0015 ; 1-millisecond interrupt
0015 ; Check to see if the chip is in suspend mode and take appropriate action.
0015 ; Copy values to Endpoint 1's buffer for sending.
0015 ;----------------------------------------------------------------------
0015
0015 One_mSec_ISR:
0015 2D [05] push A
0016 2A 21 [05] iowr Watchdog
0018 ;Find out if enumeration is complete.
0018 ;If enumerating is in progress, loop_temp = 0.
0018 1A 37 [06] mov A, [loop_temp]
001A 16 00 [04] cmp A, 0h
001C ;If enumeration is still in progress, jump.
001C A0 20 [05] jz not_main
001E ;Enumeration has ended, so decrement the loop counter
001E ;(so it no longer = 0).
001E 27 37 [07] dec [loop_temp]
0020
0020 not_main:
0020 ;Check for bus activity.
0020 29 13 [05] iord USB_Status_Control
0022 10 01 [04] and A, 01h
0024 16 00 [04] cmp A,0h
0026 ;If no bus activity, increment the suspend counter.
0026 A0 34 [05] jz Inc_counter
0028 ;If bus activity detected, clear the bus-activity bit,
0028 29 13 [05] iord USB_Status_Control
002A 10 FE [04] and A, 0FEh
002C 2A 13 [05] iowr USB_Status_Control
002E ;and clear the suspend counter.
002E 19 00 [04] mov A, 0h
0030 31 35 [05] mov [suspend_counter], A
0032 80 57 [05] jmp Suspend_end
0034
0034 Inc_counter:
0034 ;Keep track of the amount of time with no bus activity.
0034 23 35 [07] inc [suspend_counter]
0036 ;Get the number of milliseconds the bus has been idle.
0036 1A 35 [06] mov A, [suspend_counter]
0038 ;Has it been 3 milliseconds?
0038 16 03 [04] cmp A, 03h
003A ;If no, there's nothing else to do.
003A B0 57 [05] jnz Suspend_end
003C ;If yes, put the chip in Suspend mode.
003C ;Clear the Suspend counter.
003C 19 00 [04] mov A, 0h
003E 31 35 [05] mov [suspend_counter], A
0040 ;Enable pullups on Port 1; disable the output DAC.
0040 19 00 [04] mov A, 0h
0042 2A 09 [05] iowr Port1_Pullup
0044 19 FF [04] mov A, 0ffh
0046 2A 01 [05] iowr Port1_Data
0048 ;Set the Suspend bit.
0048 29 FF [05] iord Status_Control
004A 0D 08 [04] or A, 08h
004C 2A FF [05] iowr Status_Control
004E ;The chip is now in Suspend mode.
004E ;On exiting Suspend mode, the chip will begin
004E ;executing instructions here:
004E 20 [04] nop
004F ;Disable pullups on Port 1. Enable the output DAC.
004F 19 FF [04] mov A, 0ffh
0051 2A 09 [05] iowr Port1_Pullup
0053 19 00 [04] mov A, 0h
0055 2A 01 [05] iowr Port1_Data
0057
0057 Suspend_end:
0057 ;Is endpoint 1 enabled?
0057 29 11 [05] iord USB_EP1_TX_Config
0059 16 00 [04] cmp A,0
005B ;If no, do nothing.
005B A0 7D [05] jz Select
005D ;If yes, is start_send = 1?
005D ;(Start_send adds a short delay after enumeration.)
005D 1A 32 [06] mov A, [start_send]
005F 16 01 [04] cmp A, 01h
0061 ;If no, do nothing
0061 B0 7D [05] jnz Select
0063 ;If yes, send data:
0063 80 65 [05] jmp send_value
0065
0065 send_value:
0065 ;Copies values from RAM into Endpoint 1's buffer
0065 ;and enables sending the bytes on the next poll.
0065
0065 ;disable Endpoint 1 interrupts
0065 1A 20 [06] mov A,[interrupt_mask]
0067 10 EF [04] and A, EFh
0069 31 20 [05] mov [interrupt_mask],A
006B 2A 20 [05] iowr Global_Interrupt
006D
006D ;Copy values from RAM to Endpoint 1's buffer for transmitting to the host.
006D ;Two bytes:
006D 1A 38 [06] mov A, [Data_Byte0]
006F 31 78 [05] mov [Endpoint1_Byte0], A
0071 1A 39 [06] mov A, [Data_Byte1]
0073 31 79 [05] mov [Endpoint1_Byte1], A
0075 ;Add more bytes if the report format specifies it:
0075 ; mov A, [Data_Byte2]
0075 ; mov [Endpoint1_Byte2], A
0075 ; mov A, [Data_Byte3]
0075 ; mov [Endpoint1_Byte3], A
0075 ; mov A, [Data_Byte4]
0075 ; mov [Endpoint1_Byte4], A
0075 ; mov A, [Data_Byte5]
0075 ; mov [Endpoint1_Byte5], A
0075 ; mov A, [Data_Byte6]
0075 ; mov [Endpoint1_Byte6], A
0075 ; mov A, [Data_Byte7]
0075 ; mov [Endpoint1_Byte7], A
0075
0075 ;Other things to try:
0075 ;Set the value at Port 0 to equal byte 0 in Endpoint 1's buffer:
0075 ; iord Port0_Data
0075 ; mov [Endpoint1_Byte0], A
0075
0075 ;Or set a value here and copy to Endpoint 1's buffer, byte 1:
0075 ; mov A, A5h
0075 ; mov [Endpoint1_Byte1], A
0075
0075 ;Configure Endpoint 1's transmit register
0075 ;so that the bytes will transmit on the next poll.
0075 29 11 [05] iord USB_EP1_TX_Config
0077 ;Don't change the Data 0/1 bit.
0077 10 40 [04] and A,40h
0079 ;Set bits 4 and 7 to 1 enable transmitting.
0079 ;The low nibble is the number of data bytes (2).
0079 0D 92 [04] or A,92h
007B 2A 11 [05] iowr USB_EP1_TX_Config
007D
007D Select:
007D ;Enable Endpoint 1 interrupts.
007D 1A 20 [06] mov A,[interrupt_mask]
007F 0D 10 [04] or A, 10h
0081 31 20 [05] mov [interrupt_mask],A
0083 1E 20 [13] ipret Global_Interrupt
0085
0085 ;----------------------------------------------------------------------
0085 ;GPIO interrupt
0085 ;Can be configured to trigger when a port bit toggles.
0085 ;Unused here.
0085 ;----------------------------------------------------------------------
0085
0085 GPIO_ISR:
0085 2D [05] push A
0086 2E [05] push X
0087
0087 2C [04] pop X
0088 31 20 [05] mov [interrupt_mask],A
008A 1E 20 [13] ipret Global_Interrupt
008C
008C ;----------------------------------------------------------------------
008C ;Endpoint 1 ISR
008C ;Endpoint 1 can do IN (device to host) transfers only.
008C ;This interrupt triggers when the host acknowledges
008C ;receiving data from endpoint 1.
008C ;The ISR toggles the data 0/1 bit for the next transaction and
008C ;sets the EnableRespondToIN bit so the chip will respond to the
008C ;next poll of the endpoint.
008C ;----------------------------------------------------------------------
008C
008C USB_EP1_ISR:
008C 2D [05] push A
008D ;Toggle the data 0/1 bit so it's correct for the next transaction.
008D 29 11 [05] iord USB_EP1_TX_Config
008F 13 40 [04] xor A,40h
0091 ;The interrupt clears the EnableRespondToIN bit (bit 7) in the TX Config.
0091 ;Set this bit to 1 so data will go out on the next poll.
0091 0D 92 [04] or A, 92h
0093 2A 11 [05] iowr USB_EP1_TX_Config
0095 ;Enable interrupts and return.
0095 1A 20 [06] mov A, [interrupt_mask]
0097 1E 20 [13] ipret Global_Interrupt
0099
0099 ;----------------------------------------------------------------------
0099 ; Reset processing
0099 ; Triggers on Reset or "reserved" interrupt.
0099 ;To be safe, initialize everything.
0099 ;----------------------------------------------------------------------
0099
0099 Reset:
0099 ;Place the data stack pointer at the lowest address of Endpoint 0's buffer.
0099 ;This keeps the stack from writing over the USB buffers.
0099 ;The USB buffers are in high RAM;
0099 ;the data stack pointer pre-decrements on a Push instruction.
0099
0099 19 70 [04] mov A, Endpoint_0
009B 30 [05] swap A, dsp
009C
009C ;Initialize to FFh
009C 19 FF [04] mov A, 0ffh
009E 2A 00 [05] iowr Port0_Data ; output ones to port 0
00A0 2A 09 [05] iowr Port1_Pullup ; disable port 1 pullups
00A2 ; select rising edge interrupts
00A2 2A 38 [05] iowr Port1_Isink0 ; maximum isink current Port1 bit 0
00A4 2A 39 [05] iowr Port1_Isink1 ; maximum isink current Port1 bit 1
00A6 2A 3A [05] iowr Port1_Isink2 ; maximum isink current Port1 bit 2
00A8 2A 3B [05] iowr Port1_Isink3 ; maximum isink current Port1 bit 3
00AA
00AA ;Initialize to 00h
00AA 19 00 [04] mov A, 0h
00AC 2A 01 [05] iowr Port1_Data ; output zeros to port 1
00AE 2A 04 [05] iowr Port0_Interrupt ; disable port 0 interrupts
00B0 2A 08 [05] iowr Port0_Pullup ; enable port 0 pullups
00B2 2A 30 [05] iowr Port0_Isink0 ; minimum sink current Port0 bit 0
00B4 2A 31 [05] iowr Port0_Isink1 ; minimum sink current Port0 bit 1
00B6 2A 32 [05] iowr Port0_Isink2 ; minimum sink current Port0 bit 2
00B8 2A 33 [05] iowr Port0_Isink3 ; minimum sink current Port0 bit 3
00BA 2A 34 [05] iowr Port0_Isink4 ; minimum sink current Port0 bit 4
00BC 2A 35 [05] iowr Port0_Isink5 ; minimum sink current Port0 bit 5
00BE 2A 36 [05] iowr Port0_Isink6 ; minimum sink current Port0 bit 6
00C0 2A 37 [05] iowr Port0_Isink7 ; minimum sink current Port0 bit 7
00C2 31 78 [05] mov [Endpoint1_Byte0],A
00C4 31 79 [05] mov [Endpoint1_Byte1],A
00C6 31 7A [05] mov [Endpoint1_Byte2],A
00C8 31 29 [05] mov [endpoint_stall], A
00CA 31 30 [05] mov [remote_wakeup_status], A
00CC 31 31 [05] mov [configuration_status], A
00CE 31 37 [05] mov [loop_temp], A
00D0 31 32 [05] mov [start_send], A
00D2 2A 21 [05] iowr Watchdog ; clear watchdog timer
00D4
00D4 ;initialize values to transmit at Endpoint 1.
00D4 19 A5 [04] mov A, A5h
00D6 31 38 [05] mov [Data_Byte0], A
00D8 19 F0 [04] mov A, F0h
00DA 31 39 [05] mov [Data_Byte1], A
00DC
00DC ;Enable Port 1, bit 0 interrupts.
00DC ; mov A, 01h
00DC ; iowr Port1_Interrupt
00DC ;
00DC ;Test what kind of reset occurred: bus or watchdog?
00DC 29 FF [05] iord Status_Control
00DE ;Was it a bus reset?
00DE 10 20 [04] and A, USBReset
00E0 ;If yes, jump to handle it.
00E0 B0 F7 [05] jnz BusReset
00E2 29 FF [05] iord Status_Control
00E4 ;Was it a watchdog reset?
00E4 10 40 [04] and A, WatchDogReset
00E6 ;If no, continue to wait for a bus reset
00E6 A0 F0 [05] jz suspendReset
00E8 ;
00E8 ;Watchog reset:
00E8 ;A watchdog reset means that the watchdog timer
00E8 ;wasn't cleared for 8.192 milliseconds.
00E8 ;Wait for a bus reset to bring the system alive again.
00E8 ;Enable 1-millisecond interrupt only
00E8 19 04 [04] mov A, TIMER_ONLY
00EA 31 20 [05] mov [interrupt_mask],A
00EC 2A 20 [05] iowr Global_Interrupt
00EE ;Wait for a bus reset.
00EE WatchdogHandler:
00EE 80 EE [05] jmp WatchdogHandler
00F0
00F0 suspendReset:
00F0 ;Return to suspend mode to wait for a USB bus reset.
00F0 19 09 [04] mov A, 09h
00F2 2A FF [05] iowr Status_Control
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