📄 wm97audiodefs.h
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/*-----------------------------------------------------------------------------
* Copyright (c) Wolfson Microelectronics plc. All rights reserved.
*
* This software as well as any related documentation is furnished under
* license and may only be used or copied in accordance with the terms of the
* license. The information in this file is furnished for informational use
* only, is subject to change without notice, and should not be construed as
* a commitment by Wolfson Microelectronics plc. Wolfson Microelectronics plc
* assumes no responsibility or liability for any errors or inaccuracies that
* may appear in this document or any software that may be provided in
* association with this document.
*
* Except as permitted by such license, no part of this document may be
* reproduced, stored in a retrieval system, or transmitted in any form or by
* any means without the express written consent of Wolfson Microelectronics plc.
*
* $Id: WM97AudioDefs.h 4408 2007-04-23 11:53:31Z ian $
*
* This file contains mask definitions for the registers for controlling
* audio on Wolfson WM97xx AC'97 codecs.
*
* Warning:
* This driver is specifically written for Wolfson Codecs. It is not a
* general CODEC device driver.
*
*---------------------------------------------------------------------------*/
#ifndef __WM97AUDIODEFS_H__
#define __WM97AUDIODEFS_H__
/*
* Include files
*/
/*
* Definitions
*/
/*
* Audio definitions
*/
#define WM97_VRA_ENABLED_MASK 0x1 /* VRA bit set to 1 enables sample rate conversion */
#define WM97_EQ_MASK 0xFE00 /* 1111111000000000 */
#define WM97_BASS_MASK 0XE000 /* 1110000000000000 */
#define WM97_TREB_MASK 0x1800 /* 0001100000000000 */
#define WM97_MODE_MASK 0x0600 /* 0000011000000000 */
#define WM97_MID_BASS_MAX_TREB 0x9E00 /* 1001111000000000 */
#define WM97_BASS_BIT_POSTN (0x1u<<11)
#define WM97_TREB_BIT_POSTN (0x1u<<00)
#define WM97_MODE_BIT_POSTN (0x1u<<07)
/* General Purpose register (0x20) bits */
#define WM9705_SELECT_MIC2 (1<<8) /* Set = MIC2, clear = MIC1 */
/* Extended Audio status/control register (0x2A) bits */
#define WM97_VRA_ENABLED (1<<0)
/* Add Function Control register (0x5C) bits */
#define WM9705_ADDFUN_ADCNDAC (1<<5)
#define WM97_ADDFUN_AMUTE (1<<7)
#define WM97_ADDFUN_AMUTE_ON (1<<15)
/* bits for additional function register 2 (5Ah) */
#define WM9712_ADDFUN_RAMPDOWN (1<<6)
#define WM9712_ZERO_DATA_SWITCH_DISABLE (1<<4)
/* bits for WM9713 additional function register 1 (68h) */
#define WM9713_ZERO_DATA_SWITCH_DISABLE (1<<2)
/*
* Volume Specific Bits
*/
#define WM97_VOLUME_MASK 0x1f /* 5 bits */
#define WM97_RIGHT_VOLUME_SHIFT 0 /* Right volume bits 5:0 */
#define WM97_RIGHT_VOLUME_MASK ( WM97_VOLUME_MASK << WM97_RIGHT_VOLUME_SHIFT )
#define WM97_LEFT_VOLUME_SHIFT 8 /* Left volume bits 13:8 */
#define WM97_LEFT_VOLUME_MASK ( WM97_VOLUME_MASK << WM97_LEFT_VOLUME_SHIFT )
#define WM97_STEREO_VOLUME_MASK ( WM97_RIGHT_VOLUME_MASK | WM97_LEFT_VOLUME_MASK )
#define WM97_MONO_VOLUME_MASK WM97_VOLUME_MASK
#define WM97_SHIFTED_MONO_VOLUME_SHIFT 8 /* Shifted volume bits 13:8 */
#define WM97_SHIFTED_MONO_VOLUME_MASK ( WM97_MONO_VOLUME_MASK << WM97_SHIFTED_MONO_VOLUME_SHIFT )
#define WM97_MIN_OUTPUT_ATTENUATION 0x0 /* 0dB */
#define WM97_MAX_OUTPUT_ATTENUATION 0x1F /* -46.5dB for 5-bit */
#define WM97_OUTVOL_0DB 0x00
#define WM97_INPUT_VOLUME_MASK 0x1F /* 5 bits */
#define WM97_MAX_INPUT_GAIN 0x00 /* +12dB */
#define WM97_MIN_INPUT_GAIN 0x1F /* -34.5dB */
#define WM97_VOL_IN_0DB 0x0008
#define WM97_MIN_STANDARD_ADC_GAIN 0x00 /* 0dB, 1.5dB steps */
#define WM97_MAX_STANDARD_ADC_GAIN 0x0F /* +22.5dB, 1.5dB steps */
#define WM97_STANDARD_ADC_0DB 0
#define WM97_MIN_EXTENDED_ADC_GAIN 0x00 /* -17.25dB, 1.5dB steps */
#define WM97_MAX_EXTENDED_ADC_GAIN 0x3F /* +30dB, 0.75dB steps */
#define WM97_EXTENDED_ADC_0DB 0x17
#define WM97_STANDARD_MUTE 0x8000 /* Standard AC97 mute bit */
#define WM97_VOL_IN_0DB_LEFT ( WM97_VOL_IN_0DB << WM97_LEFT_VOLUME_SHIFT )
#define WM97_VOL_IN_0DB_RIGHT ( WM97_VOL_IN_0DB << WM97_RIGHT_VOLUME_SHIFT )
#define WM97_VOL_IN_0DB_BOTH (WM97_VOL_IN_0DB_LEFT | WM97_VOL_IN_0DB_RIGHT)
#define WM97_VOL_IN_0DB_MONO WM97_VOL_IN_0DB
#define WM97_ZERO_CROSS 0x0080
#define WM9713_ZERO_CROSS_RIGHT 0x0040
#define WM9713_ZERO_CROSS_LEFT 0x4000
#define WM9713_ZERO_CROSS_MONO 0x0040
#define WM9713_ZERO_CROSS_MONO_SHIFTED 0x4000
#define WM97_MUTE_MASK 0x8000
#define WM9712_DAC_MUTE_MASK 0xE000
#define WM9712_MIC_MUTE_MASK 0x6000
#define WM97_NO_MUTE 0x0000
#define WM9713_MUTE_RIGHT_MASK 0x0080
#define WM9713_MUTE_LEFT_MASK 0x8000
#define WM9713_MUTE_STEREO_MASK ( WM9713_MUTE_LEFT_MASK | WM9713_MUTE_RIGHT_MASK )
#define WM9713_MUTE_MONO_MASK 0x0080
#define WM9713_MUTE_MONO 0x0080
#define WM9713_MUTE_MONO_SHIFTED_MASK 0x8000
#define WM9713_MUTE_MONO_SHIFTED 0x8000
#define WM9713_MUTE_RIGHT_VOL 0x0080
#define WM9713_MUTE_LEFT_VOL 0x8000
#define WM9713_MUTE_STEREO ( WM9713_MUTE_LEFT_VOL | WM9713_MUTE_RIGHT_VOL )
#define WM9713_MUTE_MONO_VOL 0x0080
#define WM9713_MUTE_MONO_SHIFTED_VOL 0x8000
#define WM97_PCBEEP_OFFSET 0x0001
#define WM97_PCBEEP_MASK (0x0F << WM97_PCBEEP_OFFSET)
#define WM97_MIN_PCBEEP_STANDARD 0xF /* -45dB, 3dB steps */
#define WM97_MAX_PCBEEP_STANDARD 0x0 /* 0dB */
#define WM97_PCBEEP_0DB_STANDARD 0x0
#define WM97_PCBEEP_MULTIPLE_MASK WM97_PGA_VOL_MASK
#define WM97_MIN_PCBEEP_MULTIPLE WM97_PGA_VOL_MINUS15DB
#define WM97_MAX_PCBEEP_MULTIPLE WM97_PGA_VOL_PLUS6DB
#define WM97_PCBEEP_0DB_MULTIPLE WM97_PGA_VOL_0DB
#define WM97_PCBEEP_MULTIPLE_MUTE WM97_PGA_VOL_MUTE
/* Volume values for PGAs with a range +6dB to -15dB */
#define WM97_PGA_VOL_MUTE 0x8
#define WM97_PGA_VOL_MASK 0x7
#define WM97_PGA_VOL_PLUS6DB 0x0
#define WM97_PGA_VOL_PLUS3DB 0x1
#define WM97_PGA_VOL_0DB 0x2
#define WM97_PGA_VOL_MINUS3DB 0x3
#define WM97_PGA_VOL_MINUS6DB 0x4
#define WM97_PGA_VOL_MINUS9DB 0x5
#define WM97_PGA_VOL_MINUS12DB 0x6
#define WM97_PGA_VOL_MINUS15DB 0x7
/* Invert LOUT2 for driving a speaker (02h) */
#define WM97_LOUT2_INVERT 0x0040
/* ADC defines */
#define WM97_ADC_STANDARD_RIGHT_MAX 0x000F
#define WM97_ADC_STANDARD_LEFT_MAX 0x0F00
#define WM97_ADC_STANDARD_STEREO_MAX ( WM97_ADC_STANDARD_LEFT_MAX |\
WM97_ADC_STANDARD_RIGHT_MAX )
#define WM97_ADC_STANDARD_MONO_MAX 0x000F
#define WM97_ADC_STANDARD_MONO_HIGH 0x000E
#define WM97_ADC_EXTENDED_RIGHT_MAX 0x003F
#define WM97_ADC_EXTENDED_RIGHT_HIGH 0x003E
#define WM97_ADC_EXTENDED_LEFT_MAX 0x3F00
#define WM97_ADC_EXTENDED_LEFT_HIGH 0x3E00
#define WM97_ADC_EXTENDED_STEREO_MAX ( WM97_ADC_EXTENDED_LEFT_MAX |\
WM97_ADC_EXTENDED_RIGHT_MAX )
#define WM97_ADC_EXTENDED_STEREO_HIGH ( WM97_ADC_EXTENDED_LEFT_HIGH |\
WM97_ADC_EXTENDED_RIGHT_HIGH )
#define WM97_ADC_EXTENDED_MONO_MAX 0x003F
#define WM97_ADC_EXTENDED_MONO_HIGH 0x003E
#define WM97_ADC_RIGHT_MIN 0x0000
#define WM97_ADC_LEFT_MIN 0x0000
#define WM97_ADC_STEREO_MIN ( WM97_ADC_LEFT_MIN | WM97_ADC_RIGHT_MIN )
#define WM97_ADC_MONO_MIN 0x0000
#define WM97_ADC_EXTENDED_BIT_RIGHT (1U << 6)
#define WM97_ADC_EXTENDED_BIT_LEFT (1U << 14)
#define WM97_ADC_EXTENDED_BIT_STEREO ( WM97_ADC_EXTENDED_BIT_LEFT | WM97_ADC_EXTENDED_BIT_RIGHT )
#define WM97_MUTE_MASK 0x8000
#define WM9712_DAC_MUTE_MASK 0xE000
#define WM9712_MIC_MUTE_MASK 0x6000
#define WM97_AUDIO_LINE_INPUT_STEREO 0x4040
#define WM97_AUDIO_MIC_INPUT_MONO 0x0000
#define WM97_SET_ADC_EXTENDED_HIGH ( WM97_ADC_EXTENDED_STEREO_HIGH |\
WM97_ADC_EXTENDED_BIT_STEREO )
/* Record sources (1Ah) */
#define WM97_RECSRCR_MASK 0x0007
#define WM97_RECSRCR_MIC 0x0000
#define WM97_RECSRCR_CD 0x0001
#define WM97_RECSRCR_VIDEO 0x0002
#define WM97_RECSRCR_AUXIN 0x0003
#define WM97_RECSRCR_LINEOUT 0x0003
#define WM97_RECSRCR_SPEAKER WM97_RECSRCR_LINEOUT
#define WM97_RECSRCR_LINEIN 0x0004
#define WM97_RECSRCR_HEADPHONE 0x0005
#define WM97_RECSRCR_PHONEMIX 0x0006
#define WM97_RECSRCR_PHONE 0x0007
#define WM97_RECSRC_LEFT_SHIFT 8
#define WM97_RECSRCL_MASK (WM_REGVAL)(WM97_RECSRCR_MASK << WM97_RECSRC_LEFT_SHIFT)
#define WM97_RECSRCL_MIC (WM_REGVAL)(WM97_RECSRCR_MIC << WM97_RECSRC_LEFT_SHIFT)
#define WM97_RECSRCL_CD (WM_REGVAL)(WM97_RECSRCR_CD << WM97_RECSRC_LEFT_SHIFT)
#define WM97_RECSRCL_VIDEO (WM_REGVAL)(WM97_RECSRCR_VIDEO << WM97_RECSRC_LEFT_SHIFT)
#define WM97_RECSRCL_AUXIN (WM_REGVAL)(WM97_RECSRCR_AUXIN << WM97_RECSRC_LEFT_SHIFT)
#define WM97_RECSRCL_LINEOUT (WM_REGVAL)(WM97_RECSRCR_LINEOUT << WM97_RECSRC_LEFT_SHIFT)
#define WM97_RECSRCL_SPEAKER (WM_REGVAL)(WM97_RECSRCR_SPEAKER << WM97_RECSRC_LEFT_SHIFT)
#define WM97_RECSRCL_LINEIN (WM_REGVAL)(WM97_RECSRCR_LINEIN << WM97_RECSRC_LEFT_SHIFT)
#define WM97_RECSRCL_HEADPHONE (WM_REGVAL)(WM97_RECSRCR_HEADPHONE << WM97_RECSRC_LEFT_SHIFT)
#define WM97_RECSRCL_PHONEMIX (WM_REGVAL)(WM97_RECSRCR_PHONEMIX << WM97_RECSRC_LEFT_SHIFT)
#define WM97_RECSRCL_PHONE (WM_REGVAL)(WM97_RECSRCR_PHONE << WM97_RECSRC_LEFT_SHIFT)
#define WM97_RECSRC_MASK (WM97_RECSRCR_MASK|WM97_RECSRCL_MASK)
#define WM97_RECSRC_MIC (WM97_RECSRCR_MIC|WM97_RECSRCL_MIC)
#define WM97_RECSRC_CD (WM97_RECSRCR_CD|WM97_RECSRCL_CD)
#define WM97_RECSRC_VIDEO (WM97_RECSRCR_VIDEO|WM97_RECSRCL_VIDEO)
#define WM97_RECSRC_AUXIN (WM97_RECSRCR_AUXIN|WM97_RECSRCL_AUXIN)
#define WM97_RECSRC_LINEOUT (WM97_RECSRCR_LINEOUT|WM97_RECSRCL_LINEOUT)
#define WM97_RECSRC_SPEAKER (WM97_RECSRCR_SPEAKER|WM97_RECSRCL_SPEAKER)
#define WM97_RECSRC_LINEIN (WM97_RECSRCR_LINEIN|WM97_RECSRCL_LINEIN)
#define WM97_RECSRC_HEADPHONE (WM97_RECSRCR_HEADPHONE|WM97_RECSRCL_HEADPHONE)
#define WM97_RECSRC_PHONEMIX (WM97_RECSRCR_PHONEMIX|WM97_RECSRCL_PHONEMIX)
#define WM97_RECSRC_PHONE (WM97_RECSRCR_PHONE|WM97_RECSRCL_PHONE)
/* WM9713 record sources (14h) */
#define WM9713_RECSRCR_MASK 0x0007
#define WM9713_RECSRCR_MICA 0x0000
#define WM9713_RECSRCR_MICB 0x0001
#define WM9713_RECSRCR_LINE 0x0002
#define WM9713_RECSRCR_MONOIN 0x0003
#define WM9713_RECSRCR_HPMIX 0x0004
#define WM9713_RECSRCR_SPEAKER 0x0005
#define WM9713_RECSRCR_MONOMIX 0x0006
#define WM9713_RECSRCR_ALL (WM9713_RECSRCR_MASK | WM9713_RECSRCR_MICA | \
WM9713_RECSRCR_MICB | WM9713_RECSRCR_LINE | \
WM9713_RECSRCR_MONOIN | WM9713_RECSRCR_HPMIX | \
WM9713_RECSRCR_SPEAKER | WM9713_RECSRCR_MONOMIX | \
WM9713_RECSRCR_MONOMIX)
#define WM9713_RECSRC_LEFT_SHIFT 3
#define WM9713_RECSRCL_MASK (WM_REGVAL)(WM9713_RECSRCR_MASK << WM9713_RECSRC_LEFT_SHIFT)
#define WM9713_RECSRCL_MICA (WM_REGVAL)(WM9713_RECSRCR_MICA << WM9713_RECSRC_LEFT_SHIFT)
#define WM9713_RECSRCL_MICB (WM_REGVAL)(WM9713_RECSRCR_MICB << WM9713_RECSRC_LEFT_SHIFT)
#define WM9713_RECSRCL_LINE (WM_REGVAL)(WM9713_RECSRCR_LINE << WM9713_RECSRC_LEFT_SHIFT)
#define WM9713_RECSRCL_MONOIN (WM_REGVAL)(WM9713_RECSRCR_MONOIN << WM9713_RECSRC_LEFT_SHIFT)
#define WM9713_RECSRCL_HPMIX (WM_REGVAL)(WM9713_RECSRCR_HPMIX << WM9713_RECSRC_LEFT_SHIFT)
#define WM9713_RECSRCL_SPEAKER (WM_REGVAL)(WM9713_RECSRCR_SPEAKER << WM9713_RECSRC_LEFT_SHIFT)
#define WM9713_RECSRCL_MONOMIX (WM_REGVAL)(WM9713_RECSRCR_MONOMIX << WM9713_RECSRC_LEFT_SHIFT)
#define WM9713_RECSRCL_ALL (WM9713_RECSRC_LEFT_SHIFT | WM9713_RECSRCL_MASK | \
WM9713_RECSRCL_MICA | WM9713_RECSRCL_MICB | \
WM9713_RECSRCL_LINE | WM9713_RECSRCL_MONOIN | \
WM9713_RECSRCL_HPMIX | WM9713_RECSRCL_SPEAKER | \
WM9713_RECSRCL_MONOMIX)
#define WM9713_RECSRC_MASK (WM9713_RECSRCR_MASK|WM9713_RECSRCL_MASK)
#define WM9713_RECSRC_MICA (WM9713_RECSRCR_MICA|WM9713_RECSRCL_MICA)
#define WM9713_RECSRC_MICB (WM9713_RECSRCR_MICB|WM9713_RECSRCL_MICB)
#define WM9713_RECSRC_LINE (WM9713_RECSRCR_LINE|WM9713_RECSRCL_LINE)
#define WM9713_RECSRC_MONOIN (WM9713_RECSRCR_MONOIN|WM9713_RECSRCL_MONOIN)
#define WM9713_RECSRC_HPMIX (WM9713_RECSRCR_HPMIX|WM9713_RECSRCL_HPMIX)
#define WM9713_RECSRC_SPEAKER (WM9713_RECSRCR_SPEAKER|WM9713_RECSRCL_SPEAKER)
#define WM9713_RECSRC_MONOMIX (WM9713_RECSRCR_MONOMIX|WM9713_RECSRCL_MONOMIX)
#define WM9713_RECSRC_ALL (WM9713_RECSRCR_ALL | WM9713_RECSRCL_ALL)
/* Defines for WM9712 SIDETONE_VOLUME 0x14 register */
#define WM9712_SIDETONE_MIC_MUTE WM97_MUTE_MASK
#define WM9712_SIDETONE_MIC_0DB 0x2000
#define WM9712_SIDETONE_ALC_MUTE_MASK 0x0C00
#define WM9712_SIDETONE_ALC_MUTE 0x0C00
#define WM9712_SIDETONE_ALC_MONO_LEFT 0x0800
#define WM9712_SIDETONE_ALC_MONO_RIGHT 0x0400
#define WM9712_SIDETONE_ALC_0DB 0x0100
/* Defines for input registers with multiple volumes and mutes */
#define WM97_INPUT_I2P_VOL_MASK 0x0070
#define WM97_INPUT_I2M_VOL_MASK 0x0070
#define WM97_INPUT_I2P_MUTE_MASK 0x0080
#define WM97_INPUT_I2M_MUTE_MASK 0x0080
#define WM97_INPUT_I2P_SHIFT 4
#define WM97_INPUT_I2P_MASK 0x0010
#define WM97_INPUT_I2M_SHIFT 4
#define WM97_INPUT_I2M_MASK 0x0010
#define WM97_INPUT_I2S_VOL_MASK 0x0700
#define WM97_INPUT_I2S_MUTE_MASK 0x0800
#define WM97_INPUT_I2S_SHIFT 8
#define WM97_INPUT_I2S_MASK 0x0100
#define WM97_INPUT_I2H_VOL_MASK 0x7000
#define WM97_INPUT_I2H_MUTE_MASK 0x8000
#define WM97_INPUT_I2H_SHIFT 12
#define WM97_INPUT_I2H_MASK 0x1000
#define WM97_INPUT_MULTIPLE_MUTE_MASK ( WM97_INPUT_I2P_MUTE_MASK | \
WM97_INPUT_I2S_MUTE_MASK | \
WM97_INPUT_I2H_MUTE_MASK )
/* Defines for PCBEEP input*/
#define WM97_PCBEEP_B2P_VOL_MASK WM97_INPUT_I2P_VOL_MASK
#define WM97_PCBEEP_B2P_MUTE_MASK WM97_INPUT_I2P_MUTE_MASK
#define WM97_PCBEEP_B2M_VOL_MASK WM97_INPUT_I2M_VOL_MASK
#define WM97_PCBEEP_B2M_MUTE_MASK WM97_INPUT_I2M_MUTE_MASK
#define WM97_PCBEEP_B2S_VOL_MASK WM97_INPUT_I2S_VOL_MASK
#define WM97_PCBEEP_B2S_MUTE_MASK WM97_INPUT_I2S_MUTE_MASK
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