📄 wm8731registerdefs.h
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/*-----------------------------------------------------------------------------
* Copyright (c) Wolfson Microelectronics plc. All rights reserved.
*
* This software as well as any related documentation is furnished under
* license and may only be used or copied in accordance with the terms of the
* license. The information in this file is furnished for informational use
* only, is subject to change without notice, and should not be construed as
* a commitment by Wolfson Microelectronics plc. Wolfson Microelectronics plc
* assumes no responsibility or liability for any errors or inaccuracies that
* may appear in this document or any software that may be provided in
* association with this document.
*
* Except as permitted by such license, no part of this document may be
* reproduced, stored in a retrieval system, or transmitted in any form or by
* any means without the express written consent of Wolfson Microelectronics plc.
*
* $Id: WM8731RegisterDefs.h 2364 2005-11-04 15:56:03Z ib $
*
* The registers on the Wolfson WM8731 device.
*
* Warning:
* This driver is specifically written for Wolfson Codecs. It is not a
* general CODEC device driver.
*
*---------------------------------------------------------------------------*/
#ifndef __WM8731REGISTERDEFS_H__
#define __WM8731REGISTERDEFS_H__
/*
* Include files
*/
/*
* Register values.
*/
#define WM8731_LEFT_INPUT_VOLUME 0x00 /* Left line in */
#define WM8731_RIGHT_INPUT_VOLUME 0x01 /* Right line in */
#define WM8731_LEFT_HEADPHONE_VOLUME 0x02 /* Left headphone out */
#define WM8731_RIGHT_HEADPHONE_VOLUME 0x03 /* Right headphone out */
#define WM8731_ANALOGUE_PATH_CONTROL 0x04 /* Analogue audio path control */
#define WM8731_DIGITAL_PATH_CONTROL 0x05 /* Digital audio path control */
#define WM8731_POWERDOWN_CONTROL 0x06 /* Power down control */
#define WM8731_INTERFACE_CONTROL 0x07 /* Digital audio interface format */
#define WM8731_SAMPLE_RATE_CONTROL 0x08 /* Sampling control */
#define WM8731_ACTIVE_CONTROL 0x09 /* Active control */
#define WM8731_RESET 0x0F /* Reset register */
#define WM8731_REGISTER_COUNT 0xA
#define WM8731_MAX_REGISTER WM8731_RESET
/* General volume defines */
#define WM8731_VOLUME_BOTH ((WM_REGVAL)(1U << 8)) /* Apply to left and right */
/*
* INPUT_VOLUME (0x0/0x1)
*/
#define WM8731_INVOL_MASK 0x01F /* 00 = -34.5dB, 1F = +12dB, 1.5dB steps */
#define WM8731_INVOL_0DB 0x017
#define WM8731_INVOL_MUTE ((WM_REGVAL)(1U << 7)) /* LINMUTE/RINMUTE */
/*
* ADC Volume - _db should be between 12 and -34.5
* E.g. WM8731_INVOL( 0 ) for 0dBFS, WM8731_INVOL( -12 ) for -12dbFS.
*/
#define WM8731_INVOL(_dB) (WM8731_INVOL_0DB + (int)((_dB)/1.5))
/*
* HEADPHONE_VOLUME (0x02/0x03)
*/
#define WM8731_OUTVOL_MASK 0x7F /* 30 = -73dB, 7F = +6dB, 1dB steps */
#define WM8731_OUTVOL_0DB 0x79
#define WM8731_OUTVOL_ZERO_CROSS ((WM_REGVAL)(1U << 7)) /* LZCEN/RZCEN */
/*
* Output Volume - _db should be between +6 and -73, less than -73 is mute
* E.g. WM8731_OUTVOL( 0 ) for 0dBFS, WM8731_OUTVOL( -12 ) for -12dbFS.
*/
#define WM8731_OUTVOL(_dB) (WM8731_OUTVOL_0DB + (int)(_dB))
/*
* WM8731_ANALOGUE_PATH_CONTROL (0x04)
*/
#define WM8731_MIC_BOOST ((WM_REGVAL)(1U << 0)) /* MICBOOST */
#define WM8731_MUTE_MIC ((WM_REGVAL)(1U << 1)) /* MUTEMIC */
#define WM8731_INPUT_MASK ((WM_REGVAL)(1U << 2)) /* INSEL */
#define WM8731_INPUT_MIC ((WM_REGVAL)(1U << 2)) /* INSEL -> MIC */
#define WM8731_INPUT_LINE ((WM_REGVAL)(0U << 2)) /* INSEL -> LINEIN */
#define WM8731_BYPASS ((WM_REGVAL)(1U << 3))
#define WM8731_DACSEL ((WM_REGVAL)(1U << 4))
#define WM8731_SIDETONE ((WM_REGVAL)(1U << 5))
#define WM8731_ST_ATT_MASK ((WM_REGVAL)(3U << 6)) /* SIDEATT */
#define WM8731_ST_ATT_6DB ((WM_REGVAL)(0U << 6))
#define WM8731_ST_ATT_9DB ((WM_REGVAL)(1U << 6))
#define WM8731_ST_ATT_12DB ((WM_REGVAL)(2U << 6))
#define WM8731_ST_ATT_15DB ((WM_REGVAL)(3U << 6))
/*
* WM8731_DIGITAL_PATH_CONTROL (0x05)
*/
#define WM8731_ADCHPD ((WM_REGVAL)(1U << 0)) /* ADC high-pass filter disable */
#define WM8731_DEEMPH_MASK ((WM_REGVAL)(3U << 1)) /* DEEMP */
#define WM8731_DEEMPH_OFF ((WM_REGVAL)(0U << 1))
#define WM8731_DEEMPH_32KHZ ((WM_REGVAL)(1U << 1))
#define WM8731_DEEMPH_44_1KHZ ((WM_REGVAL)(2U << 1))
#define WM8731_DEEMPH_48KHZ ((WM_REGVAL)(3U << 1))
#define WM8731_DAC_MUTE ((WM_REGVAL)(1U << 3)) /* DACMU */
#define WM8731_HPF_OFFSET_SAVE ((WM_REGVAL)(1U << 4)) /* HPOR */
/*
* WM8731_POWERDOWN_CONTROL (0x06)
*/
#define WM8731_POWERDOWN_LINEIN ((WM_REGVAL)(1U << 0)) /* LINEINPD */
#define WM8731_POWERDOWN_MIC ((WM_REGVAL)(1U << 1)) /* MICPD */
#define WM8731_POWERDOWN_INPUTS (WM8731_POWERDOWN_LINEIN | WM8731_POWERDOWN_MIC)
#define WM8731_POWERDOWN_ADC ((WM_REGVAL)(1U << 2)) /* ADCPD */
#define WM8731_POWERDOWN_DAC ((WM_REGVAL)(1U << 3)) /* DACPD */
#define WM8731_POWERDOWN_OUTPUTS ((WM_REGVAL)(1U << 4)) /* OUTPD */
#define WM8731_POWERDOWN_OSCILLATOR ((WM_REGVAL)(1U << 5)) /* OSCPD */
#define WM8731_POWERDOWN_CLKOUT ((WM_REGVAL)(1U << 6)) /* CLOKOUTPD */
#define WM8731_POWERDOWN_POWEROFF ((WM_REGVAL)(1U << 7)) /* POWEROFF */
/*
* WM8731_INTERFACE_CONTROL (0x07)
*/
#define WM8731_DATA_FORMAT_MASK ((WM_REGVAL)(3U << 0)) /* FORMAT - [1:0] - data format */
#define WM8731_DATA_FORMAT_RJUST ((WM_REGVAL)(0U << 0)) /* 00: right-justified */
#define WM8731_DATA_FORMAT_LJUST ((WM_REGVAL)(1U << 0)) /* 01: left-justified */
#define WM8731_DATA_FORMAT_I2S ((WM_REGVAL)(2U << 0)) /* 10: I2S */
#define WM8731_DATA_FORMAT_DSP ((WM_REGVAL)(3U << 0)) /* 11: DSP mode */
#define WM8731_WORD_LENGTH_MASK ((WM_REGVAL)(3U << 2)) /* WL - [3:2] data word length */
#define WM8731_WORD_LENGTH_16BIT ((WM_REGVAL)(0U << 2)) /* 00: 16-bit word length */
#define WM8731_WORD_LENGTH_20BIT ((WM_REGVAL)(1U << 2)) /* 01: 20-bit word length */
#define WM8731_WORD_LENGTH_24BIT (((WM_REGVAL)2U << 2)) /* 10: 24-bit word length */
#define WM8731_WORD_LENGTH_32BIT (((WM_REGVAL)3U << 2)) /* 11: 32-bit word length (not right-justified) */
#define WM8731_DSP_MODE_MASK ((WM_REGVAL)(1U << 4)) /* LRP: [4] DSP Mode */
#define WM8731_LRC_INVERT ((WM_REGVAL)(1U << 4)) /* LRP: right, left and I2S: invert LRC polarity */
#define WM8731_DSP_MODE_A ((WM_REGVAL)(1U << 4)) /* LRP: DSP mode A: 2nd BITCLK after LRC */
#define WM8731_DSP_MODE_B ((WM_REGVAL)(0U << 4)) /* LRP: DSP mode B: 1st BITCLK after LRC */
#define WM8731_LR_SWAP ((WM_REGVAL)(1U << 5)) /* LRSWAP: HIFI only: swap left and right channels */
#define WM8731_MASTER ((WM_REGVAL)(1U << 6)) /* MS/PMS: WM8731 is the master */
#define WM8731_SLAVE ((WM_REGVAL)(0U << 6)) /* MS/PMS: WM8731 is the slave */
#define WM8731_BITCLKINV ((WM_REGVAL)(1U << 7)) /* BCLKINV/VXCLKINV: VXCLK invert */
/*
* WM8731_SAMPLE_RATE_CONTROL (0x08)
*/
#define WM8731_SAMPLE_CLOCK_MASK ((WM_REGVAL)(1U << 0)) /* USB: [0] */
#define WM8731_SAMPLE_USB ((WM_REGVAL)(1U << 0)) /* USB: USB mode */
#define WM8731_SAMPLE_NORMAL ((WM_REGVAL)(0U << 0)) /* USB: normal mode */
#define WM8731_SAMPLE_FEQUENCY_MASK ((WM_REGVAL)(1U << 1)) /* BOSR: [1] */
#define WM8731_SAMPLE_256FS ((WM_REGVAL)(0U << 1)) /* BOSR(Normal): 256FS */
#define WM8731_SAMPLE_384FS ((WM_REGVAL)(1U << 1)) /* BOSR(Normal): 384FS */
#define WM8731_SAMPLE_250FS ((WM_REGVAL)(0U << 1)) /* BOSR(USB): 250FS */
#define WM8731_SAMPLE_272FS ((WM_REGVAL)(1U << 1)) /* BOSR(USB): 272FS */
#define WM8731_SAMPLERATE_SHIFT 2
#define WM8731_SAMPLE_RATE(_r) ((WM_REGVAL)((_r) << WM8731_SAMPLERATE_SHIFT))/* SR - [5:2] */
#define WM8731_SAMPLERATE_MASK WM8731_SAMPLE_RATE(0xF)
#define WM8731_SAMPLE_MCLKDIV ((WM_REGVAL)(1U << 6)) /* CLKIDIV2 */
#define WM8731_SAMPLE_MCLK ((WM_REGVAL)(0U << 6)) /* CLKIDIV2 */
#define WM8731_SAMPLE_MCLK_DIV_2 ((WM_REGVAL)(1U << 6)) /* CLKIDIV2 */
#define WM8731_SAMPLE_CLKOUT_DIV ((WM_REGVAL)(1U << 7)) /* CLKODIV2 */
#define WM8731_SAMPLE_CLKOUT_EQUAL ((WM_REGVAL)(0U << 7)) /* CLKODIV2 */
#define WM8731_SAMPLE_CLKOUT_DIV_2 ((WM_REGVAL)(1U << 7)) /* CLKODIV2 */
/*
* WM8731_ACTIVE_CONTROL (0x09)
*/
#define WM8731_ACTIVE ((WM_REGVAL)(1U << 0))
/*
* 0x0A-0x0E are undefined.
*/
/*
* 0x0F is reset - write 0 to reset.
*/
#define WM8731_RESET_RESET 0
#endif /* __WM8731REGISTERDEFS_H__ */
/*------------------------------ END OF FILE ---------------------------------*/
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