peephole.h

网络驱动开发

/*++

Copyright (c) 2000 Microsoft Corporation. All rights reserved.

   File:       peephole.h
 
               Developed for Toshiba by Elisa Research Inc., CA
               http://www.elisaresearch.com
               [phone]


Abstract:
   
   This file contains related definitions of PeepHole registers'
   access devices, such as on-board SRAM & peripheral devices

Author:

	A. Wang

Environment:

	Kernel mode

Revision History:

	01/16/97		awang		Initial of Toshiba ATM 155 Device Driver.

--*/

#ifndef __PEEPHOLE_H
#define __PEEPHOLE_H


//////////////////////////////////////////////////////////////////////////
//																		
//              Definitions for SRAM tables.
//
//////////////////////////////////////////////////////////////////////////


//
// Definitions of Receive Slot
//
#define RECV_SLOT_TYPE_SMALL       BIT(0)
#define RECV_SLOT_TYPE_BIG         BIT(1)

#define RX_STAT_SLOTTYPE_SMALL     0
#define RX_STAT_SLOTTYPE_BIG       1
#define RX_STAT_SLOTTYPE_RAW       2
#define RX_STAT_SLOTTYPE_RESV      3

//
// Definitions of Receive Slot
//
#define TX_STAT_RC_CBR             0
#define TX_STAT_RC_ABR             1
#define TX_STAT_RC_UBR             2

#define TX_STAT_CHTYPE_RAW         0
#define TX_STAT_CHTYPE_RESV        1
#define TX_STAT_CHTYPE_AAL5        2
#define TX_STAT_CHTYPE_MPEG        3


//
// Definitions of CBR schedule tables
//
#define CBR_SCHEDULE_ENTRY_EOT     BIT(14)
#define MAX_CBR_SCHEDULE_ENTRIES   4096


//
// The maximum of prescal value for CBR schedule table.
//
#define MAX_PRESCALE_VAL           15


//
// The range of Missing RM cell count in ABR value table.
//
#define TBATM155_MAXIMUM_LOG_CRMX  7
#define TBATM155_MINIMUM_CRM       2
#define TBATM155_MAXIMUM_CRM       256

//
// Default values of Signaling Parameters for SAR registers
//
#define TBATM155_TRM_100MS         397     // UNI 4.0 default is 100 ms
#define TBATM155_NRM_32CELLS       4       // UNI 4.0 default is 32
#define TBATM155_ADTF_500MS        1988    // UNI 4.0 default is 500 ms



//////////////////////////////////////////////////////////////////////////
//																		
//                 Data Structures of SRAM tables
//
//////////////////////////////////////////////////////////////////////////



//
// 1 entry of Tx State Table structure
//     8 words/entry,  1 entry/VC
//
typedef struct _TBATM155_TX_STATE_ENTRY
{
   union       // word 0
   {
       struct
       {
           USHORT  prescal_val:4;
           USHORT  reserved1:4;
           USHORT  CLP:1;
           USHORT  RC:2;
           USHORT  ABS:1;
           USHORT  FM:1;
           USHORT  Tx_AAL5_SM:1;
           USHORT  chtype:2;
       };
       USHORT      data;
   }
       TxStateWord0;

   union       // word 1
   {
       struct
       {
           USHORT  credit:8;
           USHORT  prescal_count:4;
           USHORT  MPEG_count:2;
           USHORT  reserved2:2;
       };
       USHORT      data;
   }
       TxStateWord1;

   union       // word2
   {
       struct
       {
           USHORT  tx_AAL5_CRC_Low:16;
       };
       USHORT      data;
   }
       TxStateWord2;

   union       // word3
   {
       struct
       {
           USHORT  tx_AAL5_CRC_High:16;
       };
       USHORT      data;
   }
       TxStateWord3;

   union       // word4
   {
       struct
       {
           USHORT  tx_A_Slot_H:12;
           USHORT  Turn:1;
           USHORT  OR_BRM:1;
           USHORT  sch:1;
           USHORT  Active:1;
       };
       USHORT      data;
   }
       TxStateWord4;

   union       // word5
   {
       struct
       {
           USHORT  tx_A_Slot_T:12;
           USHORT  reserved3:4;
       };
       USHORT      data;
   }
       TxStateWord5;

   union       // word6
   {
       struct
       {
           USHORT  tx_Slot_Ptr:14;
           USHORT  Idle:1;
           USHORT  reserved4:1;
       };
       USHORT      data;
   }
       TxStateWord6;

   union       // word7
   {
       struct
       {
           USHORT  VC_link:12;
           USHORT  reserved5:4;
       };
       USHORT      data;
   }
       TxStateWord7;

}
   TBATM155_TX_STATE_ENTRY,
   *PTBATM155_TX_STATE_ENTRY;



//
// Structure of Rx State structure
//     8 words/entry,  1 entry/VC
//
typedef    struct  _TBATM155_RX_STATE_ENTRY
{
   union       // word 0
   {
       struct
       {
           USHORT  Slots_Consumed:8;
           USHORT  Slot_Type:2;
           USHORT  Rx_AAL5_SM:1;
           USHORT  Cell_loss:1;
           USHORT  Congestion:1;
           USHORT  Open:1;
           USHORT  Drop:1;
           USHORT  CRC10_En:1;
       };
       USHORT      data;
   }
       RxStateWord0;

   union       // word 1
   {
       struct
       {
           USHORT  AAL5_Length:16;
       };
       USHORT      data;
   }
       RxStateWord1;

   union       // word2
   {
       struct
       {
           USHORT  AAL5_Slot_Address_Low:16;
       };
       USHORT      data;
   }
       RxStateWord2;

   union       // word3
   {
       struct
       {
           USHORT  AAL5_Slot_Address_High:16;
       };
       USHORT      data;
   }
       RxStateWord3;

   union       // word4
   {
       struct
       {
           USHORT  Rx_AAL5_CRC_Low:16;
       };
       USHORT      data;
   }
       RxStateWord4;

   union       // word5
   {
       struct
       {
           USHORT  Rx_AAL5_CRC_High:16;
       };
       USHORT      data;
   }
       RxStateWord5;

   union       // word6
   {
       struct
       {
           USHORT  Slot_ptr:13;
           USHORT  reserved1:3;
       };
       USHORT      data;
   }
       RxStateWord6;

   union       // word7
   {
       struct
       {
           USHORT  Ack_count:8;
           USHORT  Ex_RATO:4;
           USHORT  FM:1;
           USHORT  Or_CLP:1;
           USHORT  Or_CI:1;
           USHORT  In_AAL5_pkt:1;
       };
       USHORT      data;
   }
       RxStateWord7;

}
   TBATM155_RX_STATE_ENTRY,
   *PTBATM155_RX_STATE_ENTRY;




//
// structure of Tx Slot Descriptor
//   4 words/entry,  1 entry/VC
//
typedef    struct  _TBATM155_TX_SLOT_DESC
{
   union       // word 0
   {
       struct
       {
           USHORT  Link:12;
           USHORT  Mgmt:1;
           USHORT  Idle:1;
           USHORT  Raw:1;
           USHORT  reserved1:1;
       };
       USHORT      data;
   }
       TxSlotDescWord0;

   union       // word 1
   {
       struct
       {
           USHORT  Slot_size:14;
           USHORT  EOP:1;
           USHORT  CRC10_En:1;
       };
       USHORT      data;
   }
       TxSlotDescWord1;

   union       // word2
   {
       struct
       {
           USHORT  Base_Address_Low:16;
       };
       USHORT      data;
   }
       TxSlotDescWord2;

   union       // word3
   {
       struct
       {
           USHORT  Base_Address_High:16;
       };
       USHORT      data;
   }
       TxSlotDescWord3;

}
   TBATM155_TX_SLOT_DESC,
   *PTBATM155_TX_SLOT_DESC;


//