sw.h

网络驱动开发

// **********************************************************************
typedef struct _ALLOCATION_MAP {

   PVOID                 AllocVa;       // virtual address of the memory block allocated to the structure
   NDIS_PHYSICAL_ADDRESS AllocPa;       // physical address of the memory block allocated to the structure
   ULONG                 AllocSize;     // size of the allocated block

   PVOID                 Va;            // virtual address of the aligned structure
   ULONG                 Pa;            // physical address of the aligned structure
   ULONG                 Size;          // size of the structure
   PNDIS_BUFFER          FlushBuffer;   // NDIS Flush Buffer

} ALLOCATION_MAP,*PALLOCATION_MAP;



//
//	Transmit Segmentation Information.
//
//		This is allocated for each segmentation channel.  This structure 
//     contains all of the information, e.g. buffers, size, etc....
//

typedef struct _XMIT_SEG_INFO
{
   PADAPTER_BLOCK          Adapter;                //	Pointer to the adapter.
   
   //
   //	Queue of packets that are waiting for segmentation resources.
   //
   PACKET_QUEUE            SegWait;

   //
   //	List of packets that are awaiting DMA completion interrupt per-VC.
   //
   PACKET_QUEUE            DmaCompleting;
   MAP_REGISTER_QUEUE      InUseMapRegisterQ;

   //
   //	Copy of the 155 PCI SAR transmit pending slot register. This is the
   //  initial set of the register.
   //
   TX_PENDING_SLOTS_CTL	InitXmitSlotDesc;
   TBATM155_TX_STATE_ENTRY InitXmitState;

   //
   //	Pointer to the entry of Tx state table.
   //
   ULONG                   pEntryOfXmitState;

   //
   //	Number of Bytes queued on the channel.
   //
   UINT                    XmitPduBytes;

   //
   //	Handle for the flush buffers associated with the pool.
   //
   NDIS_HANDLE             hFlushBufferPool;

   //
   //  Max Transmit Buffer Index;
   //
   //
   UCHAR                   PadTrailerBufferIndex;

   //
   //  Number of PadTrailerBurffer are free.
   //
   UCHAR                   FreePadTrailerBuffers;

   //
   //  Number of PadTrailerBurffer are current used or going to be used
   //  in the Dmawait queue.
   //
   UCHAR                   BeOrBeingUsedPadTrailerBufs;

   //
   //	Buffers for Padding+Trailer for AAL5 packets.
   //
   ALLOCATION_MAP          PadTrailerBuffers[TBATM155_MAX_PADTRAILER_BUFFERS];

   //
   //	Flags for the transmit segmentation channel.
   //
   ULONG                   flags;

   //
   //	Spin lock for this structure.
   //
   NDIS_SPIN_LOCK          lock;

   //
   //  These units are used as a record when the allocated memory needs to
   //  be free.
   //
   PVOID                   Va;
   NDIS_PHYSICAL_ADDRESS   Pa;
   ULONG                   Size;
   PTRANSMIT_CONTEXT       pTransmitContext;
   
}  
   XMIT_SEG_INFO,
   *PXMIT_SEG_INFO;


//
// minimum tx slot requied per packet
//
#define MIN_SLOTS_REQUIED_PER_PACKET   2


//
// Flags to indicate the usages of allocated shared memory in XmitSegInfo.
//
#define fXSC_XMIT_SEGMENT_RESERVED	0x00000001
#define fXSC_XMIT_SEGMENT_LOCKED	0x00000002
#define fXSC_XMIT_SEGMENT_INUSE    (fXSC_XMIT_SEGMENT_RESERVED + fXSC_XMIT_SEGMENT_LOCKED)

#define XSC_TEST_FLAG(_xsc, _f)	(((_xsc)->flags & (_f)) == (_f))
#define XSC_SET_FLAG(_xsc, _f)		((_xsc)->flags |= (_f))
#define XSC_CLEAR_FLAG(_xsc, _f)	((_xsc)->flags &= ~(_f))


#define XSC_LOCK_SEGMENT(_xsc, _L)                         \
{                                                          \
	if (XSC_TEST_FLAG((_xsc), fXSC_XMIT_SEGMENT_INUSE))     \
	{                                                       \
		(_L) = FALSE;                                       \
	}                                                       \
	else                                                    \
	{                                                       \
		(_L) = TRUE;                                        \
		XSC_SET_FLAG((_xsc), fXSC_XMIT_SEGMENT_RESERVED);	\
	}                                                       \
}

#define XSC_UNLOCK_SEGMENT(_xsc, _L)                       \
{                                                          \
	if ((_L))                                               \
	{                                                       \
       XSC_CLEAR_FLAG((_xsc), fXSC_XMIT_SEGMENT_INUSE);    \
	}														\
}


//
//	The following is the format of the reserved section of a send packet
//	that is awaiting segmentation.
// For packets sent onto the network by the miniport, the MiniportReserved
// in NDIS_PACKET, consists of 12 bytes.
//
typedef struct _PACKET_RESERVED
{
	//
	//	Used for queueing the packet.
	//
	PNDIS_PACKET	Next;

	//
	//	Amount of padding bytes are needed by the packet.
	//
	UCHAR			PaddingBytesNeeded;

	//
	//	This is the index of PadTrailerBuffer that was used for padding
   //  and trailer	in this AAL5 packet.
   //  The value 0 will be set for no Map Registers used.
	//
	UCHAR			NumOfUsedMapRegisters;

	//
	//	Number of DMA queue entries used by the packet.
	//
	UCHAR			PhysicalBufferCount;

	//
	//	This is the index of PadTrailerBuffer that was used for padding
   //  and trailer	in this AAL5 packet.
   //  The value 0xFF will be used for a non-AAL5 packet.
	//
	UCHAR			PadTrailerBufIndexInUse;

	//
	//	Vc the packet belongs on.
	//
	PVC_BLOCK		pVc;
}
	PACKET_RESERVED,
	*PPACKET_RESERVED;

#define PACKET_RESERVED_FROM_PACKET(_Pkt)		((PPACKET_RESERVED)((_Pkt)->MiniportReservedEx))


//
//	The following is the format of the reserved section of a receive packet.
// For packets received by the miniport and indicated up to higher level,
// the miniport can use only 8 bytes of this array.
//
typedef struct _RECV_PACKET_RESERVED
{
	PNDIS_PACKET		Next;
	PRECV_BUFFER_HEADER	RecvHeader;
}
	RECV_PACKET_RESERVED,
	*PRECV_PACKET_RESERVED;

#define RECV_PACKET_RESERVED_FROM_PACKET(_Pkt)		((PRECV_PACKET_RESERVED)((_Pkt)->MiniportReserved))

//
//	The following enumeration contains the possible registry parameters.
//
typedef enum _TBATM155_REGISTRY_ENTRY
{
   TbAtm155VcHashTableSize = 0,
   TbAtm155TotalRxBuffs,
   TbAtm155BigReceiveBufferSize,
   TbAtm155SmallReceiveBufferSize,
   TbAtm155NumberOfMapRegisters,
   TbAtm155MaxRegistryEntry
}
   TBATM155_REGISTRY_ENTRY;


//
//	The following structure is used to keep track of registry
//	parameters temporarily.
//
typedef struct	_TBATM155_REGISTRY_PARAMETER
{
   BOOLEAN fPresent;
   ULONG   Value;
}
   TBATM155_REGISTRY_PARAMETER,
   *PTBATM155_REGISTRY_PARAMETER;


typedef struct _HARDWARE_INFO
{
   //
   //	Flags information on the HARDWARE_INFO structure.
   //
   ULONG           Flags;
   NDIS_SPIN_LOCK  Lock;

   //
   //	Interrupt information.
   //
   ULONG                   InterruptLevel;
   ULONG                   InterruptVector;
   NDIS_MINIPORT_INTERRUPT Interrupt;
   ULONG                   InterruptMask;
   ULONG                   InterruptStatus;
   
   //
   //	I/O port information.
   //
   PVOID                   PortOffset;
   UINT                    InitialPort;
   ULONG                   NumberOfPorts;

   //
   //	Memory mapped I/O space information.
   //
   NDIS_PHYSICAL_ADDRESS   PhysicalIoSpace;
   PUCHAR                  VirtualIoSpace;
   ULONG                   IoSpaceLength;

   ULONG           CellClockRate;  //  Rate of the cell clock.  This is used
                                   //  in determining cell rate.
   
   ///
   //	The following are I/O space memory offsets and sizes.
   //	NOTE:
   //		The following offsets are from the PciFCode pointer.
   ///
   ULONG           Phy;            //  Mapped pointer to the PHY registers.

   UCHAR           LedVal;         //  Led control value

#if DBG_USING_LED
   UCHAR           dbgLedVal;      //  debugging Led value
#endif // end of DBG_USING_LED

   //
   // Use this variable to verify if SAR is xferring data for LED handling.
   //
   ULONG           PrevTxReportPa;         
   ULONG           PrevRxReportPa;         

	PTBATM155_SAR   TbAtm155_SAR;	//  Mapped pointer to the SAR registers.

	PUCHAR	        PciConfigSpace;	//  Mapped ptr to the PCI configuration space.

	PSAR_INFO	    SarInfo;        //	Pointer to the sar information.

	UCHAR	        fAdapterHw;     //  Adapter's configuration.
	USHORT	        NumOfVCs;       //  Number of VCs supported
	UINT	        MaxIdxOfRxReportQ;  //  Number of VCs supported
	UINT	        MaxIdxOfTxReportQ;  //  Number of VCs supported

   //
   //  Setup Some of common used SRAM tables
   //
	PVOID	        pSramAddrTbl;           // Pointer of SRAM address table.
	ULONG	        pSramRxAAL5SmallFsFIFo; // Point to Rx AAL5 Small FS List
	ULONG	        pSramRxAAL5BigFsFIFo;   // Point to Rx AAL5 Big FS List
	ULONG	        pSramTxVcStateTbl;      // Point to Tx VC State Descriptors
	ULONG	        pSramRxVcStateTbl;      // Point to Tx VC State Descriptors
	ULONG	        pSramAbrValueTbl;       // Point to ABR value table.
	ULONG	        pABR_Parameter_Tbl;     // Point to ABR parameter table.
	ULONG	        pSramCbrScheduleTbl_1;  // Point to CBR schedule table 1.
	ULONG	        pSramCbrScheduleTbl_2;  // Point to CBR schedule table 2.

	//
	//	address of the adapter.
	//
	UCHAR	        PermanentAddress[ATM_ADDRESS_LENGTH];
	UCHAR	        StationAddress[ATM_ADDRESS_LENGTH];

};

//
//	Macros for flag manipulation.
//
#define HW_TEST_FLAG(x, f)         (((x)->Flags & (f)) == (f))
#define HW_SET_FLAG(x, f)          ((x)->Flags |= (f))
#define HW_CLEAR_FLAG(x, f)        ((x)->Flags &= ~(f))


//
//	Flag definitions.
//
#define fHARDWARE_INFO_INTERRUPT_REGISTERED	0x00000001
#define fHARDWARE_INFO_INTERRUPTS_DISABLED		0x00000002

//
//	This structure contains statistics.
//
typedef struct _TBATM155_STATISTICS_INFO
{
   ULONG   XmitPdusOk;
   ULONG   XmitPdusError;
   ULONG   RecvPdusOk;
   ULONG   RecvPdusError;
   ULONG   RecvPdusNoBuffer;
   ULONG   RecvCrcError;
   ULONG   RecvCellsOk;
   ULONG   XmitCellsOk;
   ULONG   RecvCellsDropped;
   ULONG   RecvInvalidVpiVci;
   ULONG   RecvReassemblyErr;
}
   TBATM155_STATISTICS_INFO,
   *PTBATM155_STATISTICS_INFO;

#define MAX_NUM_RX_SLOT_QUEUES         3
#define MAX_NUM_TX_SLOT_QUEUES         1

#define TBATM155_MIN_QUEUE_ALIGNMENT	64

#define MIN_INDEX_TX_REPORT_QUEUE      0
#define MIN_INDEX_RX_REPORT_QUEUE      0


//
// This structure and definitions are for Tx report queue.
//
typedef    union   _TX_REPORT_QUEUE_ENTRY
{
   struct  
	{
	    ULONG	Own:1;                  // the least significant bit
       ULONG	reserved:3;
       ULONG	VC:12;
	}
       TxReportQDWord;

	ULONG	TxReportQueueEntry;
}
   TX_REPORT_QUEUE_ENTRY,
   *PTX_REPORT_QUEUE_ENTRY;


typedef	struct	_TX_REPORT_QUEUE
{
   PTX_REPORT_QUEUE_ENTRY  TxReportQptrVa;
	NDIS_PHYSICAL_ADDRESS   TxReportQptrPa;     // point to starting of Tx report queue.
   ALLOCATION_INFO;
}
   TX_REPORT_QUEUE,
   *PTX_REPORT_QUEUE;


//