syslib.c

博创PXA270－S开发箱的VxWorks BSP驱动（含注释）

/* sysLib.c - pxa270 for XSCALE system-dependent library */

/* Copyright 2002 Wind River Systems, Inc. */

#include "copyright_wrs.h"

/*
TODO -  Remove the pxa270 modification history and begin a new history
        starting with version 01a and growing the history upward with
        each revision.

modification history
--------------------
01a,21may02,scm  written.
*/

/*
   TODO - Fill in this file with I/O addresses and related constants for the
          pxa270 BSP. Anything with "pxa270" as a prefix needs to examined 
          and re-named to id the BSP (i.e. iq80321, iq80310, etc.) 
*/

/*
DESCRIPTION
This library provides board-specific routines.  The chip drivers included are:

    nullNvRam.c - byte-oriented generic non-volatile RAM library
    nullVme.c - byte-oriented generic non-volatile RAM library
    sysIntrCtl.c - pxa270 interrrupt controller device
    sysTimer.c - pxa270 timer controller device

INCLUDE FILES: sysLib.h

SEE ALSO:
.pG "Configuration"
*/

/* includes */

#include "vxWorks.h"
#include "config.h"

#include "stdio.h"
#include "usrLib.h"
#include "sysLib.h"
#include "string.h"
#include "intLib.h"
#include "taskLib.h"
#include "vxLib.h"

#include "logLib.h"
#include "errnoLib.h"

#include "bootLib.h"
#include "vme.h"
#include "in.h"
#include "memLib.h"
#include "cacheLib.h"
#include "arch/arm/mmuArmLib.h"
#include "private/vmLibP.h"

/* Source Drivers */
#ifdef INCLUDE_FLASH
#include "mem/flashMem.c"
#include "mem/nvRamToFlash.c"
#else
#include "mem/nullNvRam.c"
#endif /* INCLUDE_FLASH */

#include "vme/nullVme.c"

#include "sysIntrCtl.c"
#include "sysTimer.c"

#ifdef INCLUDE_SERIAL
#include "sysSerial.c"
#endif

#ifdef INCLUDE_PCI
#include "sysPci.c"
#ifdef INCLUDE_PCI_AUTOCONF
#include "sysPciAutoConfig.c"
#endif /* INCLUDE_PCI_AUTOCONF */

#ifdef INCLUDE_END
 #ifdef INCLUDE_GEI_END
  #include "sysGei82544End.c"
 #endif /* INCLUDE_GEI_END */
 #ifdef INCLUDE_FEI_END
   #include "sysFei82557End.c"
 #endif /* INCLUDE_FEI_END */
#endif

/* test routines */
void sysPciProbe (void);
UINT32 pciCfgRd (UINT8 nDevNo, UINT8 nRegNo);

/* system PCI support routines */
void sysInitATU (void);
#endif

/* retrieve auto-sized memory */
extern UINT32 sysPhysMemSize ();

void *  cacheDmaXMalloc (size_t bytes);

#ifdef INCLUDE_PCI
#ifdef INCLUDE_END
/* find a device using its string name */
extern END_OBJ* endFindByName (char* pName, int unit);
#endif
#endif

/* externals */
IMPORT char end;                            /* end of system, created by ld */

IMPORT VOIDFUNCPTR _func_armIntStackSplit;  /* ptr to fn to split stack */

/*
 * TODO - flush out interrupt routines in sysIntrCtl.c
 */ 
IMPORT int pxa270IntDevInit(void);
IMPORT STATUS pxa270IntLvlEnable (int);
IMPORT STATUS pxa270IntLvlDisable (int);

IMPORT void sysIntStackSplit (char *, long);

IMPORT void sysDisable_Reload_TMR1 (void);
IMPORT UINT32 sysRead_TCS_TMR1(void);

/* globals */
/*
 * sysPhysMemDesc[] is used to initialize the Page Table Entry (PTE) array
 * used by the MMU to translate addresses with single page (4k) granularity.
 *
 * Address translations for local RAM, memory mapped PCI bus, memory mapped
 * VME A16 space and local PROM/FLASH are set here.
 *
 * PTEs are held, strangely enough, in a Page Table.  Page Table sizes are
 * integer powers of two based on amount of memory to be mapped and a
 * minimum size of 64 kbytes.  The MINIMUM recommended Page Table sizes
 * for 32-bit PowerPCs are:
 *
 * Total mapped memory          Page Table size
 * -------------------          ---------------
 *        8 Meg                      64 K
 *       16 Meg                     128 K
 *       32 Meg                     256 K
 *       64 Meg                     512 K
 *      128 Meg                       1 Meg
 *      .                               .
 *      .                               .
 *      .                               .
 *
 * The following structure describes the various different parts of the
 * memory map to be used only during initialisation by
 * vm(Base)GlobalMapInit() when INCLUDE_MMU_BASIC or INCLUDE_MMU_FULL are
 * defined.
 *
 * The following are not the smallest areas that could be allocated for a
 * working system.  If the amount of memory used by the page tables is
 * critical, they could be reduced.
 */

/* TODO - re-define according to pxa270 memory map */

PHYS_MEM_DESC sysPhysMemDesc [] =
    {
/*
 * some sections conditionally removed because they are currently not necessary,
 * and to reduce the delay at startup...
 */
  { /* Init Boot Code From Flash Bank 1 */
    (void *) 0x10000000,        /* virtual address */
    (void *) 0x10000000,        /* physical address */
    SZ_4K,                                    /* length, then initial state: */
    VM_STATE_MASK_VALID | VM_STATE_MASK_WRITABLE | VM_STATE_MASK_CACHEABLE | VM_STATE_MASK_BUFFERABLE,
    VM_STATE_VALID      | VM_STATE_WRITABLE      | VM_STATE_CACHEABLE_NOT  | VM_STATE_BUFFERABLE_NOT
    },
    #if 0
    { /* Init Boot Code From Flash Bank 1 */
    (void *) pxa270_BOOT_FLASH_ADDR,        /* virtual address */
    (void *) pxa270_SDRAM_BASE_ADDR,        /* physical address */
    SZ_4K,                                    /* length, then initial state: */
    VM_STATE_MASK_VALID | VM_STATE_MASK_WRITABLE | VM_STATE_MASK_CACHEABLE | VM_STATE_MASK_BUFFERABLE,
    VM_STATE_VALID      | VM_STATE_WRITABLE      | VM_STATE_CACHEABLE_NOT  | VM_STATE_BUFFERABLE_NOT
    },

    /*
     * TODO: Add additional mappings as needed to support special PCI
     * functions like memory mapped configuration space, or special IACK
     * register space.
     */

    { /* SDRAM -cacheable */
    (void *) pxa270_SDRAM_BASE_ADDR,        /* virtual address */
    (void *) pxa270_SDRAM_BASE_ADDR,        /* physical address */
    SZ_64M,                                  /* length, then initial state: */
    VM_STATE_MASK_VALID | VM_STATE_MASK_WRITABLE | VM_STATE_MASK_CACHEABLE,
    VM_STATE_VALID      | VM_STATE_WRITABLE      | VM_STATE_CACHEABLE
    },
    #endif
};

int sysPhysMemDescNumEnt = NELEMENTS (sysPhysMemDesc);

int  sysCpu = CPU;                   /* system CPU type */
char sysBootHost [BOOT_FIELD_LEN];   /* name of host from which we booted */
char sysBootFile [BOOT_FIELD_LEN];   /* name of file from which we booted */
int  sysFlags;                       /* boot flags */

int sysProcNum = 0;                  /* processor number of this CPU */
char *sysBootLine = BOOT_LINE_ADRS;  /* address of boot line */

/* Area used to flush D-cache */
UINT32 sysCacheFlushReadArea[D_CACHE_SIZE/sizeof(UINT32)];

/* Area used to flush mini-cache */
UINT32 sysMinicacheFlushReadArea[MINI_CACHE_SIZE/sizeof(UINT32)];

char *sysExcMsg   = EXC_MSG_ADRS;    /* catastrophic message area */

/*** Init Routines ***/

/* TODO - Flush out VirtToPhys and PhysToVirt pxa270 routines */

/******************************************************************************
*
* pxa270_VirtToPhys - translate a virtual address to a physical address
*
* NOTE: This routine is dependent on the sysPhysMemDesc, if the one to one
*       mapping changes these routine will need modification...
*
*       The first 4K requires remapping in the form of:
*          return virtAddr - pxa270_BOOT_FLASH_ADDR + pxa270_SDRAM_BASE_ADDR 
*       since pxa270_BOOT_FLASH_ADDR = 0, it becomes:
*          return virtAddr + pxa270_SDRAM_BASE_ADDR
*
* RETURNS: virtual address translated
*/

void * pxa270_VirtToPhys 
    (
    void *      virtAddr        /* virtual address to be translated */
    )
    {

    if (virtAddr >= (void *)SZ_4K) /* we have a one-to-one mapping */
      return virtAddr;
    else
      return (void *)((UINT)virtAddr + (UINT)pxa270_SDRAM_BASE_ADDR);

    }

/******************************************************************************
*
* pxa270_PhysToVirt - translate a physical address to a virtual address
*
* NOTE: This routine is dependent on the sysPhysMemDesc, if the one to one
*       mapping changes these routine will need modification...
*
*       The first 4K requires remapping in the form of:
*          return physAddr - pxa270_SDRAM_BASE_ADDR + pxa270_BOOT_FLASH_ADDR
*       since pxa270_BOOT_FLASH_ADDR = 0, it becomes:
*          return physAddr - pxa270_SDRAM_BASE_ADDR
*
* RETURNS: physical address translated
*/

void * pxa270_PhysToVirt
    (
    void *      physAddr        /* physical address to be translated */
    )
    {

    if (physAddr >= (void *)SZ_4K) /* we have a one-to-one mapping */
      return physAddr;
    else
      return (void *)((UINT)physAddr - (UINT)pxa270_SDRAM_BASE_ADDR);

    }

/******************************************************************************
*
* sysHwInit0 - Intialize _func_armVirtToPhys before sysHwInit is called
*
* This function initialized _func_armVirtToPhys and _func_armPhysToVirt
* before sysHwInit is called. It is called from usrInit in bootConfig.c
* before cacheLibInit is called.
*
* RETURNS: N/A
*/

/* TODO - Flush out VirtToPhys and PhysToVirt pxa270 routines */

void sysHwInit0()
    {
/* TODO - If auto-sizing is possible, define in config.h */
#ifdef LOCAL_MEM_AUTOSIZE
    int i;
#endif

#if defined(INCLUDE_CACHE_SUPPORT) || defined(INCLUDE_MMU)
    /*
     * Install the appropriate cache libary, using the our
     * address translation routines.
     */
    cacheArmXSCALELibInstall(pxa270_PhysToVirt, pxa270_VirtToPhys);
#endif

#ifdef INCLUDE_MMU
    /* Install the appropriate MMU library and translation routines */
    mmuArmXSCALELibInstall (pxa270_PhysToVirt, pxa270_VirtToPhys);
#endif /* INCLUDE_MMU */

#ifdef LOCAL_MEM_AUTOSIZE
    for (i = 0; i < sysPhysMemDescNumEnt; i++)
        {
        if ((sysPhysMemDesc[i].virtualAddr == (void *) pxa270_SDRAM_BASE_ADDR) &&
            (sysPhysMemDesc[i].physicalAddr == (void *) pxa270_SDRAM_BASE_ADDR))
                    sysPhysMemDesc[i].len = sysPhysMemSize();
        }
#endif
    }

/*
 * TODO - add initialization code for all devices and
 * for the interrupt controller.
 *
 * Note: the interrupt controller should mask all interrupts, 
 * Interrupts are unmasked later on a per-device basis...
 */

/*******************************************************************************
*
* sysHwInit - initialize the system hardware
*
* This routine initializes various features of the board.
* It is the first board-specific C code executed, and runs with
* interrupts masked in the processor.
*
* This routine resets all devices to a quiescent state, typically
* by calling driver initialization routines.
*
* NOTE: Because this routine will be called from sysToMonitor, it must
* shutdown all potential DMA master devices.  If a device is doing DMA
* at reboot time, the DMA could interfere with the reboot. For devices
* on non-local busses, this is easy if the bus reset or sysFail line can
* be asserted.
*
* NOTE: This routine should not be called directly by the user application.
*
* RETURNS: N/A
*/

void sysHwInit (void)
    {
    /* Call back from the kernel for Interrupt stack setup */
    _func_armIntStackSplit = sysIntStackSplit;

#ifdef INCLUDE_SERIAL
    /* initialize the serial devices */
    sysSerialHwInit ();
#endif
    }

/*
 * TODO - add initialization code for all devices and
 * for the interrupt controller.
 *
 * Note: the interrupt controller should mask all interrupts, 
 * Interrupts are unmasked later on a per-device basis...
 */

/*******************************************************************************
*
* sysHwInit2 - additional system configuration and initialisation
*
* This routine connects system interrupt vectors and configures any
* required features not configured by sysHwInit. It is called from usrRoot()
* in usrConfig.c after the multitasking kernel has started.
*
* RETURNS: N/A
*
* NOMANUAL
*/

void sysHwInit2 (void)
    {
    /* Allocate vector table and init handlers */
    intLibInit (pxa270_INT_NUM_LEVELS, pxa270_INT_MAX_LEVELS, pxa270_INT_MODE);

/*
 * TODO - flush out interrupt routines in sysIntrCtl.c
 */

    /* initialise the interrupt controller */
    pxa270IntDevInit ();

#ifdef INCLUDE_SERIAL
    /* connect serial interrupt */
    sysSerialHwInit2 (); 
#endif
/*sysGpio0Int();*/
#ifdef INCLUDE_PCI
    /* Initialize ATU */
    sysInitATU ();

    /* PCI Configuration LIbrary Initialization */
    sysPciInit();

#ifdef INCLUDE_SHOW_ROUTINES
    pciConfigShowInit();
#endif /* INCLUDE_SHOW_ROUTINES */

#ifdef INCLUDE_PCI_AUTOCONF
    /* Perform AutoConfig */
    sysPciAutoConfig();
#endif /* INCLUDE_PCI_AUTOCONF */

#ifdef INCLUDE_GEI_END
    /* map GEI Ethernet PCI device memory and I/O addresses */
    /* This must come after sysPciAutoConfig */
    sys543GeiInit ();
#endif /* INCLUDE_GEI_END */

#ifdef INCLUDE_FEI_END
    /* map FEI Ethernet PCI device memory and I/O addresses */
    sys557PciInit (); 
#endif /* INCLUDE_FEI_END */

    sysPciInit2();
#endif /* INCLUDE_PCI */
    }

STATUS sysEnetAddrGet
    (
    UINT8	unit,		/* FCC being used */
    UCHAR *     addr            /* where to copy the Ethernet address */
    )
    {
    char dm9kMac[6] = DM9000ERMAC;
    bcopy ((char *) dm9kMac, (char *) addr, sizeof (dm9kMac));
 
    return (OK);