pxa270.h

博创PXA270－S开发箱的VxWorks BSP驱动（含注释）

#define IRQ_SSP3	PXA_IRQ(0)	/* SSP3 service request */
#define IRQ_MSL		PXA_IRQ(1)	/* MSL Interface interrupt */
#define IRQ_USBH2	PXA_IRQ(2)	/* USB Host interrupt 1 (OHCI) */
#define IRQ_USBH1	PXA_IRQ(3)	/* USB Host interrupt 2 (non-OHCI) */
#define IRQ_KEYPAD	PXA_IRQ(4)	/* Key pad controller */
#define IRQ_MEMSTK	PXA_IRQ(5)	/* Memory Stick interrupt */
#define IRQ_PWRI2C	PXA_IRQ(6)	/* Power I2C interrupt */
#define IRQ_HWUART	PXA_IRQ(7)	/* HWUART Transmit/Receive/Error (PXA26x) */
#define IRQ_OST_4_11	PXA_IRQ(7)	/* OS timer 4-11 matches (PXA27x) */
#define	IRQ_GPIO0	PXA_IRQ(8)	/* GPIO0 Edge Detect */
#define	IRQ_GPIO1	PXA_IRQ(9)	/* GPIO1 Edge Detect */
#define	IRQ_GPIO_2_x	PXA_IRQ(10)	/* GPIO[2-x] Edge Detect */
#define	IRQ_USB		PXA_IRQ(11)	/* USB Service */
#define	IRQ_PMU		PXA_IRQ(12)	/* Performance Monitoring Unit */
#define	IRQ_I2S		PXA_IRQ(13)	/* I2S Interrupt */
#define	IRQ_AC97	PXA_IRQ(14)	/* AC97 Interrupt */
#define IRQ_ASSP	PXA_IRQ(15)	/* Audio SSP Service Request (PXA25x) */
#define IRQ_USIM	PXA_IRQ(15)     /* Smart Card interface interrupt (PXA27x) */
#define IRQ_NSSP	PXA_IRQ(16)	/* Network SSP Service Request (PXA25x) */
#define IRQ_SSP2	PXA_IRQ(16)	/* SSP2 interrupt (PXA27x) */
#define	IRQ_LCD		PXA_IRQ(17)	/* LCD Controller Service Request */
#define	IRQ_I2C		PXA_IRQ(18)	/* I2C Service Request */
#define	IRQ_ICP		PXA_IRQ(19)	/* ICP Transmit/Receive/Error */
#define	IRQ_STUART	PXA_IRQ(20)	/* STUART Transmit/Receive/Error */
#define	IRQ_BTUART	PXA_IRQ(21)	/* BTUART Transmit/Receive/Error */
#define	IRQ_FFUART	PXA_IRQ(22)	/* FFUART Transmit/Receive/Error*/
#define	IRQ_MMC		PXA_IRQ(23)	/* MMC Status/Error Detection */
#define	IRQ_SSP		PXA_IRQ(24)	/* SSP Service Request */
#define	IRQ_DMA 	PXA_IRQ(25)	/* DMA Channel Service Request */
#define	IRQ_OST0 	PXA_IRQ(26)	/* OS Timer match 0 */
#define	IRQ_OST1 	PXA_IRQ(27)	/* OS Timer match 1 */
#define	IRQ_OST2 	PXA_IRQ(28)	/* OS Timer match 2 */
#define	IRQ_OST3 	PXA_IRQ(29)	/* OS Timer match 3 */
#define	IRQ_RTC1Hz	PXA_IRQ(30)	/* RTC HZ Clock Tick */
#define	IRQ_RTCAlrm	PXA_IRQ(31)	/* RTC Alarm */

#define IRQ_TPM		PXA_IRQ(32)	/* TPM interrupt */
#define IRQ_CAMERA	PXA_IRQ(33)	/* Camera Interface */

#define PXA_INTERNAL_IRQS 34

#define IRQ_DM9k   PXA_INTERNAL_IRQS+4

/*-------------------------------------------------------------
 * pxa270 Interrupt Controller and General Purpose I/O Unit...
 * ------------------------------------------------------------*/
#define pxa270_INT_NUM_LEVELS           (PXA_INTERNAL_IRQS+32)
#define pxa270_INT_MAX_LEVELS           (PXA_INTERNAL_IRQS+32)
#define pxa270_INT_MODE                 INT_NON_PREEMPT_MODEL

/* PCI Interrupt Routing Select Register */
#if 1
#define pxa270_PIRSR_REG                 0xdeadbeef

#define pxa270_RESERVED_INT_MSK         (0xFFFFFFFF)

/* Interrupt Bit Positions */
/* Timer Interrupts */
#define pxa270_INT_TMR0                 (26)
#define pxa270_INT_TMR1                 (27)

/* External Interrupts */
/* typically assigned to PCI, UART, secondary slot, etc. */
#define pxa270_INT_XINT0                (00)
#define pxa270_INT_XINT1                (00)
#define pxa270_INT_XINT2                (00)
#define pxa270_INT_XINT3                (00)

#define pxa270_MASK_ALL_INT             (0x00000000)
#endif
/*-------------------------------------------------------------
 * pxa270 Core and Core Performance Monitoring...
 * ------------------------------------------------------------*/

/*=============================================================
 * pxa270 Development Board Specific Defines...
 * ============================================================*/

/*-------------------------------------------------------------
 * pxa270 Memory Controller...
 * ------------------------------------------------------------*/

/* 
 * TODO - Change sizes accordingly...
 */

/* DRAM Starting Address */
#define pxa270_SDRAM_BASE_ADDR           LOCAL_MEM_LOCAL_ADRS /* SDRAM Address */
#define pxa270_SDRAM_BASE_SIZE           SZ_64M              /* SDRAM 128 MB Default */
#define pxa270_SDRAM_BANK_SIZE           SZ_64M                /* SDRAM 8 MB    */

/* Boot Flash */
#define pxa270_BOOT_FLASH_ADDR           0x00000000
#define pxa270_BOOT_FLASH_SIZE           SZ_16M

/* defaults for LOCAL_MEM_AUTOSIZE */
#define pxa270_SDRAM_FIXED_SIZE          pxa270_SDRAM_BASE_SIZE /* Size is in MB, 128M */
#define pxa270_SDRAM_BANK0_SIZE          SZ_64M                  /* bank size in megabytes */
#define pxa270_SDRAM_BANK1_SIZE          0                        /* bank size in megabytes */
#define pxa270_SDRAM_FIXED_WIDTH         0x20                      /* 8 bit memory */
#define pxa270_SDRAM_DIMM_COUNT          0x1                      /* DIMM count (1 or 2) */

/*-------------------------------------------------------------
 * pxa270 UARTs...
 * ------------------------------------------------------------*/

/* UART 0 base address */
#define pxa270_UART0_REG                 0x40100000 

#ifdef SECOND_UART
/* UART 1 base address */
#define pxa270_UART1_REG                 0x40200000
#endif

/* UART Clock frequency (for both) */
#define pxa270_UART_XTAL                 14745600 

/* Byte space between registers */
#define pxa270_UART_REG_DELTA            4

/* Two UARTs in this board */
#ifdef SECOND_UART
#define pxa270_UART_N_UARTS              2
#else
#define pxa270_UART_N_UARTS              1
#endif

#ifdef INCLUDE_HEX_LED
/*-------------------------------------------------------------
 * pxa270 7 Segment LED...
 * ------------------------------------------------------------*/

/**  0-On, 1-Off  **/
/*
          A1/2
          Bit 7
        ---------
       |        |
 F1/2  |        | B1/2
 Bit 2 |        | Bit 6
       | G1/2   |
       | Bit 1  |
        ---------
       |        |
 E1/2  |        | C1/2
 Bit 3 |        | Bit 5
       | D1/2   |
       | Bit 4  |       DP1/2
        ---------     * Bit 0 (dot)
*/

/* 
 * TODO - Depending on Hex LED, these values will need modifications
 */

/** Numerals **/
#define L7SEG_0                           0x03    /* 0 */
#define L7SEG_1                           0x9f    /* 1 */
#define L7SEG_2                           0x25    /* 2 */
#define L7SEG_3                           0x0d    /* 3 */
#define L7SEG_4                           0x99    /* 4 */
#define L7SEG_5                           0x49    /* 5 */
#define L7SEG_6                           0x41    /* 6 */
#define L7SEG_7                           0x1f    /* 7 */
#define L7SEG_8                           0x01    /* 8 */
#define L7SEG_9                           0x19    /* 9 */

/** Alphas **/
#define L7SEG_A                           0x11    /* A */
#define L7SEG_B                           0xc1    /* b */
#define L7SEG_C                           0x63    /* C */
#define L7SEG_D                           0x85    /* D */
#define L7SEG_E                           0x61    /* E */
#define L7SEG_F                           0x71    /* F */
#define L7SEG_g                           0x09    /* g */
#define L7SEG_H                           0x91    /* H */
#define L7SEG_h                           0xd1    /* h */
#define L7SEG_i                           0xdf    /* i */
#define L7SEG_J                           0x8f    /* J */
#define L7SEG_L                           0xe3    /* L */
#define L7SEG_n                           0xd5    /* n */
#define L7SEG_o                           0xc5    /* o */
#define L7SEG_P                           0x31    /* P */
#define L7SEG_r                           0xf5    /* r */
#define L7SEG_S                           0x92    /* S */
#define L7SEG_U                           0x83    /* U */
#define L7SEG_u                           0xc7    /* u */

/** Segment On **/
#define L7SEG_Tp                          0x7f    /* top */
#define L7SEG_Tr                          0xbf    /* top right */
#define L7SEG_Br                          0xdf    /* bottom right */
#define L7SEG_Rs                          0x9f    /* right side */
#define L7SEG_Bm                          0x3f    /* bottom */
#define L7SEG_Bl                          0xf7    /* bootom left */
#define L7SEG_Tl                          0xfb    /* top left */
#define L7SEG_Ls                          0xf3    /* left side */
#define L7SEG_Md                          0xfd    /* middle */

#define L7SEG_Dot                         0xfe    /* dot */

#define L7SEG_ALL_ON                      0x00    /* 8.*/
#define L7SEG_ALL_OFF                     0xFF    /*   */

#ifdef INCLUDE_HEX_LED
/* 7 Segment Numeric LED base address */
#define pxa270_7SEG_LED_LSB_REG         0xdeadbeef

#ifdef SECOND_HEX_LED
#define pxa270_7SEG_LED_MSB_REG         0xdeadbeef
#endif
#endif

#endif

/*-------------------------------------------------------------
 * pxa270 Rotary Switch...
 * ------------------------------------------------------------*/

/* Rotary Switch base address */
#define pxa270_ROTSW_REG                0xdeadbeef 

/*-------------------------------------------------------------
 * pxa270 Battery Status...
 * ------------------------------------------------------------*/

/* Battery Status base address */
#define pxa270_BATSTAT_REG              0x40f00004 

#ifdef __cplusplus
}
#endif

#endif  /* INCpxa270h */