ethernet_main.c

COLDFIRE 5275板极初始化程序

/*
 * File:		ethernet_main.c
 * Purpose:		Test the Ethernet port on the M5275EVB
 *
 * Notes:		Requires loopback ethernet cable.
 *			    Buffers use SDRAM so cannot run from SDRAM
 */

#include "ethernet_main.h"


void main (void)
{
	ethernet0_example();
	ethernet1_example();
}


void ethernet0_example(void)
{
	uint32 i;
	NBUF *pNbuf;
	
	printf("Ethernet 0 Start\n");

	/* 
	 * Initialize PAR to enable Ethernet signals 
	 */
	MCF_GPIO_PAR_FECI2C = 0x0FA0;
	MCF_GPIO_PAR_FEC0HL = 0xC0;
	MCF_GPIO_PAR_FEC1HL = 0xC0;

	for(i=0;i<1000;i++);
	MCF_RCM_RCR = 0;
	for(i=0;i<1000;i++);


	TxNBUF = (NBUF *)((uint32)(unaligned_txbd + 16) & 0xFFFFFFF0);
	RxNBUF = (NBUF *)((uint32)(unaligned_rxbd + 16) & 0xFFFFFFF0);

	TxBuffer = (uint8 *)((uint32)(unaligned_txbuffer + 16) & 0xFFFFFFF0);
	RxBuffer = (uint8 *)((uint32)(unaligned_rxbuffer + 16) & 0xFFFFFFF0);

	/* Initialize receive descriptor ring */
	for (i = 0; i < NUM_RXBDS; i++)
	{
		RxNBUF[i].status = RX_BD_E;
		RxNBUF[i].length = 0;
		RxNBUF[i].data = &RxBuffer[i * RX_BUFFER_SIZE];
	}
	/* Set the Wrap bit on the last one in the ring */
	RxNBUF[NUM_RXBDS - 1].status |= RX_BD_W;

	/* Initialize transmit descriptor ring */
	for (i = 0; i < NUM_TXBDS; i++)
	{
		TxNBUF[i].status = TX_BD_L | TX_BD_TC;
		TxNBUF[i].length = 0;
		TxNBUF[i].data = &TxBuffer[i * TX_BUFFER_SIZE];
	}
	/* Set the Wrap bit on the last one in the ring */
	TxNBUF[NUM_TXBDS - 1].status |= TX_BD_W;
	
	/* Set the source address for the controller */
	MCF_FEC_PALR0 = 0x00CF5235;
	MCF_FEC_PAUR0 = 0xC3010000;
	
	MCF_FEC_IALR0 = 0x00000000; 
	MCF_FEC_IAUR0 = 0x00000000;
	
	MCF_FEC_GALR0 = 0x00000000;
	MCF_FEC_GAUR0 = 0x00000000;
	
	/* Set Receive Buffer Size */
	MCF_FEC_EMRBR0 = (uint16)RX_BUFFER_SIZE;

	/* Point to the start of the circular Rx buffer descriptor queue */
	MCF_FEC_ERDSR0 = (uint32)RxNBUF;

	/* Point to the start of the circular Tx buffer descriptor queue */
	MCF_FEC_ETDSR0 = (uint32)TxNBUF;

	/* full duplex */
	MCF_FEC_RCR0 = (0
	/*	| MCF_FEC_RCR_LOOP */
		| MCF_FEC_RCR_MAX_FL(1518) 
		| MCF_FEC_RCR_MII_MODE);
		
	
	/* Operate in full-duplex mode, no heart beat control */
	MCF_FEC_TCR0 = 0x0004;
	
	/* Set MII speed to be 2.5Mhz */
	MCF_FEC_MSCR0 = 0x001E;
	
	/* Grab buffer in ring */
	pNbuf = TxNBUF;
	
	/* Copy constant data into the data buffer */
	memcpy(pNbuf->data, packet, 64);
		
	/* Set the length of the packet */
	pNbuf->length = 64;
	
	/* Enable FEC */

	MCF_FEC_ECR0 |= MCF_FEC_ECR_ETHER_EN;
	
	/* Initialize the PHY */
	if((ks8721_init(FEC_CH0, FEC_PHYADDR1, MII_100BASE_TX, MII_FULL_DUPLEX))==0)
   	{
   		printf("Error in Eth0 Init\n");
   		return;
	}

	
	for (i = 0; i < NUM_RXBDS; i++)
	{
		RxNBUF[i].status = RX_BD_E;
		RxNBUF[i].length = 0;
		RxNBUF[i].data = &RxBuffer[i * RX_BUFFER_SIZE];
	}
	
	/* Set the Wrap bit on the last one in the ring */
	RxNBUF[NUM_RXBDS - 1].status |= RX_BD_W;
	
	/* Indicate Empty buffers have been produced */
	MCF_FEC_RDAR0 = MCF_FEC_RDAR_R_DES_ACTIVE;
		
	/* Mark packet as ready to send */ 
	pNbuf->status |= TX_BD_R;
	
	/* Indicate to FEC that transmit buffer is ready to send */
	MCF_FEC_TDAR0 = MCF_FEC_TDAR_X_DES_ACTIVE;

	
	for (i=0; i < 1000000; i++)
	{
		if (MCF_FEC_EIR0 & MCF_FEC_EIR_RXF) 
		{
			break;		
		}
	}
	
	if (i == 1000000)
	{
		/* Timed-out */
		printf("Eth0 Time Out\n");
		return;
	}	
	
	for (i = 0; i < 64; i++)
	{
		if (TxNBUF[0].data[i] != RxNBUF[0].data[i])
		{
			printf("Eth0 Data Mismatch\n");
			return;
		}
	}	

  printf("Ethernet 0 Finished\n");
  /* Ethernet0 Test passed */
}

/********************************************************************/
/********************************************************************/
void ethernet1_example(void)
{

	uint32 i;
	NBUF *pNbuf;
	
	printf("Ethernet 1 Start\n");

	/* 
	 * Initialize PAR to enable Ethernet signals 
	 */
	MCF_GPIO_PAR_FECI2C = 0x0FA0;
	MCF_GPIO_PAR_FEC0HL = 0xC0;
	MCF_GPIO_PAR_FEC1HL = 0xC0;


	TxNBUF = (NBUF *)((uint32)(unaligned_txbd + 16) & 0xFFFFFFF0);
	RxNBUF = (NBUF *)((uint32)(unaligned_rxbd + 16) & 0xFFFFFFF0);

	TxBuffer = (uint8 *)((uint32)(unaligned_txbuffer + 16) & 0xFFFFFFF0);
	RxBuffer = (uint8 *)((uint32)(unaligned_rxbuffer + 16) & 0xFFFFFFF0);

	/* Initialize receive descriptor ring */
	for (i = 0; i < NUM_RXBDS; i++)
	{
		RxNBUF[i].status = RX_BD_E;
		RxNBUF[i].length = 0;
		RxNBUF[i].data = &RxBuffer[i * RX_BUFFER_SIZE];
	}
	/* Set the Wrap bit on the last one in the ring */
	RxNBUF[NUM_RXBDS - 1].status |= RX_BD_W;

	/* Initialize transmit descriptor ring */
	for (i = 0; i < NUM_TXBDS; i++)
	{
		TxNBUF[i].status = TX_BD_L | TX_BD_TC;
		TxNBUF[i].length = 0;
		TxNBUF[i].data = &TxBuffer[i * TX_BUFFER_SIZE];
	}
	/* Set the Wrap bit on the last one in the ring */
	TxNBUF[NUM_TXBDS - 1].status |= TX_BD_W;
	
	/* Set the source address for the controller */
	MCF_FEC_PALR1 = 0x00CF5235;
	MCF_FEC_PAUR1 = 0xC3010000;
	
	MCF_FEC_IALR1 = 0x00000000; 
	MCF_FEC_IAUR1 = 0x00000000;
	
	MCF_FEC_GALR1 = 0x00000000;
	MCF_FEC_GAUR1 = 0x00000000;
	
	/* Set Receive Buffer Size */
	MCF_FEC_EMRBR1 = (uint16)RX_BUFFER_SIZE;

	/* Point to the start of the circular Rx buffer descriptor queue */
	MCF_FEC_ERDSR1 = (uint32)RxNBUF;

	/* Point to the start of the circular Tx buffer descriptor queue */
	MCF_FEC_ETDSR1 = (uint32)TxNBUF;

	/* full duplex */
	MCF_FEC_RCR1 = (0
	/*	| MCF_FEC_RCR_LOOP */
		| MCF_FEC_RCR_MAX_FL(1518) 
		| MCF_FEC_RCR_MII_MODE);		
	
	/* Operate in full-duplex mode, no heart beat control */
	MCF_FEC_TCR1 = 0x0004;
	
	/* Set MII speed to be 2.5Mhz */
	MCF_FEC_MSCR1 = 0x001E;
	
	/* Grab buffer in ring */
	pNbuf = TxNBUF;
	
	/* Copy constant data into the data buffer */
	memcpy(pNbuf->data, packet, 64);
		
	/* Set the length of the packet */
	pNbuf->length = 64;
	
	/* Enable FEC */

	MCF_FEC_ECR1 |= MCF_FEC_ECR_ETHER_EN;
	
	/* Initialize the PHY */
	if((ks8721_init(FEC_CH1, FEC_PHYADDR1, MII_100BASE_TX, MII_FULL_DUPLEX))==0)
   	{
   		printf("Error in Eth1 Init\n");
   		return;
	}

	for (i = 0; i < NUM_RXBDS; i++)
	{
		RxNBUF[i].status = RX_BD_E;
		RxNBUF[i].length = 0;
		RxNBUF[i].data = &RxBuffer[i * RX_BUFFER_SIZE];
	}
	
	/* Set the Wrap bit on the last one in the ring */
	RxNBUF[NUM_RXBDS - 1].status |= RX_BD_W;
	
	/* Indicate Empty buffers have been produced */
	MCF_FEC_RDAR1 = MCF_FEC_RDAR_R_DES_ACTIVE;
		
	/* Mark packet as ready to send */ 
	pNbuf->status |= TX_BD_R;
	
	/* Indicate to FEC that transmit buffer is ready to send */
	MCF_FEC_TDAR1 = MCF_FEC_TDAR_X_DES_ACTIVE;

	
	for (i=0; i < 10000000; i++)
	{
		if (MCF_FEC_EIR1 & MCF_FEC_EIR_RXF) 
		{
			break;		
		}
	}
	
	if (i == 10000000)
	{
		/* Timed-out */
		printf("Eth1 Time Out\n");
		return;
	}	
	
	for (i = 0; i < 64; i++)
	{
		if (TxNBUF[0].data[i] != RxNBUF[0].data[i])
		{
			printf("Eth1 Data Mismatch\n");
			return;
		}
	}	
  printf("Ethernet 1 Finished\n");
  /* Ethernet1 Test passed */
}

/********************************************************************/