mcf5275_fec.h

COLDFIRE 5275板极初始化程序

/*
 * File:	mcf5275_fec.h
 * Purpose:	Register and bit definitions for the MCF5275
 *
 * Notes:	
 *	
 */

#ifndef __MCF5275_FEC_H__
#define __MCF5275_FEC_H__

/*********************************************************************
*
* Fast Ethernet Controller (FEC)
*
*********************************************************************/

/* Register read/write macros */
#define MCF_FEC_EIR0                     (*(vuint32*)(void*)(&__IPSBAR[0x001004]))
#define MCF_FEC_EIMR0                    (*(vuint32*)(void*)(&__IPSBAR[0x001008]))
#define MCF_FEC_RDAR0                    (*(vuint32*)(void*)(&__IPSBAR[0x001010]))
#define MCF_FEC_TDAR0                    (*(vuint32*)(void*)(&__IPSBAR[0x001014]))
#define MCF_FEC_ECR0                     (*(vuint32*)(void*)(&__IPSBAR[0x001024]))
#define MCF_FEC_MMFR0                    (*(vuint32*)(void*)(&__IPSBAR[0x001040]))
#define MCF_FEC_MSCR0                    (*(vuint32*)(void*)(&__IPSBAR[0x001044]))
#define MCF_FEC_MIBC0                    (*(vuint32*)(void*)(&__IPSBAR[0x001064]))
#define MCF_FEC_RCR0                     (*(vuint32*)(void*)(&__IPSBAR[0x001084]))
#define MCF_FEC_TCR0                     (*(vuint32*)(void*)(&__IPSBAR[0x0010C4]))
#define MCF_FEC_PALR0                    (*(vuint32*)(void*)(&__IPSBAR[0x0010E4]))
#define MCF_FEC_PAUR0                    (*(vuint32*)(void*)(&__IPSBAR[0x0010E8]))
#define MCF_FEC_OPD0                     (*(vuint32*)(void*)(&__IPSBAR[0x0010EC]))
#define MCF_FEC_IAUR0                    (*(vuint32*)(void*)(&__IPSBAR[0x001118]))
#define MCF_FEC_IALR0                    (*(vuint32*)(void*)(&__IPSBAR[0x00111C]))
#define MCF_FEC_GAUR0                    (*(vuint32*)(void*)(&__IPSBAR[0x001120]))
#define MCF_FEC_GALR0                    (*(vuint32*)(void*)(&__IPSBAR[0x001124]))
#define MCF_FEC_TFWR0                    (*(vuint32*)(void*)(&__IPSBAR[0x001144]))
#define MCF_FEC_FRBR0                    (*(vuint32*)(void*)(&__IPSBAR[0x00114C]))
#define MCF_FEC_FRSR0                    (*(vuint32*)(void*)(&__IPSBAR[0x001150]))
#define MCF_FEC_ERDSR0                   (*(vuint32*)(void*)(&__IPSBAR[0x001180]))
#define MCF_FEC_ETDSR0                   (*(vuint32*)(void*)(&__IPSBAR[0x001184]))
#define MCF_FEC_EMRBR0                   (*(vuint32*)(void*)(&__IPSBAR[0x0011B8]))
#define MCF_FEC_RMON_T_DROP0             (*(vuint32*)(void*)(&__IPSBAR[0x001200]))
#define MCF_FEC_RMON_T_PACKETS0          (*(vuint32*)(void*)(&__IPSBAR[0x001204]))
#define MCF_FEC_RMON_T_BC_PKT0           (*(vuint32*)(void*)(&__IPSBAR[0x001208]))
#define MCF_FEC_RMON_T_MC_PKT0           (*(vuint32*)(void*)(&__IPSBAR[0x00120C]))
#define MCF_FEC_RMON_T_CRC_ALIGN0        (*(vuint32*)(void*)(&__IPSBAR[0x001210]))
#define MCF_FEC_RMON_T_UNDERSIZE0        (*(vuint32*)(void*)(&__IPSBAR[0x001214]))
#define MCF_FEC_RMON_T_OVERSIZE0         (*(vuint32*)(void*)(&__IPSBAR[0x001218]))
#define MCF_FEC_RMON_T_FRAG0             (*(vuint32*)(void*)(&__IPSBAR[0x00121C]))
#define MCF_FEC_RMON_T_JAB0              (*(vuint32*)(void*)(&__IPSBAR[0x001220]))
#define MCF_FEC_RMON_T_COL0              (*(vuint32*)(void*)(&__IPSBAR[0x001224]))
#define MCF_FEC_RMON_T_P640              (*(vuint32*)(void*)(&__IPSBAR[0x001228]))
#define MCF_FEC_RMON_T_P65TO1270         (*(vuint32*)(void*)(&__IPSBAR[0x00122C]))
#define MCF_FEC_RMON_T_P128TO2550        (*(vuint32*)(void*)(&__IPSBAR[0x001230]))
#define MCF_FEC_RMON_T_P256TO5110        (*(vuint32*)(void*)(&__IPSBAR[0x001234]))
#define MCF_FEC_RMON_T_P512TO10230       (*(vuint32*)(void*)(&__IPSBAR[0x001238]))
#define MCF_FEC_RMON_T_P1024TO20470      (*(vuint32*)(void*)(&__IPSBAR[0x00123C]))
#define MCF_FEC_RMON_T_P_GTE20480        (*(vuint32*)(void*)(&__IPSBAR[0x001240]))
#define MCF_FEC_RMON_T_OCTETS0           (*(vuint32*)(void*)(&__IPSBAR[0x001244]))
#define MCF_FEC_IEEE_T_DROP0             (*(vuint32*)(void*)(&__IPSBAR[0x001248]))
#define MCF_FEC_IEEE_T_FRAME_OK0         (*(vuint32*)(void*)(&__IPSBAR[0x00124C]))
#define MCF_FEC_IEEE_T_1COL0             (*(vuint32*)(void*)(&__IPSBAR[0x001250]))
#define MCF_FEC_IEEE_T_MCOL0             (*(vuint32*)(void*)(&__IPSBAR[0x001254]))
#define MCF_FEC_IEEE_T_DEF0              (*(vuint32*)(void*)(&__IPSBAR[0x001258]))
#define MCF_FEC_IEEE_T_LCOL0             (*(vuint32*)(void*)(&__IPSBAR[0x00125C]))
#define MCF_FEC_IEEE_T_EXCOL0            (*(vuint32*)(void*)(&__IPSBAR[0x001260]))
#define MCF_FEC_IEEE_T_MACERR0           (*(vuint32*)(void*)(&__IPSBAR[0x001264]))
#define MCF_FEC_IEEE_T_CSERR0            (*(vuint32*)(void*)(&__IPSBAR[0x001268]))
#define MCF_FEC_IEEE_T_SQE0              (*(vuint32*)(void*)(&__IPSBAR[0x00126C]))
#define MCF_FEC_IEEE_T_FDXFC0            (*(vuint32*)(void*)(&__IPSBAR[0x001270]))
#define MCF_FEC_IEEE_T_OCTETS_OK0        (*(vuint32*)(void*)(&__IPSBAR[0x001274]))
#define MCF_FEC_RMON_R_PACKETS0          (*(vuint32*)(void*)(&__IPSBAR[0x001284]))
#define MCF_FEC_RMON_R_BC_PKT0           (*(vuint32*)(void*)(&__IPSBAR[0x001288]))
#define MCF_FEC_RMON_R_MC_PKT0           (*(vuint32*)(void*)(&__IPSBAR[0x00128C]))
#define MCF_FEC_RMON_R_CRC_ALIGN0        (*(vuint32*)(void*)(&__IPSBAR[0x001290]))
#define MCF_FEC_RMON_R_UNDERSIZE0        (*(vuint32*)(void*)(&__IPSBAR[0x001294]))
#define MCF_FEC_RMON_R_OVERSIZE0         (*(vuint32*)(void*)(&__IPSBAR[0x001298]))
#define MCF_FEC_RMON_R_FRAG0             (*(vuint32*)(void*)(&__IPSBAR[0x00129C]))
#define MCF_FEC_RMON_R_JAB0              (*(vuint32*)(void*)(&__IPSBAR[0x0012A0]))
#define MCF_FEC_RMON_R_RESVD_00          (*(vuint32*)(void*)(&__IPSBAR[0x0012A4]))
#define MCF_FEC_RMON_R_P640              (*(vuint32*)(void*)(&__IPSBAR[0x0012A8]))
#define MCF_FEC_RMON_R_P65TO1270         (*(vuint32*)(void*)(&__IPSBAR[0x0012AC]))
#define MCF_FEC_RMON_R_P128TO2550        (*(vuint32*)(void*)(&__IPSBAR[0x0012B0]))
#define MCF_FEC_RMON_R_P256TO5110        (*(vuint32*)(void*)(&__IPSBAR[0x0012B4]))
#define MCF_FEC_RMON_R_512TO10230        (*(vuint32*)(void*)(&__IPSBAR[0x0012B8]))
#define MCF_FEC_RMON_R_P_GTE20480        (*(vuint32*)(void*)(&__IPSBAR[0x0012C0]))
#define MCF_FEC_RMON_R_1024TO20470       (*(vuint32*)(void*)(&__IPSBAR[0x0012BC]))
#define MCF_FEC_RMON_R_OCTETS0           (*(vuint32*)(void*)(&__IPSBAR[0x0012C4]))
#define MCF_FEC_IEEE_R_DROP0             (*(vuint32*)(void*)(&__IPSBAR[0x0012C8]))
#define MCF_FEC_IEEE_R_FRAME_OK0         (*(vuint32*)(void*)(&__IPSBAR[0x0012CC]))
#define MCF_FEC_IEEE_R_CRC0              (*(vuint32*)(void*)(&__IPSBAR[0x0012D0]))
#define MCF_FEC_IEEE_R_ALIGN0            (*(vuint32*)(void*)(&__IPSBAR[0x0012D4]))
#define MCF_FEC_IEEE_R_MACERR0           (*(vuint32*)(void*)(&__IPSBAR[0x0012D8]))
#define MCF_FEC_IEEE_R_FDXFC0            (*(vuint32*)(void*)(&__IPSBAR[0x0012DC]))
#define MCF_FEC_IEEE_R_OCTETS_OK0        (*(vuint32*)(void*)(&__IPSBAR[0x0012E0]))
#define MCF_FEC_EIR1                     (*(vuint32*)(void*)(&__IPSBAR[0x001804]))
#define MCF_FEC_EIMR1                    (*(vuint32*)(void*)(&__IPSBAR[0x001808]))
#define MCF_FEC_RDAR1                    (*(vuint32*)(void*)(&__IPSBAR[0x001810]))
#define MCF_FEC_TDAR1                    (*(vuint32*)(void*)(&__IPSBAR[0x001814]))
#define MCF_FEC_ECR1                     (*(vuint32*)(void*)(&__IPSBAR[0x001824]))
#define MCF_FEC_MMFR1                    (*(vuint32*)(void*)(&__IPSBAR[0x001840]))
#define MCF_FEC_MSCR1                    (*(vuint32*)(void*)(&__IPSBAR[0x001844]))
#define MCF_FEC_MIBC1                    (*(vuint32*)(void*)(&__IPSBAR[0x001864]))
#define MCF_FEC_RCR1                     (*(vuint32*)(void*)(&__IPSBAR[0x001884]))
#define MCF_FEC_TCR1                     (*(vuint32*)(void*)(&__IPSBAR[0x0018C4]))
#define MCF_FEC_PALR1                    (*(vuint32*)(void*)(&__IPSBAR[0x0018E4]))
#define MCF_FEC_PAUR1                    (*(vuint32*)(void*)(&__IPSBAR[0x0018E8]))
#define MCF_FEC_OPD1                     (*(vuint32*)(void*)(&__IPSBAR[0x0018EC]))
#define MCF_FEC_IAUR1                    (*(vuint32*)(void*)(&__IPSBAR[0x001918]))
#define MCF_FEC_IALR1                    (*(vuint32*)(void*)(&__IPSBAR[0x00191C]))
#define MCF_FEC_GAUR1                    (*(vuint32*)(void*)(&__IPSBAR[0x001920]))
#define MCF_FEC_GALR1                    (*(vuint32*)(void*)(&__IPSBAR[0x001924]))
#define MCF_FEC_TFWR1                    (*(vuint32*)(void*)(&__IPSBAR[0x001944]))
#define MCF_FEC_FRBR1                    (*(vuint32*)(void*)(&__IPSBAR[0x00194C]))
#define MCF_FEC_FRSR1                    (*(vuint32*)(void*)(&__IPSBAR[0x001950]))
#define MCF_FEC_ERDSR1                   (*(vuint32*)(void*)(&__IPSBAR[0x001980]))
#define MCF_FEC_ETDSR1                   (*(vuint32*)(void*)(&__IPSBAR[0x001984]))
#define MCF_FEC_EMRBR1                   (*(vuint32*)(void*)(&__IPSBAR[0x0019B8]))
#define MCF_FEC_RMON_T_DROP1             (*(vuint32*)(void*)(&__IPSBAR[0x001A00]))
#define MCF_FEC_RMON_T_PACKETS1          (*(vuint32*)(void*)(&__IPSBAR[0x001A04]))
#define MCF_FEC_RMON_T_BC_PKT1           (*(vuint32*)(void*)(&__IPSBAR[0x001A08]))
#define MCF_FEC_RMON_T_MC_PKT1           (*(vuint32*)(void*)(&__IPSBAR[0x001A0C]))
#define MCF_FEC_RMON_T_CRC_ALIGN1        (*(vuint32*)(void*)(&__IPSBAR[0x001A10]))
#define MCF_FEC_RMON_T_UNDERSIZE1        (*(vuint32*)(void*)(&__IPSBAR[0x001A14]))
#define MCF_FEC_RMON_T_OVERSIZE1         (*(vuint32*)(void*)(&__IPSBAR[0x001A18]))
#define MCF_FEC_RMON_T_FRAG1             (*(vuint32*)(void*)(&__IPSBAR[0x001A1C]))
#define MCF_FEC_RMON_T_JAB1              (*(vuint32*)(void*)(&__IPSBAR[0x001A20]))
#define MCF_FEC_RMON_T_COL1              (*(vuint32*)(void*)(&__IPSBAR[0x001A24]))
#define MCF_FEC_RMON_T_P641              (*(vuint32*)(void*)(&__IPSBAR[0x001A28]))
#define MCF_FEC_RMON_T_P65TO1271         (*(vuint32*)(void*)(&__IPSBAR[0x001A2C]))
#define MCF_FEC_RMON_T_P128TO2551        (*(vuint32*)(void*)(&__IPSBAR[0x001A30]))
#define MCF_FEC_RMON_T_P256TO5111        (*(vuint32*)(void*)(&__IPSBAR[0x001A34]))
#define MCF_FEC_RMON_T_P512TO10231       (*(vuint32*)(void*)(&__IPSBAR[0x001A38]))
#define MCF_FEC_RMON_T_P1024TO20471      (*(vuint32*)(void*)(&__IPSBAR[0x001A3C]))
#define MCF_FEC_RMON_T_P_GTE20481        (*(vuint32*)(void*)(&__IPSBAR[0x001A40]))
#define MCF_FEC_RMON_T_OCTETS1           (*(vuint32*)(void*)(&__IPSBAR[0x001A44]))
#define MCF_FEC_IEEE_T_DROP1             (*(vuint32*)(void*)(&__IPSBAR[0x001A48]))
#define MCF_FEC_IEEE_T_FRAME_OK1         (*(vuint32*)(void*)(&__IPSBAR[0x001A4C]))
#define MCF_FEC_IEEE_T_1COL1             (*(vuint32*)(void*)(&__IPSBAR[0x001A50]))
#define MCF_FEC_IEEE_T_MCOL1             (*(vuint32*)(void*)(&__IPSBAR[0x001A54]))
#define MCF_FEC_IEEE_T_DEF1              (*(vuint32*)(void*)(&__IPSBAR[0x001A58]))
#define MCF_FEC_IEEE_T_LCOL1             (*(vuint32*)(void*)(&__IPSBAR[0x001A5C]))
#define MCF_FEC_IEEE_T_EXCOL1            (*(vuint32*)(void*)(&__IPSBAR[0x001A60]))
#define MCF_FEC_IEEE_T_MACERR1           (*(vuint32*)(void*)(&__IPSBAR[0x001A64]))
#define MCF_FEC_IEEE_T_CSERR1            (*(vuint32*)(void*)(&__IPSBAR[0x001A68]))
#define MCF_FEC_IEEE_T_SQE1              (*(vuint32*)(void*)(&__IPSBAR[0x001A6C]))
#define MCF_FEC_IEEE_T_FDXFC1            (*(vuint32*)(void*)(&__IPSBAR[0x001A70]))
#define MCF_FEC_IEEE_T_OCTETS_OK1        (*(vuint32*)(void*)(&__IPSBAR[0x001A74]))
#define MCF_FEC_RMON_R_PACKETS1          (*(vuint32*)(void*)(&__IPSBAR[0x001A84]))
#define MCF_FEC_RMON_R_BC_PKT1           (*(vuint32*)(void*)(&__IPSBAR[0x001A88]))
#define MCF_FEC_RMON_R_MC_PKT1           (*(vuint32*)(void*)(&__IPSBAR[0x001A8C]))
#define MCF_FEC_RMON_R_CRC_ALIGN1        (*(vuint32*)(void*)(&__IPSBAR[0x001A90]))
#define MCF_FEC_RMON_R_UNDERSIZE1        (*(vuint32*)(void*)(&__IPSBAR[0x001A94]))
#define MCF_FEC_RMON_R_OVERSIZE1         (*(vuint32*)(void*)(&__IPSBAR[0x001A98]))
#define MCF_FEC_RMON_R_FRAG1             (*(vuint32*)(void*)(&__IPSBAR[0x001A9C]))
#define MCF_FEC_RMON_R_JAB1              (*(vuint32*)(void*)(&__IPSBAR[0x001AA0]))
#define MCF_FEC_RMON_R_RESVD_01          (*(vuint32*)(void*)(&__IPSBAR[0x001AA4]))
#define MCF_FEC_RMON_R_P641              (*(vuint32*)(void*)(&__IPSBAR[0x001AA8]))
#define MCF_FEC_RMON_R_P65TO1271         (*(vuint32*)(void*)(&__IPSBAR[0x001AAC]))
#define MCF_FEC_RMON_R_P128TO2551        (*(vuint32*)(void*)(&__IPSBAR[0x001AB0]))
#define MCF_FEC_RMON_R_P256TO5111        (*(vuint32*)(void*)(&__IPSBAR[0x001AB4]))
#define MCF_FEC_RMON_R_512TO10231        (*(vuint32*)(void*)(&__IPSBAR[0x001AB8]))
#define MCF_FEC_RMON_R_P_GTE20481        (*(vuint32*)(void*)(&__IPSBAR[0x001AC0]))
#define MCF_FEC_RMON_R_1024TO20471       (*(vuint32*)(void*)(&__IPSBAR[0x001ABC]))
#define MCF_FEC_RMON_R_OCTETS1           (*(vuint32*)(void*)(&__IPSBAR[0x001AC4]))
#define MCF_FEC_IEEE_R_DROP1             (*(vuint32*)(void*)(&__IPSBAR[0x001AC8]))
#define MCF_FEC_IEEE_R_FRAME_OK1         (*(vuint32*)(void*)(&__IPSBAR[0x001ACC]))
#define MCF_FEC_IEEE_R_CRC1              (*(vuint32*)(void*)(&__IPSBAR[0x001AD0]))
#define MCF_FEC_IEEE_R_ALIGN1            (*(vuint32*)(void*)(&__IPSBAR[0x001AD4]))
#define MCF_FEC_IEEE_R_MACERR1           (*(vuint32*)(void*)(&__IPSBAR[0x001AD8]))
#define MCF_FEC_IEEE_R_FDXFC1            (*(vuint32*)(void*)(&__IPSBAR[0x001ADC]))
#define MCF_FEC_IEEE_R_OCTETS_OK1        (*(vuint32*)(void*)(&__IPSBAR[0x001AE0]))
#define MCF_FEC_EIR(x)                   (*(vuint32*)(void*)(&__IPSBAR[0x001004+((x)*0x800)]))
#define MCF_FEC_EIMR(x)                  (*(vuint32*)(void*)(&__IPSBAR[0x001008+((x)*0x800)]))
#define MCF_FEC_RDAR(x)                  (*(vuint32*)(void*)(&__IPSBAR[0x001010+((x)*0x800)]))
#define MCF_FEC_TDAR(x)                  (*(vuint32*)(void*)(&__IPSBAR[0x001014+((x)*0x800)]))
#define MCF_FEC_ECR(x)                   (*(vuint32*)(void*)(&__IPSBAR[0x001024+((x)*0x800)]))
#define MCF_FEC_MMFR(x)                  (*(vuint32*)(void*)(&__IPSBAR[0x001040+((x)*0x800)]))