📄 mpc5xx_hi.c
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case MPC_MSR_FE1:
printf("FE1"); break;
case MPC_MSR_IP:
printf("IP"); break;
case MPC_MSR_IR:
printf("IR"); break;
case MPC_MSR_DR:
printf("DR"); break;
case MPC_MSR_RI:
printf("RI"); break;
case MPC_MSR_LE:
printf("LE"); break;
default:
break;
}
}
mask >>= 1;
}
printf("]");
}
/*********************************************************************/
void
cpu_reg_display (char *reg)
{
int index;
if (reg == NULL)
{
printf(" pc: %08X msr: %08X ",
CPU_REG_SRR0,
CPU_REG_MSR
);
dump_msr();
printf("\n");
printf(" cr: %08X xer: %08X lr: %08X ctr: %08X\n",
CPU_REG_CR,
CPU_REG_XER,
CPU_REG_LR,
CPU_REG_CTR
);
dump_gprs();
}
else
{
/* display specific reg */
if ((index = find_register(reg)) != -1)
{
printf("%-9s: %08X\n",
registers[index].reg_name,
*(uint32 *)registers[index].reg_offset );
return;
}
else
{
if (strcasecmp("gprs",reg) == 0)
{
dump_gprs();
return;
}
if (strcasecmp("sprs",reg) == 0)
{
dump_sprs();
return;
}
if (strcasecmp("fprs",reg) == 0)
{
dump_fprs();
return;
}
}
printf(INVREG,reg);
}
}
/*********************************************************************/
void
cpu_pc_modify (ADDRESS address)
{
CPU_REG_SRR0 = address;
}
/*********************************************************************/
ADDRESS
cpu_pc_get (void)
{
return CPU_REG_SRR0;
}
/*********************************************************************/
int
cpu_parse_size (char *arg)
{
int i, size = SIZE_32;
for (i = 0; arg[i] != '\0'; i++)
{
if (arg[i] == '.')
{
switch (arg[i+1])
{
case 'b':
case 'B':
size = SIZE_8;
break;
case 'h':
case 'H':
size = SIZE_16;
break;
case 'w':
case 'W':
size = SIZE_32;
break;
default:
size = SIZE_32;
break;
}
break;
}
}
return size;
}
/*********************************************************************/
int
cpu_valid_insn_addr (ADDRESS address)
{
/* MPC needs instruction aligned on 32-bit boundaries */
return !(address & 0x00000003);
}
/*********************************************************************/
void
cpu_switch_context (int trace)
{
/*
* if 'trace' is true, then do not put in breakpoints, we are
* tracing through the code. otherwise, install breakpoints,
* we are executing a 'go' command.
*/
if (trace)
{
/* turn tracing on */
CPU_REG_MSR |= MPC_MSR_SE;
}
else
{
if (breakpoint_install((ADDRESS)context.srr0))
{
/* about to execute at a breakpoint */
/* trace thru this rather than breaking */
trace_thru = (ADDRESS)context.srr0;
/* turn tracing on */
CPU_REG_MSR |= MPC_MSR_SE;
}
}
asm_switch_context(&context);
}
/*********************************************************************/
void
cpu_write_data (ADDRESS address, int size, uint32 data)
{
switch (size)
{
case SIZE_8:
*((uint8 *)address) = (uint8)data;
break;
case SIZE_16:
*((uint16 *)address) = (uint16)data;
break;
case SIZE_32:
*((uint32 *)address) = (uint32)data;
break;
default:
break;
}
}
/*********************************************************************/
uint32
cpu_read_data (ADDRESS address, int size)
{
switch (size)
{
case SIZE_8:
return *((uint8 *)address);
break;
case SIZE_16:
return *((uint16 *)address);
break;
case SIZE_32:
return *((uint32 *)address);
break;
default:
return 0;
break;
}
}
/*********************************************************************/
ADDRESS
cpu_align_address (ADDRESS address, int size)
{
switch (size)
{
case SIZE_16:
return (ADDRESS)(address & ~0x00000001);
break;
case SIZE_32:
return (ADDRESS)(address & ~0x00000003);
break;
case SIZE_8:
default:
return (address);
break;
}
}
/*********************************************************************/
ADDRESS
cpu_stack_frame (ADDRESS fp, ADDRESS *retpc)
{
/*
* PowerPC SVR4/EABI
*/
ADDRESS backchain;
if (retpc == NULL)
{
return context.r1;
}
else
{
backchain = *(ADDRESS *)fp;
*retpc = *(ADDRESS *)(backchain + 4);
return backchain;
}
}
/*********************************************************************/
static void
usiu_handler (void)
{
uint32 sipend;
sipend = (uint32)(USIU.SIPEND.R & USIU.SIMASK.R);
printf("USIU IRQ(s): ");
if (sipend & 0x80000000)
{
printf("IRQ0 ");
}
if (sipend & 0x40000000)
{
printf("LVL0 ");
}
if (sipend & 0x20000000)
{
printf("IRQ1 ");
}
if (sipend & 0x10000000)
{
printf("LVL1 ");
}
if (sipend & 0x08000000)
{
printf("IRQ2 ");
}
if (sipend & 0x04000000)
{
printf("LVL2 ");
}
if (sipend & 0x02000000)
{
printf("IRQ3 ");
}
if (sipend & 0x01000000)
{
printf("LVL3 ");
}
if (sipend & 0x00800000)
{
printf("IRQ4 ");
}
if (sipend & 0x00400000)
{
printf("LVL4 ");
}
if (sipend & 0x00200000)
{
printf("IRQ5 ");
}
if (sipend & 0x00100000)
{
printf("LVL5 ");
}
if (sipend & 0x00080000)
{
printf("IRQ6 ");
}
if (sipend & 0x00040000)
{
printf("LVL6 ");
}
if (sipend & 0x00030000)
{
printf("IRQ7 ");
}
if (sipend & 0x00010000)
{
printf("LVL7 ");
}
printf("\n");
}
/*********************************************************************/
int
cpu_handler (int exception)
{
/*
* This is the exception handler for all defined exceptions. Most
* exceptions do nothing, but some of the more important ones are
* handled to some extent.
*/
int user_brkpnt, user_triggered;
int cpu_handler_flag;
/*
* Most exceptions result in dumping out to the dBUG prompt.
*/
cpu_handler_flag = EXEC_DBUG;
/*
* The value passed in for 'exception' is actually the LR. So,
* pick-off the actual exception number now.
*/
exception = (exception & 0x0000FF00);
/*
* Handle breakpoints properly.
*/
user_brkpnt = breakpoint_deinstall((ADDRESS)context.srr0, &user_triggered);
switch (exception)
{
case 0x0000:
printf(EXCEPT, exception, "Reserved");
cpu_reg_display(NULL);
cpu_disasm(CPU_REG_SRR0, TRUE);
break;
case 0x0100:
printf(EXCEPT, exception, "Reset");
cpu_reg_display(NULL);
cpu_disasm(CPU_REG_SRR0, TRUE);
break;
case 0x0200:
printf(EXCEPT, exception, "Machine Check");
cpu_reg_display(NULL);
cpu_disasm(CPU_REG_SRR0, TRUE);
break;
case 0x0300:
printf(EXCEPT, exception, "Data Storage");
cpu_reg_display(NULL);
cpu_disasm(CPU_REG_SRR0, TRUE);
break;
case 0x0400:
printf(EXCEPT, exception, "Instruction Storage");
cpu_reg_display(NULL);
cpu_disasm(CPU_REG_SRR0, TRUE);
break;
case 0x0500:
printf(EXCEPT, exception, "External Interrupt");
usiu_handler();
cpu_reg_display(NULL);
cpu_disasm(CPU_REG_SRR0, TRUE);
break;
case 0x0600:
printf(EXCEPT, exception, "Alignment");
cpu_reg_display(NULL);
cpu_disasm(CPU_REG_SRR0, TRUE);
break;
case 0x0700:
printf(EXCEPT, exception, "Program");
cpu_reg_display(NULL);
cpu_disasm(CPU_REG_SRR0, TRUE);
break;
case 0x0800:
printf(EXCEPT, exception, "Floating-point Unavailable");
cpu_reg_display(NULL);
cpu_disasm(CPU_REG_SRR0, TRUE);
break;
case 0x0900:
printf(EXCEPT, exception, "Decrementer");
cpu_reg_display(NULL);
cpu_disasm(CPU_REG_SRR0, TRUE);
break;
case 0x0A00:
case 0x0B00:
printf(EXCEPT, exception, "Reserved");
cpu_reg_display(NULL);
cpu_disasm(CPU_REG_SRR0, TRUE);
break;
case 0x0C00:
printf(EXCEPT, exception, "System Call");
cpu_reg_display(NULL);
cpu_disasm(CPU_REG_SRR0, TRUE);
break;
case 0x0D00:
/* 'step' or 'go' while sitting on a user breakpoint */
if ((int)trace_thru)
{
/* got here from 'step' command */
if ((ADDRESS)cpu_step_over == (ADDRESS)CPU_REG_SRR0)
{
/* clean up at end of handler */
trace_thru = NULL;
cpu_reg_display(NULL);
cpu_disasm(CPU_REG_SRR0, TRUE);
}
/* got here from 'go' command */
else
{
/* reinstall all breakpoints except for one a current address */
breakpoint_install((ADDRESS)context.srr0);
/* place breakpoint at current address */
cpu_write_data(trace_thru,32,(int)ILLEGAL);
/* turn off tracing */
CPU_REG_MSR &= (~MPC_MSR_SE);
/* nullify trace_thru and continue execution */
trace_thru = NULL;
cpu_handler_flag = EXEC_RFI;
}
break;
}
/* each time through, decrement cpu_trace_count */
if (--cpu_trace_count > 0)
{
/* turn tracing on */
CPU_REG_MSR |= MPC_MSR_SE;
cpu_handler_flag = EXEC_RFI;
}
else
{
/* turn off trace bit in MSR */
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