mpc8xx_hi.c

motorola 针对coldfire 5275 评估板的Dbug bootloader源程序

    }
    return size;
}

/*********************************************************************/
int
cpu_valid_insn_addr (ADDRESS address)
{
    /* MPC needs instruction aligned on 32-bit boundaries */
    return !(address & 0x00000003);
}

/*********************************************************************/
void
cpu_switch_context (int trace)
{
    /*
     * if 'trace' is true, then do not put in breakpoints, we are
     * tracing through the code.  otherwise, install breakpoints,
     * we are executing a 'go' command.
     */

    if (trace)
    {
        /* turn tracing on */
        CPU_REG_MSR |= MPC8XX_MSR_SE;
    }
    else
    {
        if (breakpoint_install((ADDRESS)context.srr0))
        {
            /* about to execute at a breakpoint */
            /* trace thru this rather than breaking */
            trace_thru = (ADDRESS)context.srr0;
            /* turn tracing on */
            CPU_REG_MSR |= MPC8XX_MSR_SE;
        }
    }
    asm_switch_context(&context);
}

/*********************************************************************/
void
cpu_write_data (ADDRESS address, int size, uint32 data)
{
    switch (size)
    {
        case SIZE_8:
            *((uint8 *)address) = data;
            break;
        case SIZE_16:
            *((uint16 *)address) = data;
            break;
        case SIZE_32:
            *((uint32 *)address) = data;
            break;
        default:
            break;
    }
}

/*********************************************************************/
uint32
cpu_read_data (ADDRESS address, int size)
{
    switch (size)
    {
        case SIZE_8:
            return *((uint8 *)address);
            break;
        case SIZE_16:
            return *((uint16 *)address);
            break;
        case SIZE_32:
            return *((uint32 *)address);
            break;
        default:
            return 0;
            break;
    }
}

/*********************************************************************/
ADDRESS
cpu_align_address (ADDRESS address, int size)
{
    switch (size)
    {
        case SIZE_16:
            return (ADDRESS)(address & ~0x00000001);
            break;
        case SIZE_32:
            return (ADDRESS)(address & ~0x00000003);
            break;
        case SIZE_8:
        default:
            return (address);
            break;
    }
}

/*********************************************************************/
ADDRESS
cpu_stack_frame (ADDRESS fp, ADDRESS *retpc)
{
    /*
     * PowerPC SVR4/EABI
     */
    ADDRESS backchain;
 
    if (retpc == NULL)
    {
        return context.r1;
    }
    else
    {
        backchain = *(ADDRESS *)fp;
        *retpc = *(ADDRESS *)(backchain + 4);
        return backchain;
    }
}

/*********************************************************************/
static void
cpic_handler (void)
{
    uint32 cipr;
    MPC8XX_IMM *imm = mpc8xx_get_immp();

    /*
     * The CIPR does not present just one interrupt source.  It will
     * present all sources that require servicing.  This is different
     * than the SIU int controller.
     */
    cipr = imm->cpic.CIPR;  /* mask with CIMR ? */

    printf("CPIC IRQ(s): ");

    if (cipr & MPC8XX_CPIC_CIPR_PC15)
    {
        printf("PC15 ");
    }
    if (cipr & MPC8XX_CPIC_CIPR_SCC1)
    {
        printf("SCC1 ");
    }
    if (cipr & MPC8XX_CPIC_CIPR_SCC2)
    {
        printf("SCC2 ");
    }
    if (cipr & MPC8XX_CPIC_CIPR_SCC3)
    {
        printf("SCC3 ");
    }
    if (cipr & MPC8XX_CPIC_CIPR_SCC4)
    {
        printf("SCC4 ");
    }
    if (cipr & MPC8XX_CPIC_CIPR_PC14)
    {
        printf("PC14 ");
    }
    if (cipr & MPC8XX_CPIC_CIPR_TIMER1)
    {
        printf("TIMER1 ");
    }
    if (cipr & MPC8XX_CPIC_CIPR_PC13)
    {
        printf("PC13 ");
    }
    if (cipr & MPC8XX_CPIC_CIPR_PC12)
    {
        printf("PC12 ");
    }
    if (cipr & MPC8XX_CPIC_CIPR_SDMA)
    {
        printf("SDMA ");
    }
    if (cipr & MPC8XX_CPIC_CIPR_IDMA1)
    {
        printf("IDMA1 ");
    }
    if (cipr & MPC8XX_CPIC_CIPR_IDMA2)
    {
        printf("IDMA2 ");
    }
    if (cipr & MPC8XX_CPIC_CIPR_TIMER2)
    {
        printf("TIMER2 ");
    }
    if (cipr & MPC8XX_CPIC_CIPR_RTT)
    {
        printf("RTT ");
    }
    if (cipr & MPC8XX_CPIC_CIPR_I2C)
    {
        printf("I2C ");
    }
    if (cipr & MPC8XX_CPIC_CIPR_PC11)
    {
        printf("PC11 ");
    }
    if (cipr & MPC8XX_CPIC_CIPR_PC10)
    {
        printf("PC10 ");
    }
    if (cipr & MPC8XX_CPIC_CIPR_TIMER3)
    {
        printf("TIMER3 ");
    }
    if (cipr & MPC8XX_CPIC_CIPR_PC9)
    {
        printf("PC9 ");
    }
    if (cipr & MPC8XX_CPIC_CIPR_PC8)
    {
        printf("PC8 ");
    }
    if (cipr & MPC8XX_CPIC_CIPR_PC7)
    {
        printf("PC7 ");
    }
    if (cipr & MPC8XX_CPIC_CIPR_TIMER4)
    {
        printf("TIMER4 ");
    }
    if (cipr & MPC8XX_CPIC_CIPR_PC6)
    {
        printf("PC6 ");
    }
    if (cipr & MPC8XX_CPIC_CIPR_SPI)
    {
        printf("SPI ");
    }
    if (cipr & MPC8XX_CPIC_CIPR_SMC1)
    {
        printf("SMC1 ");
    }
    if (cipr & MPC8XX_CPIC_CIPR_SMC2)
    {
        printf("SMC2 ");
    }
    if (cipr & MPC8XX_CPIC_CIPR_PIP)
    {
        printf("PIP ");
    }
    if (cipr & MPC8XX_CPIC_CIPR_PC5)
    {
        printf("PC5 ");
    }
    if (cipr & MPC8XX_CPIC_CIPR_PC4)
    {
        printf("PC4 ");
    }

    printf("\n");

    /*
     * Clear interrupts
     */
    imm->cpic.CIPR = ~0;
}

/*********************************************************************/
static void
siu_handler (void)
{
    MPC8XX_IMM *imm = mpc8xx_get_immp();
    uint32 sipend;

    sipend = imm->siu.SIPEND & imm->siu.SIMASK;

    printf("SIU  IRQ(s): ");

    if (sipend & MPC8XX_SIU_SIPEND_IRQ0)
    {
        printf("IRQ0 ");
    }
    if (sipend & MPC8XX_SIU_SIPEND_LVL0)
    {
        printf("LVL0 ");
    }
    if (sipend & MPC8XX_SIU_SIPEND_IRQ1)
    {
        printf("IRQ1 ");
    }
    if (sipend & MPC8XX_SIU_SIPEND_LVL1)
    {
        printf("LVL1 ");
    }
    if (sipend & MPC8XX_SIU_SIPEND_IRQ2)
    {
        printf("IRQ2 ");
    }
    if (sipend & MPC8XX_SIU_SIPEND_LVL2)
    {
        printf("LVL2 ");
    }
    if (sipend & MPC8XX_SIU_SIPEND_IRQ3)
    {
        printf("IRQ3 ");
    }
    if (sipend & MPC8XX_SIU_SIPEND_LVL3)
    {
        printf("LVL3 ");
    }
    if (sipend & MPC8XX_SIU_SIPEND_IRQ4)
    {
        printf("IRQ4 ");
    }
    if (sipend & MPC8XX_SIU_SIPEND_LVL4)
    {
        printf("LVL4 ");
    }
    if (sipend & MPC8XX_SIU_SIPEND_IRQ5)
    {
        printf("IRQ5 ");
    }
    if (sipend & MPC8XX_SIU_SIPEND_LVL5)
    {
        printf("LVL5 ");
    }
    if (sipend & MPC8XX_SIU_SIPEND_IRQ6)
    {
        printf("IRQ6 ");
    }
    if (sipend & MPC8XX_SIU_SIPEND_LVL6)
    {
        printf("LVL6 ");
    }
    if (sipend & MPC8XX_SIU_SIPEND_IRQ7)
    {
        printf("IRQ7 ");
    }
    if (sipend & MPC8XX_SIU_SIPEND_LVL7)
    {
        printf("LVL7 ");
    }

    printf("\n");
    cpic_handler();
}

/*********************************************************************/
int
cpu_handler (int exception)
{
    /*
     * This is the exception handler for all defined exceptions.  Most
     * exceptions do nothing, but some of the more important ones are
     * handled to some extent.
     */
    int user_brkpnt, user_triggered;
    int cpu_handler_flag;

    /*
     * Most exceptions result in dumping out to the dBUG prompt.
     */
    cpu_handler_flag = EXEC_DBUG;

    /*
     * The value passed in for 'exception' is actually the LR.  So,
     * pick-off the actual exception number now.
     */
    exception = (exception & 0x0000FF00);

    /*
     * Handle breakpoints properly.
     */
    user_brkpnt = breakpoint_deinstall((ADDRESS)context.srr0, &user_triggered);

    switch (exception)
    {
        case 0x0000:
            printf(EXCEPT, exception, "Reserved");
            cpu_reg_display(NULL);
            cpu_disasm(CPU_REG_SRR0, TRUE);
            break;
        case 0x0100:
            printf(EXCEPT, exception, "Reset");
            cpu_reg_display(NULL);
            cpu_disasm(CPU_REG_SRR0, TRUE);
            break;
        case 0x0200:
            printf(EXCEPT, exception, "Machine Check");
            cpu_reg_display(NULL);
            cpu_disasm(CPU_REG_SRR0, TRUE);
            break;
        case 0x0300:
            printf(EXCEPT, exception, "Data Storage");
            cpu_reg_display(NULL);
            cpu_disasm(CPU_REG_SRR0, TRUE);
            break;
        case 0x0400:
            printf(EXCEPT, exception, "Instruction Storage");
            cpu_reg_display(NULL);
            cpu_disasm(CPU_REG_SRR0, TRUE);
            break;
        case 0x0500:
            printf(EXCEPT, exception, "External Interrupt");
            siu_handler();
            cpu_reg_display(NULL);
            cpu_disasm(CPU_REG_SRR0, TRUE);
            break;
        case 0x0600:
            printf(EXCEPT, exception, "Alignment");
            cpu_reg_display(NULL);
            cpu_disasm(CPU_REG_SRR0, TRUE);
            break;
        case 0x0700:
            printf(EXCEPT, exception, "Program");
            cpu_reg_display(NULL);
            cpu_disasm(CPU_REG_SRR0, TRUE);
            break;
        case 0x0800:
            printf(EXCEPT, exception, "Floating-point Unavailable");
            cpu_reg_display(NULL);
            cpu_disasm(CPU_REG_SRR0, TRUE);
            break;
        case 0x0900:
            printf(EXCEPT, exception, "Decrementer");
            cpu_reg_display(NULL);
            cpu_disasm(CPU_REG_SRR0, TRUE);
            break;
        case 0x0A00:
        case 0x0B00:
            printf(EXCEPT, exception, "Reserved");
            cpu_reg_display(NULL);
            cpu_disasm(CPU_REG_SRR0, TRUE);
            break;
        case 0x0C00:
            printf(EXCEPT, exception, "System Call");
            cpu_reg_display(NULL);
            cpu_disasm(CPU_REG_SRR0, TRUE);
            break;
        case 0x0D00:
            if ((int)trace_thru)
            {
                /* place breakpoint at trace_thru */
                cpu_write_data(trace_thru,32,(int)ILLEGAL);
                /* turn off tracing */
                CPU_REG_MSR &= (~MPC8XX_MSR_SE);
                /* nullify trace_thru and continue execution */
                trace_thru = NULL;
                cpu_handler_flag = EXEC_RFI;
                break;
            }

            /* each time through, decrement cpu_trace_count */
            if (--cpu_trace_count > 0)
            {
                /* turn tracing on */
                CPU_REG_MSR |= MPC8XX_MSR_SE;
                cpu_handler_flag = EXEC_RFI;
            }
            else
            {
                /* turn off trace bit in MSR */
                CPU_REG_MSR &= (~MPC8XX_MSR_SE);
                cpu_handler_flag = EXEC_DBUG;
                cpu_trace_count = 0;
            }
            cpu_reg_display(NULL);
            cpu_disasm(CPU_REG_SRR0, TRUE);
            break;
        case 0x0E00:
            printf(EXCEPT, exception, "Floating-Point Assist");
            cpu_reg_display(NULL);
            cpu_disasm(CPU_REG_SRR0, TRUE);
            break;
        case 0x0F00:
            printf(EXCEPT, exception, "Reserved");
            cpu_reg_display(NULL);
            cpu_disasm(CPU_REG_SRR0, TRUE);
            break;
        case 0x1000:
            if (!user_brkpnt)
            {
                printf(EXCEPT, exception, "Software Emulation");
                cpu_reg_display(NULL);
                cpu_disasm(CPU_REG_SRR0, TRUE);
            }
            else
            {
                if ((ADDRESS)cpu_step_over == (ADDRESS)CPU_REG_SRR0)
                {
                    /* clean up at end of handler */
                    cpu_reg_display(NULL);
                    cpu_disasm(CPU_REG_SRR0, TRUE);
                    break;
                }
                if (user_triggered)
                {
                    printf("Breakpoint encountered at %#08X\n",
                        CPU_REG_SRR0);
                    cpu_reg_display(NULL);
                    cpu_disasm(CPU_REG_SRR0, TRUE);
                }
                /* else reinstall breakpoints and continue */
                /* execution of the task...we will return  */
                /* task from here, not write out regs and RFI */
                else
                {
                    if (breakpoint_install((ADDRESS)context.srr0))
                    {
                        /* about to execute at breakpoint */
                        /* trace thru rather than breaking */
                        trace_thru = CPU_REG_SRR0;
                        /* turn tracing on */
                        CPU_REG_MSR |= MPC8XX_MSR_SE;
                        cpu_handler_flag = EXEC_RFI;