mpc8xx_ucode.c

motorola 针对coldfire 5275 评估板的Dbug bootloader源程序

/*
 * File:        mpc8xx_ucode.c
 * Purpose:     MPC8XX CPM Microcode patch for I2C and SPI to allow
 *              concurrent operation with Ethernet.
 *
 * Notes:       Microcode patch obtained from Netcomm.
 *
 *
 * Modifications:
 *
 */

/********************************************************************/

#include "src/include/dbug.h"

/********************************************************************/

/*
 * This microcode patch must be downloaded to the start of the
 * Dual-Port RAM, offset 0x2000.  It occupies 0x2000 thru 0x21FF.
 *
 * NOTE: The microcode doesn't fill 0x2000 thru 0x21FF completely.
 * The remaining space from end of microcode to 0x21FF is reserved
 * for use of the microcode patch.
 */

static const uint32
MPC8XX_I2C_SPI_UCODE_P1[] =
{
    0x7FFFEFD9,
    0x3FFD0000,
    0x7FFB49F7,
    0x7FF90000,
    0x5FEFADF7,
    0x5F89ADF7,
    0x5FEFAFF7,
    0x5F89AFF7,
    0x3A9CFBC8,
    0xE7C0EDF0,
    0x77C1E1BB,
    0xF4DC7F1D,
    0xABAD932F,
    0x4E08FDCF,
    0x6E0FAFF8,
    0x7CCF76CF,
    0xFD1FF9CF,
    0xABF88DC6,
    0xAB5679F7,
    0xB0937383,
    0xDFCE79F7,
    0xB091E6BB,
    0xE5BBE74F,
    0xB3FA6F0F,
    0x6FFB76CE,
    0xEE0DF9CF,
    0x2BFBEFEF,
    0xCFEEF9CF,
    0x76CEAD24,
    0x90B2DF9A,
    0x7FDDD0BF,
    0x4BF847FD,
    0x7CCF76CE,
    0xCFEF7E1F,
    0x7F1D7DFD,
    0xF0B6EF71,
    0x7FC177C1,
    0xFBC86079,
    0xE722FBC8,
    0x5FFFDFFF,
    0x5FB2FFFB,
    0xFBC8F3C8,
    0x94A67F01,
    0x7F1D5F39,
    0xAFE85F5E,
    0xFFDFDF96,
    0xCB9FAF7D,
    0x5FC1AFED,
    0x8C1C5FC1,
    0xAFDD5FC3,
    0xDF9A7EFD,
    0xB0B25FB2,
    0xFFFEABAD,
    0x5FB2FFFE,
    0x5FCE600B,
    0xE6BB600B,
    0x5FCEDFC6,
    0x27FBEFDF,
    0x5FC8CFDE,
    0x3A9CE7C0,
    0xEDF0F3C8,
    0x7F0154CD,
    0x7F1D2D3D,
    0x363A7570,
    0x7E0AF1CE,
    0x37EF2E68,
    0x7FEE10EC,
    0xADF8EFDE,
    0xCFEAE52F,
    0x7D0FE12B,
    0xF1CE5F65,
    0x7E0A4DF8,
    0xCFEA5F72,
    0x7D0BEFEE,
    0xCFEA5F74,
    0xE522EFDE,
    0x5F74CFDA,
    0x0B627385,
    0xDF627E0A,
    0x30D8145B,
    0xBFFFF3C8,
    0x5FFFDFFF,
    0xA7F85F5E,
    0xBFFE7F7D,
    0x10D31450,
    0x5F36BFFF,
    0xAF785F5E,
    0xBFFDA7F8,
    0x5F36BFFE,
    0x77FD30C0,
    0x4E08FDCF,
    0xE5FF6E0F,
    0xAFF87E1F,
    0x7E0FFD1F,
    0xF1CF5F1B,
    0xABF80D5E,
    0x5F5EFFEF,
    0x79F730A2,
    0xAFDD5F34,
    0x47F85F34,
    0xAFED7FDD,
    0x50B24978,
    0x47FD7F1D,
    0x7DFD70AD,
    0xEF717EC1,
    0x6BA47F01,
    0x2D267EFD,
    0x30DE5F5E,
    0xFFFD5F5E,
    0xFFEF5F5E,
    0xFFDF0CA0,
    0xAFED0A9E,
    0xAFDD0C3A,
    0x5F3AAFBD,
    0x7FBDB082,
    0x5F8247F8,
};

/********************************************************************/

/*
 * This microcode patch must be downloaded to the Dual-Port RAM,
 * starting at offset 0x2F00.  It occupies 0x2F00 thru 0x2FFF.
 */
static const uint32
MPC8XX_I2C_SPI_UCODE_P2[] =
{
    0x3E303430,
    0x34343737,
    0xABF7BF9B,
    0x994B4FBD,
    0xBD599493,
    0x349FFF37,
    0xFB9B177D,
    0xD9936956,
    0xBBFDD697,
    0xBDD2FD11,
    0x31DB9BB3,
    0x63139637,
    0x93733693,
    0x193137F7,
    0x331737AF,
    0x7BB9B999,
    0xBB197957,
    0x7FDFD3D5,
    0x73B773F7,
    0x37933B99,
    0x1D115316,
    0x99315315,
    0x31694BF4,
    0xFBDBD359,
    0x31497353,
    0x76956D69,
    0x7B9D9693,
    0x13131979,
    0x79376935,
};

/********************************************************************/
void
mpc8xx_ucode_patch (int reloc)
{
    /*
     * This routine downloads the microcode patch to the appropriate
     * address and relocates either I2C or SPI PRAM accordingly.
     */
    MPC8XX_IMM *imm = mpc8xx_get_immp();
    volatile uint32 *dprp;
    unsigned index;

    /*
     * Allow microcode downloads
     */
    imm->cp.RCCR = 0;

    /*
     * Download microcode fix part 1 to DPRAM start, offset 0x2000
     */
    dprp = &imm->dpram.ucode1[0];
    for (index = 0; index < (sizeof(MPC8XX_I2C_SPI_UCODE_P1)>>2); ++index)
    {
        dprp[index] = MPC8XX_I2C_SPI_UCODE_P1[index];
    }

    /*
     * Download microcode fix part 2 to DPRAM, offset 0x2F00
     */
    dprp = &imm->dpram.ucode4[0] + (256 >> 2);
    for (index = 0; index < (sizeof(MPC8XX_I2C_SPI_UCODE_P2)>>2); ++index)
    {
        dprp[index] = MPC8XX_I2C_SPI_UCODE_P2[index];
    }

    /*
     * Make necessary changes to CPM RCTR to do the relocation
     */
    if (reloc == MPC8XX_UCODE_RELOC_I2C)
    {
        imm->cp.CPMCR3 = 0x802E;
        imm->cp.CPMCR4 = 0x802C;
        imm->cp.RCCR |= MPC8XX_CP_RCCR_ERAM_512;
    }
    else if (reloc == MPC8XX_UCODE_RELOC_SPI)
    {
        imm->cp.CPMCR1 = 0x802A;
        imm->cp.CPMCR2 = 0x8028;
        imm->cp.RCCR |= MPC8XX_CP_RCCR_ERAM_512;
    }
}

/********************************************************************/