⭐ 欢迎来到虫虫下载站! | 📦 资源下载 📁 资源专辑 ℹ️ 关于我们
⭐ 虫虫下载站

📄 mcf5213_hi.c

📁 motorola 针对coldfire 5275 评估板的Dbug bootloader源程序
💻 C
📖 第 1 页 / 共 2 页
字号:
{																  
    {"EPPAR",   (uint32)(&__IPSBAR[0x130000]), 16, RW},
    {"EPDDR",   (uint32)(&__IPSBAR[0x130002]),  8, RW},
    {"EPIER",   (uint32)(&__IPSBAR[0x130003]),  8, RW},
    {"EPDR",    (uint32)(&__IPSBAR[0x130004]),  8, RW},
    {"EPPDR",   (uint32)(&__IPSBAR[0x130005]),  8, RW},
    {"EPFR",    (uint32)(&__IPSBAR[0x130006]),  8, RW}
};

static const REG PIT0[] = 										  
{																  
    {"PCSR",    (uint32)(&__IPSBAR[0x150000]), 16, RW},
    {"PMR",     (uint32)(&__IPSBAR[0x150002]), 16, RW},
    {"PCNTR",   (uint32)(&__IPSBAR[0x150004]), 16, RW}
};

static const REG PIT1[] = 										  
{																  
    {"PCSR",    (uint32)(&__IPSBAR[0x160000]), 16, RW},
    {"PMR",     (uint32)(&__IPSBAR[0x160002]), 16, RW},
    {"PCNTR",   (uint32)(&__IPSBAR[0x160004]), 16, RW}
};

static const REG ADC[] = 										  
{																  
    {"CTRL1",   (uint32)(&__IPSBAR[0x190000]), 16, RW},
    {"CTRL2",   (uint32)(&__IPSBAR[0x190002]), 16, RW},
    {"ADZCC",   (uint32)(&__IPSBAR[0x190004]), 16, RW},
    {"ADLST1",  (uint32)(&__IPSBAR[0x190006]), 16, RW},
    {"ADLST2",  (uint32)(&__IPSBAR[0x190008]), 16, RW},
    {"ADSDIS",  (uint32)(&__IPSBAR[0x19000A]), 16, RW},
    {"ADSTAT",  (uint32)(&__IPSBAR[0x19000C]), 16, RW},
    {"ADLSTAT", (uint32)(&__IPSBAR[0x19000E]), 16, RW},
    {"ADZCSTAT",(uint32)(&__IPSBAR[0x190010]), 16, RW},
    {"ADRSLT0", (uint32)(&__IPSBAR[0x190012]), 16, RW},
    {"ADRSLT1", (uint32)(&__IPSBAR[0x190014]), 16, RW},
    {"ADRSLT2", (uint32)(&__IPSBAR[0x190016]), 16, RW},
    {"ADRSLT3", (uint32)(&__IPSBAR[0x190018]), 16, RW},
    {"ADRSLT4", (uint32)(&__IPSBAR[0x19001A]), 16, RW},
    {"ADRSLT5", (uint32)(&__IPSBAR[0x19001C]), 16, RW},
    {"ADRSLT6", (uint32)(&__IPSBAR[0x19001E]), 16, RW},
    {"ADRSLT7", (uint32)(&__IPSBAR[0x190020]), 16, RW},
    {"ADLLMT0", (uint32)(&__IPSBAR[0x190022]), 16, RW},
    {"ADLLMT1", (uint32)(&__IPSBAR[0x190024]), 16, RW},
    {"ADLLMT2", (uint32)(&__IPSBAR[0x190026]), 16, RW},
    {"ADLLMT3", (uint32)(&__IPSBAR[0x190028]), 16, RW},
    {"ADLLMT4", (uint32)(&__IPSBAR[0x19002A]), 16, RW},
    {"ADLLMT5", (uint32)(&__IPSBAR[0x19002C]), 16, RW},
    {"ADLLMT6", (uint32)(&__IPSBAR[0x19002E]), 16, RW},
    {"ADLLMT7", (uint32)(&__IPSBAR[0x190030]), 16, RW},
    {"ADHLMT0", (uint32)(&__IPSBAR[0x190032]), 16, RW},
    {"ADHLMT1", (uint32)(&__IPSBAR[0x190034]), 16, RW},
    {"ADHLMT2", (uint32)(&__IPSBAR[0x190036]), 16, RW},
    {"ADHLMT3", (uint32)(&__IPSBAR[0x190038]), 16, RW},
    {"ADHLMT4", (uint32)(&__IPSBAR[0x19003A]), 16, RW},
    {"ADHLMT5", (uint32)(&__IPSBAR[0x19003C]), 16, RW},
    {"ADHLMT6", (uint32)(&__IPSBAR[0x19003E]), 16, RW},
    {"ADHLMT7", (uint32)(&__IPSBAR[0x190040]), 16, RW},
    {"ADOFS0",  (uint32)(&__IPSBAR[0x190042]), 16, RW},
    {"ADOFS1",  (uint32)(&__IPSBAR[0x190044]), 16, RW},
    {"ADOFS2",  (uint32)(&__IPSBAR[0x190046]), 16, RW},
    {"ADOFS3",  (uint32)(&__IPSBAR[0x190048]), 16, RW},
    {"ADOFS4",  (uint32)(&__IPSBAR[0x19004A]), 16, RW},
    {"ADOFS5",  (uint32)(&__IPSBAR[0x19004C]), 16, RW},
    {"ADOFS6",  (uint32)(&__IPSBAR[0x19004E]), 16, RW},
    {"ADOFS7",  (uint32)(&__IPSBAR[0x190050]), 16, RW},
    {"POWER",   (uint32)(&__IPSBAR[0x190052]), 16, RW},
    {"CAL",     (uint32)(&__IPSBAR[0x190054]), 16, RW}
};													
												
static const REG PWM[] = 									  
{																  
    {"PWME",    (uint32)(&__IPSBAR[0x1B0000]),  8, RW},
    {"PWMPOL",  (uint32)(&__IPSBAR[0x1B0001]),  8, RW},
    {"PWMCLK",  (uint32)(&__IPSBAR[0x1B0002]),  8, RW},
    {"PWMPRCLK",(uint32)(&__IPSBAR[0x1B0003]),  8, RW},
    {"PWMCAE",  (uint32)(&__IPSBAR[0x1B0004]),  8, RW},
    {"PWMCTL",  (uint32)(&__IPSBAR[0x1B0005]),  8, RW},
    {"PWMSCLA", (uint32)(&__IPSBAR[0x1B0008]),  8, RW},
    {"PWMSCLB", (uint32)(&__IPSBAR[0x1B0009]),  8, RW},
    {"PWMCNT0", (uint32)(&__IPSBAR[0x1B000C]),  8, RW},
    {"PWMCNT1", (uint32)(&__IPSBAR[0x1B000D]),  8, RW},
    {"PWMCNT2", (uint32)(&__IPSBAR[0x1B000E]),  8, RW},
    {"PWMCNT3", (uint32)(&__IPSBAR[0x1B000F]),  8, RW},
    {"PWMCNT4", (uint32)(&__IPSBAR[0x1B0010]),  8, RW},
    {"PWMCNT5", (uint32)(&__IPSBAR[0x1B0011]),  8, RW},
    {"PWMCNT6", (uint32)(&__IPSBAR[0x1B0012]),  8, RW},
    {"PWMCNT7", (uint32)(&__IPSBAR[0x1B0013]),  8, RW},
    {"PWMPER0", (uint32)(&__IPSBAR[0x1B0012]),  8, RW},
    {"PWMPER1", (uint32)(&__IPSBAR[0x1B0013]),  8, RW},
    {"PWMPER2", (uint32)(&__IPSBAR[0x1B0014]),  8, RW},
    {"PWMPER3", (uint32)(&__IPSBAR[0x1B0015]),  8, RW},
    {"PWMPER4", (uint32)(&__IPSBAR[0x1B0016]),  8, RW},
    {"PWMPER5", (uint32)(&__IPSBAR[0x1B0017]),  8, RW},
    {"PWMPER6", (uint32)(&__IPSBAR[0x1B0018]),  8, RW},
    {"PWMPER7", (uint32)(&__IPSBAR[0x1B0019]),  8, RW},
    {"PWMDTY0", (uint32)(&__IPSBAR[0x1B0018]),  8, RW},
    {"PWMDTY1", (uint32)(&__IPSBAR[0x1B0019]),  8, RW},
    {"PWMDTY2", (uint32)(&__IPSBAR[0x1B001A]),  8, RW},
    {"PWMDTY3", (uint32)(&__IPSBAR[0x1B001B]),  8, RW},
    {"PWMDTY4", (uint32)(&__IPSBAR[0x1B001C]),  8, RW},
    {"PWMDTY5", (uint32)(&__IPSBAR[0x1B001D]),  8, RW}, 
    {"PWMDTY6", (uint32)(&__IPSBAR[0x1B001E]),  8, RW}, 
    {"PWMDTY7", (uint32)(&__IPSBAR[0x1B001F]),  8, RW} 
};

static const REG CAN[] = 										  
{																  
    {"CANMCR",  (uint32)(&__IPSBAR[0x1C0000]), 32, RW},
    {"CANCTRL", (uint32)(&__IPSBAR[0x1C0004]), 32, RW},
    {"TIMER",   (uint32)(&__IPSBAR[0x1C0008]), 32, RW},
    {"RXGMASK", (uint32)(&__IPSBAR[0x1C0010]), 32, RW},
    {"RX14MASK",(uint32)(&__IPSBAR[0x1C0014]), 32, RW},
    {"RX15MASK",(uint32)(&__IPSBAR[0x1C0018]), 32, RW},
    {"ERRCNT",  (uint32)(&__IPSBAR[0x1C001C]), 32, RW},
    {"ERRSTAT", (uint32)(&__IPSBAR[0x1C0020]), 32, RW},
    {"IMASK",   (uint32)(&__IPSBAR[0x1C002A]), 16, RW},
    {"IFLAG",   (uint32)(&__IPSBAR[0x1C0032]), 16, RW}
};

static const REG CFM[] = 										  
{																  
    {"CFMMCR",  (uint32)(&__IPSBAR[0x1D0000]), 16, RW},
    {"CFMCLKD", (uint32)(&__IPSBAR[0x1D0002]),  8, RW},
    {"CFMSEC",  (uint32)(&__IPSBAR[0x1D0008]), 32, RW},
    {"CFMPROT", (uint32)(&__IPSBAR[0x1D0010]), 32, RW},
    {"CFMSACC", (uint32)(&__IPSBAR[0x1D0014]), 32, RW},
    {"CFMDACC", (uint32)(&__IPSBAR[0x1D0018]), 32, RW},
    {"CFMUSTAT",(uint32)(&__IPSBAR[0x1D0020]),  8, RW},
    {"CFMCMD",  (uint32)(&__IPSBAR[0x1D0024]),  8, RW}
};

typedef const struct											 
{																 
    char*   mname;												 
    int     msize;												 
    REG*    mstruct;											 
} MOD;															 
																 
static const MOD soc[] =										 
{																 
    {"SCM",     sizeof(SCM)/sizeof(REG),    SCM},				 
    {"PMM",     sizeof(PMM)/sizeof(REG),    PMM},				 
    {"DMA",     sizeof(DMA)/sizeof(REG),    DMA},
    {"UART0",   sizeof(UART0)/sizeof(REG),  UART0},
    {"UART1",   sizeof(UART1)/sizeof(REG),  UART1},
    {"UART2",   sizeof(UART2)/sizeof(REG),  UART2},
    {"I2C",     sizeof(I2C)/sizeof(REG),    I2C},
    {"QSPI",    sizeof(QSPI)/sizeof(REG),   QSPI},
    {"DTIM0",   sizeof(DTIM0)/sizeof(REG),  DTIM0},
    {"DTIM1",   sizeof(DTIM1)/sizeof(REG),  DTIM1},
    {"DTIM2",   sizeof(DTIM2)/sizeof(REG),  DTIM2},
    {"DTIM3",   sizeof(DTIM3)/sizeof(REG),  DTIM3},
    {"INTC",    sizeof(INTC)/sizeof(REG),   INTC},
    {"GPIO",    sizeof(GPIO)/sizeof(REG),   GPIO},
    {"CIM",     sizeof(CIM)/sizeof(REG),    CIM},
    {"CLOCK",   sizeof(CLOCK)/sizeof(REG),  CLOCK},
    {"EPORT",   sizeof(EPORT)/sizeof(REG),  EPORT},
    {"PIT0",    sizeof(PIT0)/sizeof(REG),   PIT0},
    {"PIT1",    sizeof(PIT1)/sizeof(REG),   PIT1},
    {"ADC",     sizeof(ADC)/sizeof(REG),    ADC},
    {"PWM",     sizeof(PWM)/sizeof(REG),    PWM},
    {"CAN",     sizeof(CAN)/sizeof(REG),    CAN},
    {"CFM",     sizeof(CFM)/sizeof(REG),    CFM}
};

#define NUM_MODULES (int)(sizeof(soc)/sizeof(MOD))

/********************************************************************/
void
mcf5213_irmd (int argc, char **argv)
{
    uint32 value;
    char *rstr;
    char mstr[20];
    int ri, mi, success;
    int modify, display_all, displayed;

    modify = FALSE;
    display_all = FALSE;
    
    if (argc == 1)
    {
        printf("Internal Modules (IPSBAR = %#08X):",IPSBAR_ADDRESS);
        for (mi = 0; mi < NUM_MODULES; ++mi)
        {
            if (!(mi % 8))
                printf("\n");
            printf("%-8s ",soc[mi].mname);
        }
        printf("\n\n");
        return;
    }

    /*
     * Pick out module name and point to register name
     */
    mi = 0;
    rstr = argv[1];
    while (*rstr != '.')
    {
        mstr[mi++] = *rstr;
        if (*++rstr == '\0')
        {
            rstr = NULL;
            break;
        }
    }
    mstr[mi] = '\0';

    if (rstr != NULL)
        if (*rstr == '.')
            ++rstr;
        
    if (rstr == NULL)
        display_all = TRUE;
    

    /*
     * Get the new value
     */
    if (argc == 3)
    {
        if (rstr == NULL)
        {
            printf("Error:  Invalid Register:  %s\n",argv[1]);
            return;
        }
        value = get_value(argv[2],&success,16);
        if (success == 0)
        {
            printf(INVALUE,argv[2]);
            return;
        }
        modify = TRUE;
    }

    for (mi = 0; mi < NUM_MODULES; ++mi)
    {
        if (strcasecmp(soc[mi].mname, mstr) == 0)
        {
            if (modify == FALSE)
            {
                printf("Module: %s\n", soc[mi].mname);
                displayed = 1;
            }
            
            for (ri = 0; ri < soc[mi].msize; ++ri)
            {
                /* Modify */
                if (modify &&
                    strcasecmp(soc[mi].mstruct[ri].rn, rstr) == 0)
                {
                    if (soc[mi].mstruct[ri].rp & WR)
                    {
                        if (soc[mi].mstruct[ri].rs == 8)
                            *(vuint8*)soc[mi].mstruct[ri].ra = value;
                        
                        else if (soc[mi].mstruct[ri].rs == 16)
                            *(vuint16*)soc[mi].mstruct[ri].ra = value;
                        
                        else 
                            *(vuint32*)soc[mi].mstruct[ri].ra = value;
                    }
                    else
                        printf("%s is read-only\n", soc[mi].mstruct[ri].rn);
                    
                    return;
                }
                
                /* Display */
                if (display_all || 
                    strcasecmp(soc[mi].mstruct[ri].rn, rstr) == 0)
                {
                    if (soc[mi].mstruct[ri].rp & RD)
                    {
                        if (soc[mi].mstruct[ri].rs == 8)
                            printf(FORMAT8, 
                                   soc[mi].mstruct[ri].rn,
                                   *(vuint8*)soc[mi].mstruct[ri].ra);
                        
                        else if (soc[mi].mstruct[ri].rs == 16)
                            printf(FORMAT16, 
                                   soc[mi].mstruct[ri].rn,
                                   *(vuint16*)soc[mi].mstruct[ri].ra);
                        
                        else 
                            printf(FORMAT32, 
                                   soc[mi].mstruct[ri].rn,
                                   *(vuint32*)soc[mi].mstruct[ri].ra);
                    }
                    else /* write-only */
                    {
                        if (soc[mi].mstruct[ri].rs == 8)
                            printf("%15s : --\n", soc[mi].mstruct[ri].rn);
                        
                        else if (soc[mi].mstruct[ri].rs == 16)
                            printf("%15s : ----\n", soc[mi].mstruct[ri].rn);
                        
                        else 
                            printf("%15s : --------\n", soc[mi].mstruct[ri].rn);
                    }

                    if (pause(&displayed))
                        return;
                }
            }
            return;
        }
    }

    printf(INVMOD,argv[1]);
}
/********************************************************************/
void
cpu_handle_interrupt (int vector)
{
    if (vector < 64 || vector > 192)
        return;
    switch (vector)
    {
        case 65: /* Eport Interrupt 1 */
        case 66: /* Eport Interrupt 2 */
        case 67: /* Eport Interrupt 3 */
        case 68: /* Eport Interrupt 4 */
        case 69: /* Eport Interrupt 5 */
        case 70: /* Eport Interrupt 6 */
        case 71: /* Eport Interrupt 7 */

            /* 
             * Clear the interrupt source 
             * This clears the flag for edge triggered interrupts
             */
            MCF_EPORT_EPFR = (uint8)(0x01 << (vector - 64));
            printf("Edge Port Interrupt #%d\n",vector - 64);
            break;  
        default:
            printf("User Defined Vector #%d\n",vector);
            break;
    }
}
/********************************************************************/
/*
 * Pause for the specified number of micro-seconds.
 * Uses DTIM3 as a timer
 */
void
cpu_pause_usec(int usecs)
{
    /* Enable the DMA Timer 3 */
    MCF_DTIM3_DTRR = (usecs - 1);
    MCF_DTIM3_DTER = MCF_DTIM_DTER_REF;
    MCF_DTIM3_DTMR = 0
        | MCF_DTIM_DTMR_PS(sys_clk_khz / 1000)
        | MCF_DTIM_DTMR_ORRI
        | MCF_DTIM_DTMR_FRR
        | MCF_DTIM_DTMR_CLK_DIV1
        | MCF_DTIM_DTMR_RST;

    while ((MCF_DTIM3_DTER & MCF_DTIM_DTER_REF) == 0) 
    {};
    
    /* Disable the timer */
    MCF_DTIM3_DTMR = 0;
}
/********************************************************************/

⌨️ 快捷键说明

复制代码 Ctrl + C
搜索代码 Ctrl + F
全屏模式 F11
切换主题 Ctrl + Shift + D
显示快捷键 ?
增大字号 Ctrl + =
减小字号 Ctrl + -