mcf5xxx_hi.c

motorola 针对coldfire 5275 评估板的Dbug bootloader源程序

/*
 * File:        src/cpu/coldfire/mcf5xxx/mcf5xxx_hi.c
 * Purpose:     Higher level processing for MCF5xxx processors.
 *
 * Notes:       
 *
 */

/********************************************************************/

#include "src/include/dbug.h"
#include "src/uif/cpu.h"
#include "src/uif/bkpt.h"

/********************************************************************/

/*
 * This defines the data structure which will hold the values
 * of the registers of the user task.
 */
REGISTERS context;

/********************************************************************/

/*
 * This structure contains info about the registers.  The name
 * is given so that users can type it.
 */
typedef struct
{
    const char *    name;
    const void *    ptr;
    const int       size;
} reg_entry;

/*
 * The method for specifying the pointer to the register in the
 * 'context' data structure is to ensure that no matter which 
 * compiler is used, the offsets are the same.  (ANSI C doesn't
 * specify how the context of a structure/array are stored.)
 */
static const reg_entry registers[] =
{
    { "D0", &context.d0, 32 },
    { "D1", &context.d1, 32 },
    { "D2", &context.d2, 32 },
    { "D3", &context.d3, 32 },
    { "D4", &context.d4, 32 },
    { "D5", &context.d5, 32 },
    { "D6", &context.d6, 32 },
    { "D7", &context.d7, 32 },

    { "A0", &context.a0, 32 },
    { "A1", &context.a1, 32 },
    { "A2", &context.a2, 32 },
    { "A3", &context.a3, 32 },
    { "A4", &context.a4, 32 },
    { "A5", &context.a5, 32 },
    { "A6", &context.a6, 32 },
    { "A7", &context.a7, 32 },

#ifdef CPU_MCF_FPU
    { "FP0",  &context.fp0,  32 },
    { "FP0l", &context.fp0l, 32 },
    { "FP1",  &context.fp1,  32 },
    { "FP1l", &context.fp1l, 32 },
    { "FP2",  &context.fp2,  32 },
    { "FP2l", &context.fp2l, 32 },
    { "FP3",  &context.fp3,  32 },
    { "FP3l", &context.fp3l, 32 },
    { "FP4",  &context.fp4,  32 },
    { "FP4l", &context.fp4l, 32 },
    { "FP5",  &context.fp5,  32 },
    { "FP5l", &context.fp5l, 32 },
    { "FP6",  &context.fp6,  32 },
    { "FP6l", &context.fp6l, 32 },
    { "FP7",  &context.fp7,  32 },
    { "FP7l", &context.fp7l, 32 },

    { "FPCR",  &context.fpcr,  32 },
    { "FPSR",  &context.fpsr,  32 },
    { "FPIAR", &context.fpiar, 32 },
#endif

    { "PC", &context.pc, 32 },
    { "SR", &context.sr, 16 },

    { "SP", &context.a7, 32 },
} ;

#define REGTAB_SIZE (int)(sizeof(registers) / sizeof(reg_entry))

/********************************************************************/

/*
 * When cpu_handler() returns, a value of 0 means restore the context
 * and perform an RTE to continue executing code.  A non-zero return
 * value drops back to the command prompt.
 */
#define EXEC_RTE    0
#define EXEC_DBUG   1

/********************************************************************/


ADDRESS
cpu_step_over;

int
cpu_trace_count;

static ADDRESS
trace_thru;

#if (defined(CPU_MCF5272))
extern void ext_irq6_handler(void);
#endif

/********************************************************************/
static int
find_register (char *reg)
{
    int index;

    for (index = 0; index < REGTAB_SIZE; index++)
    {
        if (strcasecmp(registers[index].name,reg) == 0)
            return index;
    }
    return -1;
}

/********************************************************************/
static void
dump_gprs (void)
{
    printf("An: %08X %08X %08X %08X %08X %08X %08X %08X\n",
        context.a0,
        context.a1,
        context.a2,
        context.a3,
        context.a4,
        context.a5,
        context.a6,
        context.a7 );
        
    printf("Dn: %08X %08X %08X %08X %08X %08X %08X %08X\n",
        context.d0,
        context.d1,
        context.d2,
        context.d3,
        context.d4,
        context.d5,
        context.d6,
        context.d7 );
}
/********************************************************************/
#ifdef CPU_MCF_FPU
static void
dump_fprs (void)
{
    printf("FPCR:  %08X\n",context.fpcr);
    printf("FPSR:  %08X\n",context.fpsr);
    printf("FPIAR: %08X\n",context.fpiar);
    printf("FP0-3: %08X%08X %08X%08X %08X%08X %08X%08X\n",
        context.fp0, context.fp0l,
        context.fp1, context.fp1l,
        context.fp2, context.fp2l,
        context.fp3, context.fp3l );
    printf("FP4-7: %08X%08X %08X%08X %08X%08X %08X%08X\n",
        context.fp4, context.fp4l,
        context.fp5, context.fp5l,
        context.fp6, context.fp6l,
        context.fp7, context.fp7l );
}
#endif
/********************************************************************/
static void
dump_sr (uint16 sr)
{
    char sr_buffer[17];
    register int i;
    int32 mask = MCF5XXX_SR_T;
    int32 result;

    for (i = 0; i < 16; i++)
    {
        result = mask & sr;
        mask = mask >> 1;

        switch (i)      /* going from left to right, don't be fooled */
        {
            case 0:
                if (result)
                    sr_buffer[i] = 'T';
                else
                    sr_buffer[i] = 't';
                break;
            case 1:
            case 4:
            case 8:
            case 9:
            case 10:
                    sr_buffer[i] = '.';
                    break;
            case 2:
                if (result)
                    sr_buffer[i] = 'S';
                else
                    sr_buffer[i] = 's';
                break;
            case 3:
                if (result)
                    sr_buffer[i] = 'M';
                else
                    sr_buffer[i] = 'm';
                break;
            case 5:
            case 6:
            case 7:
                if (result)
                    sr_buffer[i] = '1';
                else
                    sr_buffer[i] = '0';
                break;
            case 11:
                if (result)
                    sr_buffer[i] = 'X';
                else
                    sr_buffer[i] = 'x';
                break;
            case 12:
                if (result)
                    sr_buffer[i] = 'N';
                else
                    sr_buffer[i] = 'n';
                break;
            case 13:
                if (result)
                    sr_buffer[i] = 'Z';
                else
                    sr_buffer[i] = 'z';
                break;
            case 14:
                if (result)
                    sr_buffer[i] = 'V';
                else
                    sr_buffer[i] = 'v';
                break;
            case 15:
                if (result)
                    sr_buffer[i] = 'C';
                else
                    sr_buffer[i] = 'c';
                break;
            default:
                break;
        }
    }
    sr_buffer[i] = 0;
    printf("%s",sr_buffer);
}

/********************************************************************/
static void
dump_fs (void *framep)
{
    int fault = MCF5XXX_RD_SF_FS(framep);

    printf(" FS=%X, ",fault);

    switch (fault)
    {
        case 0x04:
            printf("Physical bus error on instruction fetch");
            break;
        case 0x08:
            printf("Physical bus error on operand write");
            break;
        case 0x09:
            printf("Attempted write to write-protected space");
            break;
        case 0x0C:
            printf("Physical bus error on operand read");
            break;
        default:
            printf("Reserved");
            break;
    }
    printf("\n");
}

/********************************************************************/
void
cpu_init (void)
{
    trace_thru = NULL;
    cpu_step_over = NULL;
    cpu_trace_count = 0;

    context.sr = MCF5XXX_SR_S;
}

/********************************************************************/
void
cpu_reg_modify (char *reg, uint32 value)
{
    int index;
    if ((index = find_register(reg)) != -1)
    {
        switch (registers[index].size)
        {
            case SIZE_16:
                *(uint16 *)registers[index].ptr = (uint16)value;
                break;
            case SIZE_32:
            default:
                *(uint32 *)registers[index].ptr = (uint32)value;
                break;
        }
    }
    else
    {
        printf(INVREG,reg);
    }
}

/********************************************************************/
void
cpu_reg_display (char *reg)
{
    int index;

    if (reg == NULL)
    {
        printf("PC: %08X ", context.pc);
        printf("SR: %04X [", context.sr);
        dump_sr(context.sr);
        printf("]\n");
        dump_gprs();
    }
    else
    {
        if ((index = find_register(reg)) != -1)
        {
            switch (registers[index].size)
            {
                case SIZE_16:
                    printf("%s:  %04X\n",
                        registers[index].name,
                        *(uint16 *)(registers[index].ptr));
                    break;
                case SIZE_32:
                default:
                    printf("%s:  %08X\n",
                        registers[index].name,
                        *(uint32 *)(registers[index].ptr));
            }
            return;
        }
#ifdef CPU_MCF_FPU
        else
        {
            if (strcasecmp(reg,"fpu") == 0)
            {
                dump_fprs();
                return;
            }
        }
#endif
    printf(INVREG,reg);
    }
}

/********************************************************************/
void
cpu_pc_modify (ADDRESS address)
{
    context.pc = address;
}

/********************************************************************/
ADDRESS
cpu_pc_get (void)
{
    return context.pc;
}

/********************************************************************/
int
cpu_parse_size (char *arg)
{