mpc860.h

motorola 针对coldfire 5275 评估板的Dbug bootloader源程序

/*
 * File:        cpu/ppc/mpc8xx/mpc860.h
 * Purpose:     Definitions for the MPC860 processor
 *
 * Notes:
 *
 *
 * Modifications:
 *
 */

#ifndef _CPU_MPC860_H
#define _CPU_MPC860_H

/***********************************************************************/

/*
 * Identify and obtain the modules that are available on the MPC860
 */
#define Mpc8xx_siu
#define Mpc8xx_pcmcia
#define Mpc8xx_memc
#define Mpc8xx_sit
#define Mpc8xx_clock
#define Mpc8xx_sitkey
#define Mpc8xx_clockey
#define Mpc8xx_i2c
#define Mpc8xx_dma
#define Mpc8xx_cpic
#define Mpc8xx_portio
#define Mpc8xx_cpmtimer
#define Mpc8xx_cp
#define Mpc8xx_brgs
#define Mpc8xx_scc1
#define Mpc8xx_scc2
#define Mpc8xx_scc3
#define Mpc8xx_scc4
#define Mpc8xx_smc1
#define Mpc8xx_smc2
#define Mpc8xx_spi
#define Mpc8xx_pip
#define Mpc8xx_si

#include "mpc8xx.h"

/***********************************************************************/

/*
 * This defines the entire Internal Memory Map for the MPC860.  This
 * structure is pointed to by the IMMR, spr638.
 */
typedef volatile struct
{
    uint32  ucode1[512>>2];                 /* 0.5K */
    uint32  ucode2[512>>2];                 /* 0.5K */
    uint32  ucode3[1024>>2];                /* 1.0K */
    MPC8XX_BD   bd[1536/sizeof(MPC8XX_BD)]; /* 1.5K */
    uint32  ucode4[512>>2];                 /* 0.5K */
    uint8   reserved[3072];                 /* 3.0K */

    uint8   scc1[(0x1c7f-0x1c00+1)];
    uint8   i2c[(0x1caf-0x1c80+1)];
    uint8   misc[(0x1cbf-0x1cb0+1)];
    uint8   idma1[(0x1cff-0x1cc0+1)];
    uint8   scc2[(0x1d7f-0x1d00+1)];
    uint8   spi[(0x1daf-0x1d80+1)];
    uint8   timers[(0x1dbf-0x1db0+1)];
    uint8   idma2[(0x1dff-0x1dc0+1)];
    uint8   scc3[(0x1e7f-0x1e00+1)];
    uint8   smc1[(0x1ebf-0x1e80+1)];
    uint8   dsp1[(0x1eff-0x1ec0+1)];
    uint8   scc4[(0x1f7f-0x1f00+1)];
    uint8   smc2[(0x1fbf-0x1f80+1)];
    uint8   dsp2[(0x1fff-0x1fc0+1)];

} MPC860_DPRAM;

typedef volatile struct
{
    MPC8XX_SIU      siu;
    MPC8XX_PCMCIA   pcmcia;
    MPC8XX_MEMC     memc;
    MPC8XX_SIT      sit;
    MPC8XX_CLOCK    clock;
    MPC8XX_SITKEY   sitkey;
    MPC8XX_CLOCKEY  clockey;
    uint8           reserved0[1+0x7ff-0x400];
    uint8           reserved1[1+0x85f-0x800];
    MPC8XX_I2C      i2c;
    MPC8XX_DMA      dma;
    MPC8XX_CPIC     cpic;
    MPC8XX_PORTIO   portio;
    MPC8XX_CPMTIMER cpmtimer;
    MPC8XX_CP       cp;
    MPC8XX_BRGS     brgs;
    MPC8XX_SCC      scc1;
    MPC8XX_SCC      scc2;
    MPC8XX_SCC      scc3;
    MPC8XX_SCC      scc4;
    MPC8XX_SMC      smc1;
    MPC8XX_SMC      smc2;
    MPC8XX_SPI      spi;
    MPC8XX_PIP      pip;
    MPC8XX_SI       si;

    uint8       reserved2[256];
    uint16      SIRAM[512>>1];
    uint8       reserved3[512];
    uint8       reserved4[0x1000];

    MPC860_DPRAM    dpram;

} MPC8XX_IMM, MPC860_IMM;

/***********************************************************************/

/*
 * Instruction Cache is 4K arranged as 256 lines of 16 bytes per line.
 * Data Cache is 4K arranged as 256 lines of 16 bytes per line.
 */
#define MPC8XX_ICACHE_SIZE  (4096)
#define MPC8XX_DCACHE_SIZE  (4096)

/***********************************************************************/

#endif /* _CPU_MPC860_H */