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📄 ssd_cfm.h

📁 motorola 针对coldfire 5275 评估板的Dbug bootloader源程序
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/*************************************************************************
 *           Copyright (C) 2003 by Motorola.  All rights reserved.       *
 *************************************************************************
 *                                                                       *
 *   Motorola reserves the right to make changes without further notice  *
 *   to any product herein to improve reliability, function or design.   *
 *   Motorola does not assume any liability arising out of the           *
 *   application or use of any product, circuit, or software described   *
 *   herein; neither does it convey any license under its patent rights  *
 *   nor the rights of others.                                           *
 *                                                                       *
 *   Motorola products are not designed, intended, or authorized for     *
 *   use as components in systems intended for surgical implant into     *
 *   the body, or other applications intended to support life, or for    *
 *   any other application in which the failure of the Motorola product  *
 *   could create a situation where personal injury or death may occur.  *
 *                                                                       *
 *   Should Buyer purchase or use Motorola products for any such         *
 *   unintended or unauthorized application, Buyer shall indemnify and   *
 *   hold Motorola and its officers, employees, subsidiaries,            *
 *   affiliates, and distributors harmless against all claims costs,     *
 *   damages, and expenses, and reasonable attorney fees arising out     *
 *   of, directly or indirectly, any claim of personal injury or death   *
 *   associated with such unintended or unauthorized use, even if such   *
 *   claim alleges that Motorola was negligent regarding the design      *
 *   or manufacture of the part.                                         *
 *                                                                       *
 *   Motorola and the Motorola logo* are registered trademarks of        *
 *   Motorola Ltd.                                                       *
 *                                                                       *
 *************************************************************************

 *************************************************************************
 *                                                                       *
 *               Standard Software CFM Driver for ColdFire               *
 *                                                                       *
 * FILE NAME     :  ssd_cfm.h                                            *
 * DATE          :  May 22, 2003                                         *
 *                                                                       *
 * AUTHOR        :  Flash Team, GSG China                                *
 * E-mail        :  flash@sc.mcel.mot.com                                *
 *                                                                       *
 *************************************************************************/

/******************************* CHANGES  *********************************
 1.00   5.22.2003       Morrison Yang            Initial Version
 *************************************************************************/

#ifndef _SSD_CFM_H_
#define _SSD_CFM_H_

/*------------------- Offset for CFM Control Registers ------------------*/
#define CFM_CR                              0x00000000  /* CFM Configuration Register */
#define CFM_CLKD                            0x00000002  /* CFM Clock Divider Register */
#define CFM_SEC                             0x00000008  /* CFM Security Register */
#define CFM_PROT                            0x00000010  /* CFM Rrotection Register */
#define CFM_SACC                            0x00000014  /* CFM Supervisor Access Register */
#define CFM_DACC                            0x00000018  /* CFM Data Access Register */
#define CFM_USTAT                           0x00000020  /* CFM User Status Register */
#define CFM_CMD                             0x00000024  /* CFM Command Register */

/*----------------- Bit Mask for CFM Control Registers ------------------*/
/* CFM Configuration Register */
#define CFM_CR_LOCK                         0x0400      /* Write Lock Control */
#define CFM_CR_PVIE                         0x0200      /* Protection Violation Interrupt Enable */
#define CFM_CR_AEIE                         0x0100      /* Access Error Interrupt Enable */
#define CFM_CR_CBEIE                        0x0080      /* Command Buffer Empty Interrupt Enable */
#define CFM_CR_CCIE                         0x0040      /* Command Complete Interrupt Enable */
#define CFM_CR_KEYACC                       0x0020      /* Enable Security Key Writing */

/* CFM Clock Divider Register */
#define CFM_CLKD_DIVLD                      0x80        /* Clock Divider Loaded */
#define CFM_CLKD_PRDIV8                     0x40        /* Enable Prescaler Divide by 8 */
#define CFM_CLKD_DIV                        0x3F        /* Clock Divider Field */

/* CFM Security Register */
#define CFM_SEC_KEYEN                       0x80000000   /* Enable Backdoor Key to Security Bit */
#define CFM_SEC_SECSTAT                     0x40000000   /* Flash Security Status */
#define CFM_SEC_SEC                         0x0000FFFF   /* Flash Security Field */

/* CFM User Status Register */
#define CFM_USTAT_CBEIF                     0x80         /* Command Buffer Empty Interrupt Flag */
#define CFM_USTAT_CCIF                      0x40         /* Command Complete Interrupt Flag */
#define CFM_USTAT_PVIOL                     0x20         /* Protection Violation Flag */
#define CFM_USTAT_ACCERR                    0x10         /* Access Error Flag */
#define CFM_USTAT_BLANK                     0x04         /* Erase Verified Flag */

/*-------------------------- CFM Flash Command --------------------------*/
#define CFM_CMD_MASERS                      0x41         /* Flash mass erase command */
#define CFM_CMD_PGERS                       0x40         /* Flash page erase ommand */
#define CFM_CMD_PGM                         0x20         /* Flash 32-bit program command */
#define CFM_CMD_BC                          0x05         /* Flash blank check command */
#define CFM_CMD_PGERSV                      0x06         /* Flash page erase verify command */

/*----------------- Offset in CFM Configuration Field--------------------*/
#define CFM_CONFIG_FIELD_BACKDOOR           0x00000400   /* Backdoor Comparison Key */
#define CFM_CONFIG_FIELD_PROT               0x00000408   /* Flash Program/Erase Sector Protection */
#define CFM_CONFIG_FIELD_SACC               0x0000040C   /* Flash Supervisor/User Space Restrictions */
#define CFM_CONFIG_FIELD_DACC               0x00000410   /* Flash Program/Data Space Restrictions */
#define CFM_CONFIG_FIELD_SEC                0x00000414   /* Flash Security Longword */

/*----------------------- Flash Logic Page Size -------------------------*/
#define CFM_LOGICAL_PAGE_SIZE               0x800

/*---------------------- Offset for GPACR1 Register ---------------------*/
#define IPS_GPACR1                          0x00000031   /* Grouped Peripheral Access Control Register for CFM */

/*--------------------- Bit Mask for GPACR1 Register --------------------*/
#define IPS_GPACR1_LOCK                     0x80         /* Lock control for GPACR1 */
#define IPS_GPACR1_ACCESS_CTRL              0x0F         /* Access control for CFM */

/*------------------------ Structure for GPACR1 -------------------------*/
typedef struct _GPACR1 {
    UINT32 LOCK;                    /* Lock control for GPACR1 */
    UINT32 accessCTRL;              /* Access control for CFM */
} GPACR1, *PGPACR1;

/*---------------- Macro Definition for SSD Functions -------------------*/
/* Bit Mask for Flash Logic Block */
#define CFM_BLOCK0                          0x0001     /* Flash Logic Block 0 */
#define CFM_BLOCK1                          0x0002     /* Flash Logic Block 1 */
#define CFM_BLOCK2                          0x0004     /* Flash Logic Block 2 */
#define CFM_BLOCK3                          0x0008     /* Flash Logic Block 3 */
#define CFM_BLOCK4                          0x0010     /* Flash Logic Block 4 */
#define CFM_BLOCK5                          0x0020     /* Flash Logic Block 5 */
#define CFM_BLOCK6                          0x0040     /* Flash Logic Block 6 */
#define CFM_BLOCK7                          0x0080     /* Flash Logic Block 7 */

/*---------------------- Return Code Definition -------------------------*/
/* Return code for FlashInit */
#define CFM_OK                              0x00000000
#define CFM_INFO_CLOCK_SETTING              0x00000001
#define CFM_INFO_SECURITY_ENABLED           0x00000002
#define CFM_INFO_GPACR1_ACCESS              0x00000004

/* Return code for other functions */
#define CFM_ERROR_CLOCK_NOT_SET             0x00000100
#define CFM_ERROR_ACCERR                    0x00000200
#define CFM_ERROR_PVIOL                     0x00000300
#define CFM_ERROR_ALIGNMENT                 0x00000400
#define CFM_ERROR_NOT_BLANK                 0x00000500
#define CFM_ERROR_VERIFY                    0x00000600
#define CFM_ERROR_BACKDOOR_DISABLED         0x00000700
#define CFM_ERROR_INVALID_KEY               0x00000800
#define CFM_ERROR_REG_WRITE_LOCKED          0x00000900
#define CFM_ERROR_GPACR1_WRITE_LOCKED       0x00000A00

/* Security state value */
#define CFM_NOT_SECURE                      0x00000001
#define CFM_SECURE_BACKDOOR_ENABLED         0x00000002
#define CFM_SECURE_BACKDOOR_DISABLED        0x00000004


/*-------------------- SSD Configuration Structure ----------------------*/
typedef struct _SSD_CONFIG {
    UINT32  cfmRegBase;             /* Base address of CFM control registers */
    UINT32  cfmCoreBusBase;         /* Base address of CFM core bus space */
    UINT32  cfmIPSBase;             /* Base address of CFM IPS space */
    UINT32  cfmBlockSize;           /* Size of CFM logic block */
    UINT32  cfmBlockNum;            /* Number of CFM logic block */
    UINT32  ISREnable;              /* Interrupt mode or polling mode selection flag */
    UINT32  BDMEnable;              /* Debug mode or embedded application mode selection flag */
} SSD_CONFIG, *PSSD_CONFIG;

/*-------------------- Function Prototypes for SSD ----------------------*/
/* Flash initialization */
UINT32 FlashInit (PSSD_CONFIG pSSDConfig, 
                  UINT32 addrIPSBAR, 
                  UINT32 clockDivider);

/* Flash mass erase */
UINT32 MassErase (PSSD_CONFIG pSSDConfig, 
                  UINT32 enabledBlocks, 
                  void (*CallBack)(void));

/* Flash mass erase verify */
UINT32 MassEraseVerify (PSSD_CONFIG pSSDConfig, 
                        UINT32 enabledBlocks, 
                        void (*CallBack)(void));

/* Flash page erase */
UINT32 PageErase (PSSD_CONFIG pSSDConfig, 
                  UINT32 dest, 
                  UINT32 number, 
                  void (*CallBack)(void));

/* Flash page erase verify */
UINT32 PageEraseVerify (PSSD_CONFIG pSSDConfig, 
                        UINT32 dest, 
                        UINT32 number, 
                        UINT32 *pFailPageLoc, 
                        void (*CallBack)(void));

/* Flash blank check */
UINT32 BlankCheck (PSSD_CONFIG pSSDConfig, 

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