initsys.h

F2812 不同的SPI(温度 EEPROM 时钟)外设通讯程序

//#include "InitSys.h"        

#ifndef SYSCTRL_H_H_H
#define SYSCTRL_H_H_H


typedef int int16;
typedef unsigned int Uint16;
typedef long int32;
typedef unsigned long Uint32;
typedef interrupt void(*PINT)(void);
extern cregister volatile unsigned int IER;

#define CPU_RATE    6.667L
#define DELAY_US(A)  DSP28x_usDelay(((((long double) A * 1000.0L) / (long double)CPU_RATE) - 9.0L) / 5.0L)

#define  EINT   asm(" clrc INTM")
#define  DINT   asm(" setc INTM")
#define  EALLOW asm(" EALLOW")
#define  EDIS   asm(" EDIS")
#define  ERTM   asm(" clrc DBGM")

struct HISPCP_BITS  {   // bits  description
   Uint16 HSPCLK:3;     // 2:0   Rate relative to SYSCLKOUT
   Uint16 rsvd1:13;     // 15:3  reserved
};

union HISPCP_REG {
   Uint16              all;
   struct HISPCP_BITS  bit;
};

// Low speed peripheral clock register bit definitions:
struct LOSPCP_BITS  {   // bits  description
   Uint16 LSPCLK:3;     // 2:0   Rate relative to SYSCLKOUT
   Uint16 rsvd1:13;     // 15:3  reserved
};

union LOSPCP_REG {
   Uint16              all;
   struct LOSPCP_BITS  bit;
};

// Peripheral clock control register bit definitions:
struct PCLKCR_BITS  {   // bits  description
   Uint16 EVAENCLK:1;   // 0     Enable high speed clk to EV-A
   Uint16 EVBENCLK:1;   // 1     Enable high speed clk to EV-B
   Uint16 rsvd1:1;      // 2 
   Uint16 ADCENCLK:1;   // 3     Enable high speed clk to ADC
   Uint16 rsvd2:4;      // 7:4   reserved
   Uint16 SPIENCLK:1;   // 8     Enable low speed clk to SPI
   Uint16 rsvd3:1;      // 9     reserved
   Uint16 SCIAENCLK:1;  // 10    Enable low speed clk to SCI-A
   Uint16 SCIBENCLK:1;  // 11    Enable low speed clk to SCI-B
   Uint16 MCBSPENCLK:1; // 12    Enable low speed clk to McBSP
   Uint16 rsvd4:1;      // 13    reserved
   Uint16 ECANENCLK:1;  // 14    Enable system clk to eCAN
};

union PCLKCR_REG {
   Uint16              all;
   struct PCLKCR_BITS  bit;
};   

// PLL control register bit definitions:
struct PLLCR_BITS {      // bits  description
   Uint16 DIV:4;         // 3:0   Set clock ratio for the PLL
   Uint16 rsvd1:12;      // 15:4  reserved
};

union PLLCR_REG {
   Uint16             all;
   struct PLLCR_BITS  bit;
};

// Low Power Mode 0 control register bit definitions:
struct LPMCR0_BITS {     // bits  description
   Uint16 LPM:2;         // 1:0   Set the low power mode
   Uint16 QUALSTDBY:6;   // 7:2   Qualification   
   Uint16 rsvd1:8;       // 15:8  reserved
};

union LPMCR0_REG {
   Uint16              all;
   struct LPMCR0_BITS  bit;
};

// Low Power Mode 1 control register bit definitions:
struct LPMCR1_BITS {     // bits  description
   Uint16 XINT1:1;       // 0     Enable XINT1 to wake the device from standby
   Uint16 XNMI:1;        // 1     Enable XMNI to wake the device from standby
   Uint16 WDINT:1;       // 2     Enable watchdog interrupt to wake the device from standby
   Uint16 T1CTRIP:1;     // 3     Enable T1CTRIP to wake the device from standby
   Uint16 T2CTRIP:1;     // 4     Enable T2CTRIP to wake the device from standby
   Uint16 T3CTRIP:1;     // 5     Enable T3CTRIP to wake the device from standby
   Uint16 T4CTRIP:1;     // 6     Enable T4CTRIP to wake the device from standby
   Uint16 C1TRIP:1;      // 7     Enable C1TRIP to wake the device from standby
   Uint16 C2TRIP:1;      // 8     Enable C2TRIP to wake the device from standby
   Uint16 C3TRIP:1;      // 9     Enable C3TRIP to wake the device from standby
   Uint16 C4TRIP:1;      // 10    Enable C4TRIP to wake the device from standby
   Uint16 C5TRIP:1;      // 11    Enable C5TRIP to wake the device from standby
   Uint16 C6TRIP:1;      // 12    Enable C6TRIP to wake the device from standby
   Uint16 SCIRXA:1;      // 13    Enable SCIRXA to wake the device from standby
   Uint16 SCIRXB:1;      // 14    Enable SCIRXB to wake the device from standby
   Uint16 CANRX:1;       // 15    Enable CANRX to wake the device from standby
};

union LPMCR1_REG {
   Uint16              all;
   struct LPMCR1_BITS  bit;
};

//---------------------------------------------------------------------------
// System Control Register File:
//
struct SYS_CTRL_REGS {
   Uint16  rsvd1[10];            // 0-9
   union   HISPCP_REG HISPCP;    // 10: High-speed peripheral clock pre-scaler
   union   LOSPCP_REG LOSPCP;    // 11: Low-speed peripheral clock pre-scaler
   union   PCLKCR_REG PCLKCR;    // 12: Peripheral clock control register
   Uint16             rsvd2;     // 13: reserved
   union   LPMCR0_REG LPMCR0;    // 14: Low-power mode control register 0
   union   LPMCR1_REG LPMCR1;    // 15: Low-power mode control register 1
   Uint16             rsvd3;     // 16: reserved
   union   PLLCR_REG  PLLCR;     // 17: PLL control register
   // No bit definitions are defined for SCSR because
   // a read-modify-write instruction can clear the WDOVERRIDE bit
   Uint16             SCSR;      // 18: System control and status register
   Uint16             WDCNTR;    // 19: WD counter register
   Uint16             rsvd4;     // 20
   Uint16             WDKEY;     // 21: WD reset key register
   Uint16             rsvd5[3];  // 22-24
   // No bit definitions are defined for WDCR because
   // the proper value must be written to the WDCHK field
   // whenever writing to this register. 
   Uint16             WDCR;      // 25: WD timer control register
   Uint16             rsvd6[6];  // 26-31
};

extern volatile struct SYS_CTRL_REGS SysCtrlRegs;
#endif