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📄 mmc_main.h

📁 MMC 卡的驱动程序
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/* * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA * * Copyright (C) 2002 Motorola Semiconductors HK Ltd * *//****************************************************************************** *  * Copyright (C) 2001, Motorola All Rights Reserved *  * File Name:   mmcsd_main.h *  * Progammers: Yiwei Zhao  * * Date of Creations:   30 Nov 2001 * * Synopsis: * * Modification History: * 30 Nov, 2001, initialization version * *****************************************************************************//*  * Implementation of the MultiMediaCard/SD Driver. */#ifndef _MOT_MMC_SD_MAIN_H_#define _MOT_MMC_SD_MAIN_H_#include <linux/config.h>#include <linux/ioctl.h>#include <linux/blkdev.h>#include <linux/spinlock.h>#ifdef CONFIG_ARCH_MX2ADS#include <asm/arch/mx2.h>#include <asm/dma.h>#endif#include "sys_mmc.h"#ifdef SILICON_MASK_0L// only needed if 0L44N/0L45N is used.  Add -DMASK_SILICON_0L to Makefile if using 0L44N/0L45N#define MMCSD_DMA_ENDIAN_ERR 	1#endif#define MMCSD_TEST	1#define MMCSD_WRITE_DMA	1#define MMCSD_READ_DMA	1//#define MMCSD_CMD	1//#define DBMX1_DEBUG 1#ifdef DBMX1_DEBUG#define TRACE(fmt, args...) \	{ \		printk("\n %s:%d:%s:",__FILE__, __LINE__,__FUNCTION__); \		printk(fmt, ## args);\	}#else#define TRACE(fmt, args...)#endif#define FAILED(fmt, args...) \	{ \		printk("\n %s:%d:%s:",__FILE__, __LINE__,__FUNCTION__); \		printk(fmt, ## args);\	}#define INFO(fmt, args...) \	{ \		printk("\n"); \		printk(fmt, ## args);\	}/***************************************************************************** *  * 			Macro Definition * ****************************************************************************/	/* 3.2.	 Constant Definition * 3.2.1.Addresses of Registers * The following macros define the addresses of SDHC's registers.  *//* 3.2.2 Card State *The macros define the states of MMC/SD card. */#define    MMCSD_NOTREADY	0x0	/*Initial State*/#define    MMCSD_INACTIVE	0x1	/*Inactive State*/#define    MMCSD_IDLE				0x0	/*Idle State*/#define    MMCSD_READY				0x200	/*Ready State */#define    MMCSD_IDENTIFICATION		0x400	/*Identification State */#define    MMCSD_STANDBY			0x600	/*Stand-by State*/#define    MMCSD_TRANSFER			0x800	/*Transfer State*/#define    MMCSD_SEND_DATA			0xA00	/*Sending State*/#define    MMCSD_RECEIVE_DATA		0xC00	/*Receiving State*/#define    MMCSD_PROGRAM			0xE00	/*Programming State*/#define    MMCSD_DISCONNECT			0x1000	/* Disconnect State*/#define	   MMCSD_STATUS_STATE		0x00001E00/* 3.2.3. Read Ahead Value * This macro defines the block-level read-ahead values for MMCSD driver.  */#define 	MMCSD_READ_AHEAD	8 /* 3.2.4. Device Number * This macro defines the number of devices that MS driver will manage.  */#define 	MMCSD_DEVICE_NUM	2 /* 3.2.5. Block and Sector Size * These macros define the sector size and minimum block size, which are  * required by Linux Block Driver. */#define 	MMCSD_MINIMUM_BLK_SIZE		512#define 	MMCSD_FS_SECTOR_SIZE		MMCSD_MINIMUM_BLK_SIZE#define		MMCSD_MINIMUM_BLK_SIZE_BIT	9#define		MMCSD_MAX_MULTI_BLK			64	/* MMCSD Major Numner * */#define 	MMCSD_MAJOR			0x0	/* MMCSD Interrupr Number * */#ifdef CONFIG_ARCH_MX2ADS#define 	MMCSD_IRQ			11	#define		MMCSD2_IRQ			10#define		MMCSD_SOCKET1_INT	8	//PD25#endif#ifdef CONFIG_ARCH_MX1ADS#define 	MMCSD_IRQ			35	#endif/* MMCSD DMA Channel * */#ifdef CONFIG_ARCH_MX2ADS#define 	MMCSD_DMA_CHANNEL		0x7#endif#ifdef CONFIG_ARCH_MX1ADS#define 	MMCSD_DMA_CHANNEL		0xD#endif#define		MMCSD_READ			0x1#define		MMCSD_WRITE			0x2/* * For Setting Start Stop Speed */#define MMCSD_HIGH_SPEED  	0		// 20M 16M#define MMCSD_LOW_SPEED		1		// As Low as possible /***************************************************************************** *  * 		Structure Definition	 * ****************************************************************************//* 3.3.	Structure Definition * 3.3.1. Card Status * Structure of MMCSD Card Status Register *//*	typedef  struct _CARD_STATUS  {		UINT32	res1			:5;		UINT32	app_cmd			:1;		UINT32	res2			:2;		UINT32	ready_for_data		:1;		UINT32	cur_state		:4;		UINT32	erase_reset		:1;		UINT32	card_ecc_disabled	:1;		UINT32	wp_erase_skip		:1;		UINT32	cidcsd_overwrite	:1;		UINT32	overrun			:1;		UINT32	underrun		:1;		UINT32	error			:1;		UINT32	cc_error		:1;		UINT32	card_ecc_failed		:1;		UINT32	illegal_cmd		:1;		UINT32	com_crc_error		:1;		UINT32	lock_unlock_failed	:1;		UINT32	card_is_locked		:1;		UINT32	wp_violation		:1;		UINT32	erase_param		:1;		UINT32	erase_seq_error		:1;		UINT32	block_len_error		:1;		UINT32	address_error		:1;		UINT32	out_of_range		:1;	} MMCSD_CARD_STATUS;*/	/* 3.3.2. SDHC Status Register * Structure of SDHC Status Register *//*	typedef  struct _SDHC_STAT  {		UINT32	timeout_read		:1;		UINT32	timeout_reponse		:1;		UINT32	crc_werror		:1;		UINT32	crc_rerror		:1;		UINT32	res1			:1;		UINT32	crc_resperror		:1;		UINT32	app_bfe			:1;		UINT32	app_bff			:1;		UINT32	clock_running		:1;		UINT32	wr_crc_error		:2;		UINT32	data_tran_done		:1;		UINT32	access_op_done		:1;		UINT32	end_cmd_resp		:1;		UINT32	irq_active		:1;		UINT32	card_presence		:1;		UINT32	res2			:16;	} DBMX1_SDHC_STATUS;*//* 3.3.3 SDHC Clock Rate Register */	typedef  struct _SDHC_CLK_RATE  {		u32	clk_rate 		:3;		u32	pre_scaler		:3;		u32	res1			:26;	} DBMX1_SDHC_CLK_RATE;/* 3.3.4 Command and Data Control Register */	typedef  struct _SDHC_CMD_DAT_CONT {		u32	resp_format		:3;		u32	data_enable		:1;		u32	write_read		:1;		u32	stream_block		:1;		u32	busy			:1;		u32	initialize		:1;		u32	bus_width		:2;		u32	start_read_wait		:1;		u32	stop_read_wait		:1;		u32	cmdres			:1;		u32	res			:19;	} DBMX1_SDHC_CMD_DAT_CONT;/* 3.3.5 Interrupt Mask Register *//*	typedef  struct _SDHC_INT_MASK  {		UINT32	data_tran		:1;		UINT32	prg_done		:1;		UINT32	end_cmd_res		:1;		UINT32	buf_ready		:1;		UINT32	sdio_interrupt		:1;		UINT32	dat0_irq		:1;		UINT32	auto_card		:1;		UINT32	res			:25;	} DBMX1_SDHC_INT_MASK;*/	/* 3.3.6 MMCSD Device Structure * */	typedef struct _MMCSD_Dev {		u8	CID[16];		u32	card_rca;		// card address		u32	card_state;		// current state of the card		u32	dev_size;		u32	sect_num;		u8	blksize_bit;	   	u32	blksize;		// size of block in file system 		u16	phy_blksize;		// Physical size of block on the MMCSD.		u32	phy_sectorsize;	// the size of erasable sector		u32	wp_grp_size;		// the size of write protected group	   	spinlock_t 	lock;		struct semaphore sema;	   	u32		usage;//	   	request_queue_t	queue;		// request queue		u8	busy;		int	kpid;		wait_queue_head_t select_wait;	// Kernel thread blocked on it.//		wait_queue_head_t dma_wait;	// Kernel thread blocked on it.		u8	cmd;			// What command being executed.		u32  result;			// set by tasklet		u8	*buff;		u8	card_type;		u8	bit_width;		//1: 4-bit, 0: 1-bit		u32	lba_sec_offset;		u8	*buff_pool[MMCSD_MAX_MULTI_BLK];#ifdef MMCSD_DMA_ENDIAN_ERR		u8	*tmp_pool[MMCSD_MAX_MULTI_BLK];#endif		u32	cur_num;		u32	cur_sec;		u32	addr;		u32	dma_channel;#ifdef 	CONFIG_ARCH_MX2ADS		dma_request_t dma;#endif			u32	is_ro;		u32 port;//in MX21 there are two ports		u16  ccc; 			// Card Command Class	} MMCSD_Dev;/* The Lock for Current Selected Device  * */typedef struct _selected_lock{	   	spinlock_t 	lock;		MMCSD_Dev	*device;}MMCSD_Lock;	/* 3.3.7 MMCSD Blocks * */	typedef struct _MMCSD_Blks {		u32	start;		// start address	}MMCSD_Blks;/* 3.3.8 MMCSD Password Structure * */	typedef struct _MMCSD_PWD {		u8	set_pwd		:1;	// new password		u8	clr_pwd		:1;	// clear password		u8	lock		:1;	// lock, 0 unlock		u8	erase		:1;	// Forced Erase		u8	res		:4;	   	u8	len;			// length of password		u8   pwd[256];		   	}MMCSD_PWD;typedef union _Responses {		u32	status;		u32	OCR;		u8	CID[16];		u8	CSD[16];		u8	SCR[8];}MMCSD_Responses;typedef struct tag_csd{	u8    csd_structure;       /* CSD structure              */	u8    mmc_prot;            /* MMC protocol version       */	u16   read_bl_len;         /* read data block length     */	u32    c_size;              /* device size                */	u16	sector_size;         /* erase sector size          */}MMC_CSD;/***************************************************************************** *  * 		Extern Variables	 * ****************************************************************************/extern MMCSD_Dev       *g_mmcsd_devices;extern u8				g_mmcsd_cur_device;extern u8   			g_mmcsd_num;extern MMCSD_Lock		g_selected_lock[2];/***************************************************************************** *  * 		Function Declarations	 * ****************************************************************************//* Functions in mmcsd_drv.c*/MMCSD_STATUS _MMCSD_InitCard(void);MMCSD_STATUS _MMCSD_InitMMC(int port);MMCSD_STATUS _MMCSD_GetInfo(MMCSD_Dev *device);MMCSD_STATUS _MMCSD_SetSectLen(MMCSD_Dev *device);u32 _MMCSD_GetStatus(MMCSD_Dev *device);void _MMCSD_SetCSD(MMCSD_Dev *device,u8 * Csd_buff);MMCSD_STATUS _MMCSD_CSDCheck(u8 *csdbuff );MMCSD_STATUS _MMCSD_CIDCheck( u8 *cidbuff );void _MMCSD_SetCID(MMCSD_Dev *device,u8* Cid_buff);MMCSD_STATUS _MMCSD_InitSDHC(int port);//MMCSD_STATUS _MMCSD_SCRCheck(MMCSD_Dev *device);/* Functions in mmcsd_cmd.c*/MMCSD_STATUS 	_MMCSD_GoIdleState(int port);MMCSD_STATUS 	_MMCSD_SendOpCond(u32 voltage,int port);MMCSD_STATUS 	_MMCSD_AllSendCID(u8 *pCidBuff,int port);MMCSD_STATUS 	_MMCSD_SetRelativeAddr(u32 addr,int port);MMCSD_STATUS 	_MMCSD_SelectDeselectCard(u32 addr,u32 port);MMCSD_STATUS 	_MMCSD_SendCSD(u32 addr,u8* pBuff,u32 port);MMCSD_STATUS 	_MMCSD_SendCID(u32 addr,u8 * pBuff,u32 port);MMCSD_STATUS  	_MMCSD_SendStatus(u32 addr,u32 *pStatus,u32 port);MMCSD_STATUS 	_MMCSD_SetBlockLen(u32 size,u32 num,u32 port);MMCSD_STATUS 	_MMCSD_TagSectorStart(u32 addr);MMCSD_STATUS 	_MMCSD_TagSectorEnd(u32 addr);MMCSD_STATUS 	_MMCSD_Erase(void);MMCSD_STATUS 	_MMCSD_NoDataCommand(u8 cmd, u32 arg,u32 ctrl,int port);MMCSD_STATUS 	_MMCSD_WaitUntil(u32 EndCondition,int port);MMCSD_STATUS 	_MMCSD_SetBusWidth(u32 rca, u32 width,u32 port);void 			_MMCSD_Mask_interrupt(u32 mask, u32 *orig,int port);void 			_MMCSD_Restore_Mask(u32 orig,int port);MMCSD_STATUS 	_MMCSD_irq_WaitUntil(u32 EndCondition,u8 cmd,int timeout,int port);//MMCSD_STATUS	_MMCSD_SendSCR(u32 rca,MMCSD_scr *scr, u32 port);/* Functions in mmcsd_io.c */u32	 	_MMCSD_ChectHardwareRevision(int port);u32		_MMCSD_SoftReset(int port);void 	_MMCSD_SetCmd(u8 cmd,u32 arg,u32 ctrl,int port);u32 	_MMCSD_IsRun(int port);void 	_MMCSD_StartClk(int port);void 	_MMCSD_StopClk(int port);void 	_MMCSD_GetResponses(MMCSD_Responses *pRS, u8  rsType,int port);void 	_MMCSD_SetBlockLenReg(u16 size,u32 port);void 	_MMCSD_SetNumberOfBlockReg(u16 num,u32 port);void 	Start_Stop_Clk(u32 Clk_en,int port);void 	_MMCSD_ClockSet(u32 prescaler,u8 clk,int port);void  	_MMCSD_ReadTimeOut(u32 arg,int port);void 	_MMCSD_64M_MMC_PinConfig(void);void	_MMCSD_SetClk(int mode,int port);void _mmcsd_socket1_clear_irq(void);void _mmcsd_socket1_irq_set(void);/* Functions in SysInit.c *//*void Set_P2CLK(void);void PortB_AIPI_IRQ_setting(void);void SysInit(void);void PWMInit(void);void DSPAInit(void);void MMCInit(void);void LCDCInit(void);void ASPInit(void);void MemInit(void);void PortInit(void);void ClockInit(UINT8 clock);void AIPIInit(void);void IrptInit(void);void LED3_off(void);void LED3_on(void);void LED2_off(void);void LED2_on(void);*//* Functions for Testing */void _mmcsd_test_reading_pages(MMCSD_Dev * device);void _mmcsd_print_page(u8 * p, u32 size);#define MMCSD_OK	0#define MMCSD_ERROR	-1//#define  _MMCSD_get_phy_addr(buf) (buf-0xc0000000+0x08000000) #endif

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